Commit graph

52451 commits

Author SHA1 Message Date
Jens Wiklander
61fba0faba ofnode: add ofnode_by_prop_value()
Adds ofnode_by_prop_value() to search for nodes with a given property
and value, an ofnode version of fdt_node_offset_by_prop_value().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Cédric Le Goater
427ddd8420 dm: core: fix devfdt_remap_addr_index()
commit 30a90f56c3 ("dm: core: add functions to get memory-mapped I/O
addresses") introduced a devfdt_remap_addr_index() routine but it does
not make use of the index parameter.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-18 08:12:21 -06:00
Rajan Vaja
1712ca2192 dm: core: Scan "/firmware" node by default
All Linux firmware drivers are put under "/firmware" node
and it has support to populate "/firmware" node by default.

u-boot and Linux can share same DTB. In this case, driver
probe for devices under "/firmware" will not be invoked
as "/firmware" does not have its own "compatible" property.

This patch scans "/firmware" node by default like "/clocks".

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Rajan Vaja
68d215d907 dm: core: Move "/clock" node scan into function
Create separate function for scanning node by path and
move "/clock" node scan code into that function.

This will be usable if scanning of more node is required.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:21 -06:00
Mario Six
d2166319df misc: Add MPC83xx serdes driver
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
19fbdca47b cpu: Add MPC83xx CPU driver
Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
fa44b53398 test: Add tests for CPU uclass
Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
57370de377 cpu: Add cpu_probe_all method
Add a method to probe all CPUs of the board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
50d188b955 cpu: Fix cpu.h documentation
Documentation in cpu.h is not in kernel-doc format. Change it to comply
with it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
c0434407b5 board_f: Use static print_cpuinfo if CONFIG_CPU is active
When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.

Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Changed condition to CONFIG_IS_ENABLED(CPU):
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-18 08:12:16 -06:00
Mario Six
dc145a7be3 init: Fix documentation
The documentation in init.h is not in kernel-doc format. Fix this.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
138181a550 common: board_f: Sort includes
Includes should be sorted.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
2c21749d71 timer: Add MPC83xx timer driver
Add a timer driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
d259f975d4 timer: Sort Makefile entries
Makefile entries should be sorted.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
07d538d281 clk: Add MPC83xx clock driver
Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
76fdad1f21 mpc83xx: Add sysreset driver
Add a sysreset driver for the MPC83xx platform.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
23471aed5c board_f: Add reset status printing
To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
cda4688c5e test: Add tests for sysreset_get_status
Add some tests for sysreset_get_status.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
245f5cda69 sysreset: Add get_status method
It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).

As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
08f5b0b23a powerpc: Add read*_*/write*_* macros
Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
e40615565d ram: Add driver for MPC83xx
Add a RAM driver for the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Bin Meng
0f1caa9880 sandbox: Enable bitrev library build
Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Bin Meng
9c2cb97e22 lib: bitrev: Sync with Linux kernel v4.17
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Andy Shevchenko
e599c4e7d8 sandbox: Build with -fPIC
Sandbox is not a real bootloader and it does require
a position independent code to be supported.

Thus, build it with -fPIC explicitly.

Fixes: 16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Tom Rini
b57f1895b6 Merge git://git.denx.de/u-boot-x86 2018-09-17 08:04:25 -04:00
Georgii Staroselskii
6321da5263 x86: cpu: add docstring to scu_ipc_command()
These comments were copied from the Linux kernel driver in
drivers/platform/x86/intel_scu_ipc.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:53 +08:00
Georgii Staroselskii
f7ce2d6e65 x86: tangier: acpi: add I2C6 node
Now that we have I2C#6 working, it's time to add a corresponsing
ACPI binding.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:53 +08:00
Georgii Staroselskii
f26b260c69 x86: dts: edison: configure I2C#6 pins
Now that we have the pinctrl driver for Merrifield in place we can make
use of it and set I2C#6 pins appropriately.

Initial configuration came from the firmware.  Which quite likely has
been used in the phones, where that is not part of Atom peripheral, is
in use. Thus we need to override the leftover.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:52 +08:00
Georgii Staroselskii
355c9b757e x86: tangier: pinmux: add API to configure protected pins
This API is going to be used to configure some pins that are protected
for simple modification.

It's not a comprehensive pinctrl driver but can be turned into one
when we need this in the future. Now it is planned to be used only
in one place. So that's why I decided not to pollute the codebase with a
full-blown pinctrl-merrifield nobody will use.

This driver reads corresponding fields in DT and configures pins
accordingly.

The "protected" flag is used to distinguish configuration of SCU-owned
pins from the ordinary ones.

The code has been adapted from Linux work done by Andy Shevchenko
in pinctrl-merrfifield.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix build warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:52 +08:00
Georgii Staroselskii
224742a390 x86: cpu: introduce scu_ipc_raw_command()
This interface will be used to configure properly some pins on
Merrifield that are shared with SCU.

scu_ipc_raw_command() writes SPTR and DPTR registers before sending
a command to SCU.

This code has been ported from Linux work done by Andy Shevchenko.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 14:34:15 +08:00
Christian Gmeiner
41f4e4302f x86: drop custom CONFIG_SYS_BAUDRATE_TABLE define
This will add support for a baud rate of 57600.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 14:31:48 +08:00
Tom Rini
40e44c8bf5 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2018-09-16 10:32:33 -04:00
Tom Rini
9e45008b39 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-09-16 10:30:16 -04:00
Tom Rini
ad17b970f7 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-09-16 10:29:47 -04:00
Tom Rini
589cf349f0 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-09-16 10:29:39 -04:00
Angelo Dureghello
2c92e4fbc6 m68k: ColdFire mcf5441x, add eSDHC support
This patch adds mcf5441x eSDHC support for the mcf5441x family.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Angelo Dureghello
faae49543a m68k: fix multiple memory accesses on swap operations
On a
	u32 val = __sw32(*addr);

multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Angelo Dureghello
a1ed3a83be m68k: fix mcf5441x total interrupt number
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Marek Vasut
e83da8e880 ARM: rmobile: Repair TMU clock on Gen2
The Gen2 TMU is fed with fixed 32.5 MHz signal from CP .
This is then divided by 4 in TMU. Fix the timer clock
setting in Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
0e286c529f sh: tmu: Zap get_tbclk and timer_read_counter
Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
f02c1f695e sh: tmu: Clean up register usage
The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
8b39df9e78 sh: tmu: Inline sh_tmu.h
The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
ccce3acfe7 sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
ae59a9f8f7 sh: tmu: Inline get_tmu0_clk_rate()
This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant
directly instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
15f11fc6d7 sh: tmu: Inline tmu_timer_{start,stop}()
These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
eb05dcfea2 sh: tmu: Simplify the tmu_bit math
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0.
Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
d1da5d6cd8 sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIV
This constant is always 4 , for all boards that exist. Define it
once in arch/sh/lib/time.c and remove it from the configs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
2606deb22b sh: sh7724: Drop EDMR macro
Drop the macro as it is never used and it collides with sh_eth.h macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-09-15 03:19:06 +02:00
Marek Vasut
c5fcd9e583 sh: sh7723: ap325rxa: Drop duplicate HIZCRB macro
Drop the macro as it is defined in sh7723.h already.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-09-15 03:19:06 +02:00
Patrice Chotard
5c349e179d usb: ehci-generic: Add vbus-supply regulator support
Add vbus-supply regulator support.
On some board vbus is not controlled by the phy but by
an external regulator.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-15 03:17:43 +02:00