Commit graph

915 commits

Author SHA1 Message Date
Albert ARIBAUD
d2a3e91139 Merge branch 'u-boot/master'
Conflicts:
	drivers/net/Makefile

(trivial merge)
2014-05-09 11:50:14 +02:00
Michal Simek
2fd2489b7a net: zynq: Fix sparse warnings in gem
Add missing header.

Warnings:
drivers/net/zynq_gem.c:491:5: warning: symbol 'zynq_gem_initialize' was not declared. Should it be static?
drivers/net/zynq_gem.c:542:5: warning: symbol 'zynq_gem_of_init' was not declared. Should it be static?

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-06 13:41:55 +02:00
Michal Simek
c1a9fa4ba6 net: zynq: Use predefined macros instead of hardcoded value
MII is used by this driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-06 13:41:33 +02:00
Tom Rini
080d897585 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-04-25 14:53:51 -04:00
Zhao Qiang
08ad9b068a ar8031: modify the config func of ar8031 to ar8021_config
ar8031 has the same config steps with ar8021, so change its
config func to ar8021_config instead of genphy_config.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:53 -07:00
Priyanka Jain
2ee6c52e22 driver/net/fm/memac_phy: Initialize mdio_clock for SoCs wih FMANv3
MDIO clock needs to be initialized in u-boot code for SoCs
having FMAN-v3(v3H or v3L) controller due to below reasons

-On SoCs that have FMAN-v3H  like B4860, default value of
MDIO_CLK_DIV bits in mdio_stat(mdio_cfg) register generates
mdio clock too high (much higher than 2.5MHz), violating the
IEEE specs.
-On SOCs that have FMAN-v3L like T1040, default value of
MDIO_CLK_DIV bits is zero, so MDIO clock is disabled.

So, for proper functioninig of MDIO, MDIO_CLK_DIV bits needs to
be properly initialized.
Also this type of initialization is generally done in
PBI(pre-bootloader) phase using rcw.But for chips like T1040
which support deep-sleep, such type of initialization cannot be
done in PBI phase due to the limitation that during deep-sleep
resume, FMAN (MDIO) registers are not accessible in PBI phase.
So, mdio clock initailization must be done as part of u-boot.

This initialization code is implemented in memac_phy.c which
gets compiled only for SoCs having FMANv3, so no extra compilation
flag is required.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:49 -07:00
Codrin Ciubotariu
44afbbc0f0 net/phy: Fix PHY id for VSC8514
In the current Datasheet for VSC8514 there is a mistake, saying that
the PHY id is 0x70570. The real value in the identifier registers is
0x70670. Linux PHY driver uses 0x70670 also.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:47 -07:00
Zhao Qiang
dcf1d774bf QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR
CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address.
Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address,
and CONFIG_SYS_QE_FW_ADDR for QE microcode address.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:47 -07:00
Daniel Schwierzeck
538cf92c8c MIPS: drop incaip board
This is dead hardware and no one is interested in making the
necessary changes for upcoming features like generic board or
driver model.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
2014-04-20 13:16:43 +02:00
David Müller (ELSOFT AG)
d2ff5e55c3 e1000: remove redundant assignment
Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2014-04-18 16:14:10 -04:00
Paul Burton
6fb49e4aa0 pcnet: force ordering of descriptor accesses
The ordering of accesses to the rx & tx descriptors is important, yet
the send & recv functions accessed them via regular structure accesses.
This leaves the compiler with the opportunity to reorder those accesses
or to hoist them outside of loops. Prevent that from happening by using
readl & writel to access the descriptors. As a nice bonus, this removes
the need for the driver to care about endianness.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-18 10:42:30 -04:00
Paul Burton
a354ddc3d7 pcnet: align rx buffers for cache invalidation
The RX buffers are invalidated when a packet is received, however they
were not suitably cache-line aligned. Allocate them seperately to the
pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure
suitable alignment for the cache invalidation, preventing anything else
being placed in the same lines & lost.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-18 10:42:30 -04:00
Paul Burton
f1ae382dfd pcnet: access descriptor rings & init block uncached
The prior accesses to the descriptor rings & init block via cached
memory had a few issues:

  - The memory needs cache flushes or invalidation at the appropriate
    times, but was not necessarily aligned on cache line boundaries.
    This could lead to data being incorrectly lost or written back to
    RAM at the wrong time.

  - There are points where ordering of writes to the memory is
    important, but because it's cached memory the pcnet controller
    would see cache lines written back ordered by address. This could
    occasionally lead to hardware seeing descriptors in an incorrect
    state.

  - Flushing the cache constantly is inefficient.

So, to avoid all of those issues simply access the descriptors & init
block via uncached memory. The MIPS-specific UNCACHED_SDRAM macro is
used to do this (retrieving an address in kseg1) as I could see no
existing generic solution. Since the MIPS Malta board is the only user
of the pcnet driver, hopefully this doesn't matter.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-18 10:42:30 -04:00
Masahiro Yamada
36bf57b6fb arm: remove lubbock board support
Enough time has passed since this board was moved to Orphan. Remove.

 - Remove board/lubbock/*
 - Remove include/configs/lubbock.h
 - Cleanup defined(CONFIG_LUBBOCK)
 - Move the entry from boards.cfg to doc/README.scrapyard

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-04-18 10:42:30 -04:00
Karicheri, Muralidharan
fc9a8e8d40 keystone2: net: add keystone ethernet driver
Ethernet driver configures the CPSW, SGMI and Phy and uses
the the Navigator APIs. The driver supports 4 Ethernet ports and
can work with only one port at a time.

Port configurations are defined in board.c.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
2014-04-17 17:24:39 -04:00
Albert ARIBAUD
519fdde9e6 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h
2014-04-08 09:25:08 +02:00
Alexey Brodkin
a7b26dbb49 net/designware: align DMA buffer descriptors to D$ line
It's important to have ability to flush/invalidate each DMA buffer descriptor
individually to prevent incoherency of adjacent BDs.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
2014-03-28 15:06:30 -04:00
Ilya Ledvich
ef59bb7cc8 drivers: net: cpsw: init phy with gigabit features
CPSW ia a gigabit device. Use the PHY_GBIT_FEATURES macro to determine phy
supported features.
Tested on cm_t335.

Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
2014-03-12 16:22:12 -04:00
Tom Rini
5495dae7aa Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-03-10 14:22:54 -04:00
Haijun.Zhang
dc116bd6c4 net/phy: Correct AR8021 phy_mask
There was wrong phy_mask for AR8021 device,
so the AR8021 can't be probed correctly.
Changed it from 0x4fffff to 0x4ffff0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
2014-03-07 10:59:06 -05:00
Mugunthan V N
9c653aad16 drivers: net: cpsw: add support to have phy address from cpsw platform data
Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards]
Signed-off-by: Tom Rini <trini@ti.com>
2014-03-04 09:41:53 -05:00
Michal Simek
f88a6869a1 net: gem: Add OF initialization support
Gem can be directly initialized from DTB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-03-04 09:27:35 -05:00
Michal Simek
0c9c99a20b net: emaclite: Fix OF initialization
- Add xilinx_emaclite_of_init to netdev.h
- Remove global data pointer from the driver
- Add better handling for error state.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-03-04 09:27:32 -05:00
Tom Rini
a7e8c15f71 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.c

Signed-off-by: Tom Rini <trini@ti.com>
2014-02-25 13:55:49 -05:00
Zhao Qiang
e0d809647f ar8031/8033/phy:enable autonegotiation for ar8031/8033
Function "genphy_parse_link()" used "if (mii_reg & BMSR_ANEGCAPABLE)" before
while "if (phydev->supported & SUPPORTED_Autoneg)" now.
So assign "phydev->supported" to "phydev->drv->features" for ar8031/8033
to enable autonegotiation.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-24 15:23:41 -08:00
Bhupesh Sharma
ee456337c6 SMC91111: Fix compilation warnings
This patch fixes the following warning messages coming out of
'drivers/net/smc91111.h' when compiled for 'vexpress_aemv8a':

warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Currently this issue seems to surface when SMSC is compiled for 64-bit
ARMv8 platforms, so the change is protected under CONFIG_ARM64, so that
it doesn't break other existing platforms.

In addition this patch tries to fix some checkpatch errors and warnings
(others related to camel-casing and volatile usage will be addressed
by a later patch).

This fix has been tested on both ARMv8 foundation model v1 and v2.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2014-02-21 11:33:18 -05:00
Tom Rini
6853e6aa77 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-20 12:18:59 -05:00
Tom Rini
130fbeb1c5 blackfin: Add <asm/clock.h> to numerous drivers
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include <asm/clock.h> in more drivers to
avoid warnings.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-20 12:00:27 -05:00
Albert ARIBAUD
3e11350255 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	Makefile
	drivers/net/npe/Makefile

These two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile.
2014-02-20 13:16:05 +01:00
Masahiro Yamada
6825a95b0b kbuild: use Linux Kernel build scripts
Now we are ready to switch over to real Kbuild.

This commit disables temporary scripts:
  scripts/{Makefile.build.tmp, Makefile.host.tmp}
and enables real Kbuild scripts:
  scripts/{Makefile.build,Makefile.host,Makefile.lib}.

This switch is triggered by the line in scripts/Kbuild.include
  -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
  +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj

We need to adjust some build scripts for U-Boot.
But smaller amount of modification is preferable.

Additionally, we need to fix compiler flags which are
locally added or removed.

In Kbuild, it is not allowed to change CFLAGS locally.
Instead, ccflags-y, asflags-y, cppflags-y,
CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
are prepared for that purpose.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-19 11:07:50 -05:00
Heiko Schocher
9137d19bdd net, phy: atheros ar803x bug
commit 626ee1e3 "phylib: update atheros ar803x phy"

leads in failing ethernet on the pxm2 board.

Calling genphy_config() instead of ar8021_config(),
which seems for ar8021 phys not ar803x phys, make
it working again.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2014-02-19 10:47:33 -05:00
Albert ARIBAUD
e7538fee99 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2014-02-19 12:04:45 +01:00
Soren Brinkmann
97598fcf10 net: zynq_gem: Calculate clock dividers dynamically
Remove hard coded clock divider setting and use the Zynq clock framework
to dynamically calculate appropriate dividers at run time.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Soren Brinkmann
1cd46ed2d3 net: zynq_gem: Move RCLK details out of driver
The GEM driver should not need to know about Zynq specific details of
RCLK related registers and bitfields in the SLCR. Move those details to
the slcr driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Albert ARIBAUD
a87a0ce702 Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master' 2014-02-19 07:15:01 +01:00
Stefano Babic
17998eff90 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-11 12:55:32 +01:00
Markus Niebel
6ba45cc0f8 NET: fec_mxc: fix MDIO clock prescaler calculation
The prescaler value for MDC is calculated wrong for
MX6S. Implement the same logic as linux here which handles
ENET_MAC different then original FEC.

Tested on a custom board with i.MX6S and 100MBit PHY

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
2014-02-11 11:33:45 +01:00
Alexey Brodkin
50b0df814b net/designware: make driver compatible with data cache
Up until now this driver only worked with data cache disabled.
To make it work with enabled data cache following changes were required:

 * Flush Tx/Rx buffer descriptors their modification
 * Invalidate Tx/Rx buffer descriptors before reading its values
 * Flush cache for data passed from CPU to GMAC
 * Invalidate cache for data passed from GMAC to CPU

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-07 09:17:05 -05:00
Alexey Brodkin
92a190aaab net/designware - switch driver to phylib usage
With this change driver will benefit from existing phylib and thus
custom phy functionality implemented in the driver will go away:
 * Instantiation of the driver is now much shorter - 2 parameters
instead of 4.
 * Simplified phy management/functoinality in driver is replaced with
rich functionality of phylib.
 * Support of custom phy initialization is now done with existing
"board_phy_config".

Note that after this change some previously used config options
(driver-specific PHY configuration) will be obsolete and they are simply
substituted with similar options of phylib.

For example:
 * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
by default.
 * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
automatically the first discovered on MDIO bus phy will be used

I believe there's no need now in "doc/README.designware_eth" because
user only needs to instantiate the driver with "designware_initialize"
whose prototype exists in "include/netdev.h".

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-07 09:16:46 -05:00
Alexey Brodkin
74cb708d58 net/designware: add explicit reset of {tx|rx}_currdescnum
Driver "init" function might be called multiple times.
On every "init" Tx/Rx buffer descriptors are initialized: "descs_init"
-> "{tx|rx}_descs_init".

In its turn those init functions set MAC's "{tx|rx}desclistaddr" to
point on the first buffer descriptor in the list.

So CPU to start operation from the first buffer descriptor as well after
every "init" we have to reset "{tx|rx}_currdescnum".

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-07 09:16:26 -05:00
Aaron Wu
819ca38fa7 blackfin: Initialize the EMAC VLAN with proper default value
EMAC_VLANx regs is not properly initiallized in u-boot, once it's overwrite in the
kernel when DSA enabled, hot reset will lead to bringing up EMAC fail in u-boot.

Signed-off-by: Aaron Wu <Aaron.Wu@analog.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Marek Vasut
0b2d3f209a ARM: NET: Remove the IXP NPE ethernet driver
This driver is no longer used, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
2014-02-06 02:51:52 +01:00
Tom Rini
f763be224f Merge branch 'net' of git://www.denx.de/git/u-boot-microblaze 2014-02-04 11:51:20 -05:00
Michal Simek
6f9b93723a net: axi_emac: Check if phy was correctly detected
As tsec and fm drivers checking phydev->link
ensure that u-boot don't try access device if link is not ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:42:45 +01:00
Prabhakar Kushwaha
5b7672fc49 boards/t1040qds: Adds ethernet support for T1040
Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5
    Define MDIO related configs
    Added eth.c file
    Update t1040.c to support RGMII and SGMII
    Update t1040qds.c to support ethernet
    Define the PHY address

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: remove dash from commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:48 -08:00
Masahiro Yamada
4d764244bd drivers: delete unused header files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:07 -05:00
Shengzhou Liu
4399434fef net/fm: revert commit 732dfe090d
This patch reverts patch 'add ft_fixup_xgec to support 3rd and 4th 10GEC'.
When dual-role MAC acts as 10G,it still uses fsl,fman-port-1g-rx/tx as before.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2014-01-21 14:05:52 -08:00
Shengzhou Liu
1576b558b9 powerpc/t2080qds: some update for t2080qds
- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-21 13:37:41 -08:00
Michal Simek
4ed4aa20de net: gem: Check if phy was correctly detected
As tsec and fm drivers checking phydev->link
ensure that u-boot don't try access device if link is not ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-01-21 16:07:10 +01:00
Fabio Estevam
f66e3ded61 net: phy: atheros: Fix the masks for AR8031/8035
Use the same masks as used in the kernel:
https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/tree/drivers/net/phy/at803x.c?id=refs/tags/v3.12.6

With such changes Ethernet is functional on hummingboard solo.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Marek Vasut <marex@denx.de>
Patch: 306640
2014-01-14 14:00:41 -06:00