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6 commits

Author SHA1 Message Date
York Sun
34e026f9b1 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver 
Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.

Signed-off-by: York Sun <yorksun@freescale.com>
 2014-04-22 17:58:48 -07:00
York Sun
6b1e1254f3 driver/ddr: Add 256 byte interleaving support 
Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.

Signed-off-by: York Sun <yorksun@freescale.com>
 2014-02-21 11:06:13 -05:00
York Sun
4e5b1bd0df driver/ddr: Change Freescale ARM DDR driver to support both big and little endian 
Initially it was believed the DDR controller on Freescale ARM would have
big endian. But some platform will have little endian.

Signed-off-by: York Sun <yorksun@freescale.com>
 2014-02-21 11:06:13 -05:00
York Sun
9ac4ffbde1 Driver/DDR: Add Freescale DDR driver for ARM 
Make PowerPC specific code conditional so ARM SoCs can reuse
this driver. Add DDR3 driver for ARM.

Signed-off-by: York Sun <yorksun@freescale.com>
 2013-11-25 11:43:46 -08:00
York Sun
9a17eb5b7e Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx 
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.

Signed-off-by: York Sun <yorksun@freescale.com>
 2013-11-25 11:43:46 -08:00
York Sun
5614e71b49 Driver/DDR: Moving Freescale DDR driver to a common driver 
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>
 2013-11-25 11:43:43 -08:00
Renamed from arch/powerpc/cpu/mpc8xxx/ddr/util.c (Browse further)