Commit graph

68577 commits

Author SHA1 Message Date
Simon Glass
eaac971736 tpm: cr50: Add ACPI support
Generate ACPI information for this device so that Linux can use it
correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:21 +08:00
Simon Glass
ca60199fee x86: apl: Drop unnecessary code in PMC driver
We don't have CONFIG_PCI in TPL but it is present in SPL, etc. So this
code is not needed. Drop it, and fix a code-style nit just above.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:20 +08:00
Simon Glass
ea78675b96 x86: apl: Generate ACPI table for LPC
Add an ACPI table for the LPC on Apollo Lake.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:20 +08:00
Simon Glass
60c0231078 x86: apl: Generate CPU tables
Add ACPI generation to the APL CPU driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:20 +08:00
Simon Glass
abb4e42b75 x86: apl: Add support for hostbridge ACPI generation
Support generating a DMAR table and add a few helper routines as well.
Also set up NHLT so that audio works.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:20 +08:00
Simon Glass
da2c1b8fd9 x86: apl: Generate required ACPI tables
Add support for generating various ACPI tables for Apollo Lake. Add a few
S3 definitions that are needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:19 +08:00
Simon Glass
022256b95b p2sb: Add some definitions used for ACPI
Allow this header to be included in ASL files by adding a header guard and
a few definitions that are needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:19 +08:00
Simon Glass
94c5ad2534 x86: apl: Allow reading hostbridge base addresses
Add a few functions to permit reading of various useful base addresses
provided by the hostbridge.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:19 +08:00
Simon Glass
540f0bae9b x86: acpi: Add support for additional Intel tables
Apollo Lake needs to generate a few more table types used on Intel SoCs.
Add support for these into the x86 ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:19 +08:00
Simon Glass
b98b91b6a9 x86: Support Atom SoCs using SWSMISCI rather than the SWSCI
Some Atom SoCs use SWSMISCI for SMI control. Add a Kconfig to select this.
It is used on Apollo Lake.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:18 +08:00
Simon Glass
9b3e6d4c1f x86: acpi: Add common Intel ACPI tables
Add various tables that are common to Intel CPUs. These functions can be
used by arch-specific CPU code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:18 +08:00
Simon Glass
350c7f52b9 acpi: Add more support for generating processor tables
This adds tables relating to P-States and C-States.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:18 +08:00
Simon Glass
7764a8481c x86: acpi: Add PCT and PTC tables
These are needed for the CPU tables. Add them into an x86-specific file
since we do not support them on sandbox, or include tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:18 +08:00
Simon Glass
15403289e5 acpi: Add support for generating processor tables
ACPI has a number of CPU-related tables. Add utility functions to write
out the basic packages.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:17 +08:00
Simon Glass
f37979e7b7 x86: acpi: Support generation of the DBG2 table
Add an implementation of the DBG2 (Debug Port Table 2) ACPI table.
Adjust one of the header includes to be in the correct order, before
adding more.

Note that the DBG2 table is generic but the PCI UART is x86-specific at
present since it assumes an ns16550 UART. It can be generalised later
if necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:17 +08:00
Simon Glass
d2628984b7 x86: acpi: Support generation of the HPET table
Add an implementation of the HPET (High Precision Event Timer) ACPI
table. Since this is x86-specific, put it in an x86-specific file

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:17 +08:00
Simon Glass
6c0da2da7c x86: Add a few common Intel CPU functions
Add functions to query CPU information, needed for ACPI.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:16 +08:00
Simon Glass
abc585b745 x86: apl: Update iomap for ACPI
Add some more definitions to the iomap. These will be used by
ACPI-generation code as well as the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:16 +08:00
Simon Glass
10552377d4 x86: apl: Add power-management definitions
Add SCI and power-state definitions required by ACPI tables. Fix the
license to match the original source file.

Als update the guard on acpi_pmc.h to avoid an error when buiding ASL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:16 +08:00
Simon Glass
59561c7c2e x86: Add some definitions for SMM
U-Boot does not support SMM (System Management Mode) at present, but needs
a few definitions to correctly set up the ACPI table. Add these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:16 +08:00
Simon Glass
18d8d241be x86: acpi: Add a common routine to write WiFi info
Intel WiFi chips can use a common routine to write the information needed
by linux. Add an implementation of this.

Enable it for coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:15 +08:00
Simon Glass
c9cc37de2c x86: apl: Support writing the IntelGraphicsMem table
This table is needed by the Linux graphics driver to handle graphics
correctly. Write it to ACPI.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:15 +08:00
Simon Glass
e4f09f97c9 x86: Add wake sources for the acpi_gpe driver
Some devices can wake the system from sleep, e.g opening the lid on a
clamshell or moving a USB mouse.

Add a wake to specify this for USB devices and add the settings for Apollo
Lake.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:15 +08:00
Simon Glass
fd42f263ce i2c: Add a generic driver to generate ACPI info
Many I2C devices produce roughly the same ACPI data with just things like
the GPIO/interrupt information being different.

This can be handled by a generic driver along with some information in the
device tree.

Add a generic i2c driver for this purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-09-25 11:27:15 +08:00
Simon Glass
bddbaf5edf x86: link: Allow more space for U-Boot
The extra ACPI code increases U-Boot above it current size limit. Move
the start earlier to provide space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:14 +08:00
Simon Glass
23dd0ea4c7 dm: acpi: Use correct GPIO polarity type in acpi_dp_add_gpio()
This function currently accepts the IRQ-polarity type. Fix it to use the
GPIO type instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:14 +08:00
Simon Glass
88490e1979 acpi: Support generating a multi-function _DSM for devices
Add a function to generate ACPI code for a _DSM method for a device.
This includes functions for starting and ending each part of the _DSM.

Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: fix the "new blank line at EOF" git warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:14 +08:00
Simon Glass
da7cff338f acpi: Add support for conditions and return values
Add functions to support generating ACPI code for condition checks and
return values.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:14 +08:00
Simon Glass
e0a896b88f acpi: Add support for writing a _PRW
A 'Power Resource for Wake' list the resources a device depends on for
wake. Add a function to generate this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:13 +08:00
Simon Glass
99e555a79a x86: coral: Add ACPI tables for coral
This device has a large set of ACPI tables. Bring these in from coreboot
so that full functionality is available (apart from SMI).

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:13 +08:00
Simon Glass
7924b499a2 x86: acpi: Expand the GNVS
Expand this to 4KB so that it is possible to add custom information to it.
On Chromebooks this is used to pass verified-boot information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:13 +08:00
Simon Glass
55109f1d4e x86: acpi: Support external GNVS tables
At present U-Boot puts a magic number in the ASL for the GNVS table and
searches for it later.

Add a Kconfig option to use a different approach, where the ASL files
declare the table as an external symbol. U-Boot can then put it wherever
it likes, without any magic numbers or searching.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:13 +08:00
Simon Glass
167c3f6e93 x86: Add a common global NVS structure
Add the definition of this structure common to Intel devices. It includes
some optional Chrome OS pieces which are used when vboot is integrated.

Drop the APL version as it is basically the same.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:12 +08:00
Simon Glass
97bafc9df9 x86: Add a config for the systemagent PCIEX regions size
Add a way to specify the required size for this region. This is used when
generating ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:12 +08:00
Simon Glass
4c44aa7aab x86: apl: Correct PCIE_ECAM_BASE
This value is incorrect and causes problems booting Linux. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:12 +08:00
Simon Glass
13539ba705 x86: acpi: Add DPTF asl files
Add common DPTF (Intel Dynamic Performance and Thermal Framework) files,
taken from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:12 +08:00
Simon Glass
14f643d1a2 x86: acpi: apl: Add asl files for Apollo Lake
Add Apollo Lake ASL files, taken from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:11 +08:00
Simon Glass
d9434a17e5 x86: acpi: Add base asl files for common x86 devices
Add common x86 ASL files, taken from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-09-25 11:27:11 +08:00
Simon Glass
4d0c5762ad x86: acpi: Add cros_ec tables
Add ASL files for the Chrome OS EC, taken from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:11 +08:00
Simon Glass
d9778ff0d3 cros: Add information about booting Chrome OS on x86
Recent versions of Chrome OS do not have a kernel in the root disk, to
save space.

With the improvements to the 'zboot' command it is fairly easy to load
the kernel from the raw partition. Add instructions on how to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:11 +08:00
Simon Glass
dc8e7a91f4 cros: Update chromium documentation
A few things have changed since this was written about 18 months ago.
Update the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:10 +08:00
Simon Glass
4f96023afd x86: zboot: Allow overriding the command line
When booting Chrome OS images the command line is stored separately
from the kernel. Add a way to specify this address so that images boot
correctly.

Also add comments to the zimage.h header.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust maxargs to 8 for 'zboot start']
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:10 +08:00
Simon Glass
631c2b9fc4 x86: zboot: Add an option to dump the setup information
There is a lot of information in the setup block and it is quite hard to
decode manually. Add a 'zboot dump' command to decode it into a
human-readable format.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:10 +08:00
Simon Glass
f82cd7b725 x86: zboot: Allow setting a separate setup base address
At present the setup block is always obtained from the image
automatically. In some cases it can be useful to use a setup block
obtained elsewhere, e.g. if the image has already been unpacked. Add an
argument to support this and update the logic to use it if provided.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust maxargs to 7 for 'zboot start']
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:10 +08:00
Simon Glass
126f47c3b8 x86: zboot: Set environment variables for image locations
At present it is not possible to tell from a script where the setup block
is, or where the image was loaded to. Add environment variables for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:09 +08:00
Simon Glass
3e59759324 x86: zboot: Add an 'setup' subcommand
Add a subcommand that sets up the kernel ready for execution.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:09 +08:00
Simon Glass
1d9e4bb755 x86: zboot: Add an 'load' subcommand
Add a subcommand that loads the kernel into the right places in memory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust ZBOOT_STATE_INFO value to match the command order]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:09 +08:00
Simon Glass
6f873f5fc6 x86: zboot: Add an 'info' subcommand
Add a little subcommand that prints out where the kernel was loaded and
its setup pointer. Run it by default in the normal boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:09 +08:00
Simon Glass
88f1cd6c2a x86: zboot: Add a 'go' subcommand
Split out the code that actually boots linux into a separate sub-command.
Add base_ptr to the state to support this.

Show an error if the boot fails, since this should not happen.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:08 +08:00
Simon Glass
5588e776b0 x86: zboot: Set up a sub-command structure
Add subcommands to zboot. At present there is only one called 'start'
which does the whole boot. It is the default command so is optional.

Change the 's' string variable to const while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reduce maxargs to 6 of 'zboot start' subcommand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:08 +08:00