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88141 commits

Author SHA1 Message Date
Siddharth Vadapalli
9a07d2df76 configs: j7200_evm_a72: Enable configs for SGMII support with MAIN CPSW0
The MAIN CPSW0 instance of CPSW Ethernet Switch on TI's J7200 SoC
supports SGMII mode. To enable support for utilizing the SGMII
daughtercard with TI's DP83869 PHY, enable the corresponding config.

Also, since the SGMII daughtercard is connected to the I2C GPIO
Expander 2 connector on the J7200 EVM, powering on the Ethernet PHY and
resetting it requires GPIO Hogging capability. Enable it as well.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Siddharth Vadapalli
cb6f4bbe3f phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J721E
Enable full rate divider configuration support for J721E_WIZ_16G for SGMII.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Siddharth Vadapalli
0914616156 phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200
Select the same mac divider for SGMII too as the one being used for
QSGMII.

Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Suman Anna
8a5fe04495 net: ti: am65-cpsw-nuss: Add logic to support MDIO reset
Enhance the AM65 CPSW NUSS driver to perform a MDIO reset using a GPIO
line. Logic is also added to perform a pre and post delay around reset
using the optional 'reset-delay-us' and 'reset-post-delay-us' properties.
This is similar to the reset being performed in the Linux kernel. The
reset is done once when the CPSW MDIO bus is being initialized.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Siddharth Vadapalli
0131c90214 net: ti: am65-cpsw-nuss: Add support for SGMII mode
Add support for configuring the CPSW Ethernet Switch in SGMII mode.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Suman Anna
066e860bc7 dma: ti: Update J21E PSIL endpoint information for MAIN CPSW0
The PSIL endpoint data for J721E currently covers only the MCU domain
CPSW0 instance. Add the data for the MAIN domain CPSW0 as well to allow
the MAIN domain Ethernet ports to be usable on any platform using J721E
SoC.

Additionally, since J721E's PSIL endpoint data is applicable to J7200
SoC as well, the MAIN CPSW0 instance on J7200 will also be usable now.

Signed-off-by: Suman Anna <s-anna@ti.com>
[s-vadapalli@ti.com: Update commit message indicating support for J7200]
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Tom Rini
bdc682437a Merge branch '2023-08-14-assorted-general-updates' into next
- Assorted PCI-related fixes, add Apple Type-C PHY support, semihosting
  updates, fix a FAT corner-case, update the help on the pxe cmd and
  clean up the gpio uclass slightly.
2023-08-15 10:39:41 -04:00
Tom Rini
51171cdd6d Enhance bootmeth_cros
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Merge tag 'dm-next-14aug23' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

Enhance bootmeth_cros
2023-08-14 21:39:08 -04:00
Marek Vasut
aaf5b59230 gpio: Use separate bitfield array to indicate GPIO is claimed
The current gpio-uclass design uses name field in struct gpio_dev_priv as
an indicator that GPIO is claimed by consumer. This overloads the function
of name field and does not work well for named pins not configured as GPIO
pins.

Introduce separate bitfield array as the claim indicator.

This unbreaks dual-purpose AF and GPIO operation on STM32MP since commit
2c38f7c318 ("pinctrl: pinctrl_stm32: Populate uc_priv->name[] with pinmux node's name")
where any pin which has already been configured as AF could no longer be
claimed as dual-purpose GPIO. This is important for pins like STM32 MMCI
st,cmd-gpios .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
f7ee9f3d36 test: unit test for semihosting
Provide a unit test for semihosting testing reading and writing a file.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
cf159fe0b6 configs: enable SEMIHOSTING on qemu_arm64_defconfig
We need a platform on which we can test our semihosting code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-08-14 17:55:53 -04:00
Bin Meng
eed99ce360 cmd: pxe: Update the command help
Currently the "help" displays pxe command help text like this:

  => help
  ...
  printenv  - print environment variables
  pxe       - commands to get and boot from pxe files
  To use IPv6 add -ipv6 parameter
  qfw       - QEMU firmware interface
  ...

This does not read clearly. Remove the IPv6 stuff as it is in
the detailed help text so that it fits just a single line.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-14 17:55:53 -04:00
Sergei Antonov
852467de92 pci: ftpci100: add new driver implementation
Add a new DM driver supporting FTPCI100 IP used in SoC designs.
This implementation is not based on the old non-DM ftpci100 code
dropped from U-Boot.

Enable the driver in sandbox_defconfig to test compilability.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
84032b6759 fs: fat: avoid multiplication overflow
The product of two 32 bit integers is a 32 bit integer. Hence
clustcount * bytesperclust may overflow on > 4 GiB devices.

Change the type of clustcount.

Fixes: cb8af8af5b ("fs: fat: support write with non-zero offset")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
688d62bfc8 spl: add FIT support to semihosting boot method
Allow loading a FIT image via semihosting in SPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-14 17:55:53 -04:00
Marek Vasut
8ee830d898 pci: Fix device_find_first_child() return value handling
This function only ever returns 0, but may not assign the second
parameter. Same thing for device_find_next_child(). Do not assign
ret to stop proliferation of this misuse.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-14 17:55:52 -04:00
Mark Kettenis
b99c635787 phy: Add support for the Apple Type-C PHY
This is merely a dummy driver that makes sure the DWC3 XHCI driver
finds its reset and PHY controllers.  We rely on iBoot to set up
the PHY for us.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-08-14 17:51:51 -04:00
Mark Kettenis
815ce125a4 pci: apple: Enable CONFIG_SYS_PCI_64BIT
The Apple hardware supports 64-bit prefetchable memory windows so
enable CONFIG_SYS_PCI_64BIT. This fixes BAR assignments for the
Broadcom Ethernet controller used in some of the desktop machines.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-08-14 17:51:50 -04:00
Tom Rini
831a80c2af Merge branch '2023-08-14-keep-fixed-gpio-regulator-count-in-balance' into next
To quote the author:

The commit 4fcba5d556 ("regulator: implement basic reference counter")
have made it more important to keep fixed/gpio regulators enable/disable
state in balance.

This series fixes an inbalance in the mmc_dw driver and changes to use
the more relaxed regulator_set_enable_if_allowed function for a few
other drivers.

The regulator_set_enable_if_allowed function is more relaxed and will
return ENOSYS if the provided regulator is NULL or when DM_REGULATOR
was disabled. Using the following call convention should be safe:

  ret = regulator_set_enable_if_allowed(<supply>, <true|false>);
  if (ret && ret != -ENOSYS)
          return ret;
2023-08-14 09:14:51 -04:00
Jonas Karlman
01b2917a19 mmc: dw_mmc: Keep vqmmc-supply enable count in balance
With the commit 4fcba5d556 ("regulator: implement basic reference
counter"), keeping regulator enablement in balance become more important.

Disable vqmmc-supply before signal voltage is changed to keep regulator
enable counter in balance.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-08-14 09:14:41 -04:00
Jonas Karlman
9a2e9cc659 mmc: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # P895 Tegra 3;
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # rockpro64-rk3399
2023-08-14 09:14:41 -04:00
Jonas Karlman
0830333c47 usb: ehci-generic: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-08-14 09:14:41 -04:00
Jonas Karlman
335799b725 usb: dwc2: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # rockpro64-rk3399
Reviewed-by: Marek Vasut <marex@denx.de>
2023-08-14 09:14:41 -04:00
Jonas Karlman
d82cbc596e adc: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # rockpro64-rk3399
2023-08-14 09:14:41 -04:00
Simon Glass
daffb0be2c bootstd: cros: Add ARM support
Support booting ChromiumOS on ARM devices using FIT. Add an entry into the
boot implementation which does not require a command line. This can be
expanded over time as the bootm code is refactored.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-11 07:33:40 -06:00
Simon Glass
c279224ea6 bootstd: Add a command to read all files for a bootflow
Some bootflows (such as EFI and ChromiumOS) delay reading the kernel until
it is needed to boot. This saves time when scanning and avoids needing to
allocate memory for something that may never be used.

To permit reading of these files, add a new 'bootflow read' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-11 07:33:38 -06:00
Simon Glass
cbb607d2d9 bootstd: Allow display of the x86 setup information
Provide an option to dump this information if available.

Move the funciion prototype to the common x86 header. Allow the command
line to be left out since 'bootflow info' show this itself and it is
not in the correct place in memory until the kernel is actually booted.

Fix a badly aligned heading while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
598dea978d bootstd: cros: Split up reading info and kernel
Use the two new functions to separate reading of the ChromiumOS info from
the partition from actually reading the kernel and booting it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
074503c40a bootstd: cros: Add a function to read a kernel
The code to read the ChromiumOS information from the partition is
currently all in one function.

Create a new function which reads the kernel, assuming that the metadata
has been parsed.

For now this function is not used. Future work will plumb it in.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
f861b1ee70 bootstd: cros: Add a function to read info from partition
The code to read the ChromiumOS information from the partition is
currently all in one function. It reads the entire kernel, which is
unnecessary unless it is to be booted.

Create a new function which reads just the minimum required data from the
disk, then obtains what it needs from there.

For now this function is not used. Future work will plumb it in.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
76bd6844dc bootstd: Add private bootmeth data to the bootflow
Some bootmeths need to store their own information related to the
bootflow, in addition to the generic information in struct bootflow.
Add a pointer for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
1d4bbdf3e4 bootstd: cros: Add private info for ChromiumOS
Create a new private structure to hold information gleaned from the disk.
This will allow separation between reading of the bootflow information and
(later) reading the whole kernel.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
b7ed5386a4 bootstd: cros: Add docs for the kernel layout
Provide brief documentation about the ChromiumOS kernel layout.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
1a0810924a bootstd: Move common zimage functions to bootm.h
We want to avoid using #ifdefs around header files and in the code. It
makes sense to collect the various functions used for loading images into
a single header which can be included by all architectures. The best place
for this is the arch-neutral bootm.h header, so use that.

Move some zimage functions into this bootm.h header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
c5dca50bbb bootstd: cros: Simplify setup and cmdline expressions
Create a common base from which the other parts are offset and make all
of the offsets related to that. This makes the code a little easier to
read.

Use X86_ prefixes for the two values which are x86-specific.

Drop OFFSET_BASE since it is available in a header field.

Drop the unnecessary 'start' variable too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
3257835e56 bootstd: cros: Decode some kernel preamble fields
Decode the kernel start and size using the structures provided. This
accesses the same data, just in a cleaner way.

Add some logging for some of the fields in the kernel preamble.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
4cfe4510f1 bootstd: cros: Support a kernel on either partition
ChromiumOS allows a kernel to be on either partition 2 or 4. Add support
for scanning both and using the first one we find with a suitable
signature.

Record the partition which is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
de30aa9a2f bootstd: cros: Bring in some ChromiumOS structures
Add a header file with structures for booting ChromiumOS, taken from the
vboot tree. Using these makes it easier to understand the code.

Note that the code style has not been updated for U-Boot, with use of
uint64_t,  __attribute__((packed)) and one comment-style nit. This should
make it easier to keep the code in sync. It was taken from commit:

   5b8596ce ("2sha256_arm: Fix data abort issue")

Update the CHROMEOS string to use the defined values.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
5a8589ebd6 bootstd: cros: Move partition reading into a function
Move the code which reads a partition into its own function. Add a
constant for the number of bytes to 'probe' at the start of the partition.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Simon Glass
defa33ad29 bootstd: cros: Correct reporting of I/O errors
Return -EIO when the read failed, rather than the number of blocks read.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-10 18:34:54 -06:00
Tom Rini
321d7b4d87 Merge branch '2023-08-09-misc-cleanups' into next
- Rework the arch linker scripts to be consistent for all, support
  Kconfig fragments in the board directory and fix some Kconfig options
  that were hex-type by default of 0 not 0x0.
2023-08-09 13:15:51 -04:00
Jason Kacines
06b51f77f5 scripts: kconfig: Add config fragment support in board/../
Add support to config fragments (.config) located in the /board
directory. This will allow only base defconfigs to live in /configs and
all fragments to live in their respective device directory in /board/..

Signed-off-by: Jason Kacines <j-kacines@ti.com>
2023-08-09 09:21:42 -04:00
Shiji Yang
ccea96f443 treewide: unify the linker symbol reference format
Now all linker symbols are declared as type char[]. Though we can
reference the address via both the array name 'var' and its address
'&var'. It's better to unify them to avoid confusing developers.
This patch converts all '&var' linker symbol refrences to the most
commonly used format 'var'.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-09 09:21:42 -04:00
Shiji Yang
506df9dc58 treewide: rework linker symbol declarations in sections header
1. Convert all linker symbols to char[] type so that we can get the
   corresponding address by calling array name 'var' or its address
   '&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
   not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
   only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
   standard header file to declare them.

[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL

Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-09 09:21:42 -04:00
Tom Rini
a077ac13d0 Kconfigs: Correct default of "0" on hex type entries
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0".  However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-09 09:21:42 -04:00
Tom Rini
1e1437d9f8 Merge branch '2023-08-08-assorted-code-corrections' into next
- A number of code corrections caught by Smatch and a few others as
  well.
2023-08-08 21:38:05 -04:00
Heinrich Schuchardt
70fdcc704a pci: correct function name in message
If an error message contains a function name, it should match the name of
the function throwing the message.

Fixes: 7739d93d82 ("pci: Match region flags using a mask")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-08 17:41:52 -04:00
Bin Meng
d8cb1dc914 board_f: Cosmetic style fix
Some coding convention fixes for print_resetinfo().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-08 17:41:52 -04:00
Ilya Lukin
1a549c8961 crc32: Drop duplicates crc header includes
Fixes: 3db7110857 ("crc32: Use the crc.h header for crc functions")
Signed-off-by: Ilya Lukin <4.shket@gmail.com>
2023-08-08 17:41:52 -04:00
Dan Carpenter
08404fa208 btrfs: fix some error checking for btrfs_decompress()
The btrfs_decompress() function mostly (u32)-1 on error but it can
also return -EPERM or other kernel error codes from zstd_decompress().
The "ret" variable is an int, so we could just check for negatives.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2023-08-08 17:41:52 -04:00