Stefan Roese
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e0a46554c3
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* PPC405EP: Add CFG_GPIO0_OR, CFG_GPIO0_ODR to setup GPIO completely.
- Add configuration of Open Drain GPIO Output selection
- Add configuration of initial value of GPIO output pins
Patch by Tolunay Orkun, 07 Apr 2006
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2006-10-12 20:09:27 +02:00 |
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Stefan Roese
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a4c8d1389f
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Add support for PCS440EP board
Patch by Stefan Roese, 02 Jun 2006
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2006-06-02 16:20:36 +02:00 |
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Wolfgang Denk
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d87080b721
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GCC-4.x fixes: clean up global data pointer initialization for all boards.
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2006-03-31 18:32:53 +02:00 |
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Stefan Roese
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d6c61aabc4
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Merged 405gp_enet.c and 440gx_enet.c to generic 4xx_enet.c
now handling all 4xx cpu's.
Patch by Stefan Roese, 16 Aug 2005
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2005-08-16 18:18:00 +02:00 |
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Stefan Roese
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846b0dd2dc
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Changed CONFIG_440_xx to CONFIG_440xx for a consistent design (405 and linux)
Patch by Stefan Roese, 08 Aug 2005
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2005-08-08 12:42:22 +02:00 |
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Stefan Roese
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c157d8e219
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Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.
Patch by Steven Blakeslee, 27 Jul 2005
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2005-08-01 16:41:48 +02:00 |
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stroese
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3720878599
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- Fix bug for initial stack in data cache as pointed out by Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in data cache can be used even if the chip select is in use.
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2003-06-05 15:35:20 +00:00 |
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stroese
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b867d705b6
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PPC405EP support added.
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2003-05-23 11:18:02 +00:00 |
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stroese
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baa3d528fe
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Changed PPC405GPr version from A to B.
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2003-04-04 16:00:33 +00:00 |
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stroese
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38daa27d21
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Set edge conditioning circuitry on PPC405GPr for compatibility to existing PPC405GP designs.
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2003-03-20 15:21:50 +00:00 |
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wdenk
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4a9cbbe832
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Initial revision
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2002-08-27 09:48:53 +00:00 |
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