Commit graph

89074 commits

Author SHA1 Message Date
Simon Glass
1b1d36ec58 bootstd: Keep track of use of usb stop
When 'usb stop' is run, doing 'bootflow scan' does not run the USB hunter
again so does not see any devices. Fix this by telling bootstd about the
state of USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-22 06:05:40 +08:00
Simon Glass
8c11d19e75 x86: smbios: Add a Kconfig indicating SMBIOS-table presence
When booted from coreboot, U-Boot does not build the SMBIOS tables, but
it should still pass them on to the OS. Add a new option which indicates
whether SMBIOS tables are present, however they were built.

Flip the ordering so that the dependency is listed first, which is less
confusing.

Adjust GENERATE_SMBIOS_TABLE to depend on this new symbol.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
53e8e6f986 efi: x86: Correct the condition for installing ACPI tables
It is not always the case that U-Boot builds the ACPI tables itself. For
example, when booting from coreboot, the ACPI tables are built by
coreboot.

Correct the Makefile condition so that U-Boot can pass on tables built
by a previous firmware stage.

Tidy up the installation-condition code while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
3fef0def84 x86: coreboot: Enable VIDEO_COPY
At least on modern machines the write-back mechanism for the frame buffer
is quite slow when scrolling, since it must read the entire frame buffer
and write it back.

Enable the VIDEO_COPY feature to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
85c35c794e x86: coreboot: Align options between coreboot and coreboot64
These two builds are similar but have some different options for not good
reason. Line them up to be as similar as possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
9a1447d85e x86: coreboot: Drop USB init on startup
This is very annoying as it is quite slow on many machines. Also, U-Boot
has an existing 'preboot' mechanism to enable this feature if desired.

Drop this code so that it is possible to choose whether to init USB or
not.

Use the existing USE_PREBOOT mechanism instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
028d1f8dc2 x86: coreboot: Enable CONFIG_SYS_NS16550_MEM32
The debug UART on modern machines uses a 32-bit wide transfer. Without
this, setting debug output causes a hang or no output. It is not obvious
(when enabling CONFIG_DEBUG_UART) that this is needed.

Enable 32-bit access to avoid this trap.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
b1350636e6 x86: coreboot: Look for DBG2 UART in SPL too
If coreboot does not set up sysinfo for the UART, SPL currently hangs.
Use the DBG2 technique there as well. This allows coreboot64 to boot from
coreboot even if the console info is missing from sysinfo

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
0c45c76ced x86: Allow APCI in SPL
This is needed so we can find the DBG2 table provided by coreboot. Add a
Kconfig so it can be enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
8ebca32b2d x86: Set the CPU vendor in SPL
We don't read this information in 64-bit mode, since we don't have the
macros for doing it. Set it to Intel by default. This allows the TSC timer
to work correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
2c6b979ec1 x86: coreboot: Rearrange arch_cpu_init()
Init errors in SPL are currently ignored by this function.

Change the code to init the CPU, reporting an error if something is wrong.
After that, look for the coreboot table.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
04ecda0e1d x86: coreboot: Enable standard boot
Enable bootstd options and provide instructions on how to boot a linux
distro using coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
350c0df30d x86: coreboot: Add IDE and SATA
Add these options to permit access to more disk types.

Add some documentation as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
fb5cfbe17d x86: Update cbmem driver
This driver is not actually built since a Kconfig was never created for
it.

Add a Kconfig (which is already implied by COREBOOT) and update the
implementation to avoid using unnecessary memory. Drop the #ifdef at the
top since we can rely on Kconfig to get that right.

To enable it (in addition to serial and video), use:

   setenv stdout serial,vidconsole,cbmem

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Modified the comment about overflow a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
7739b2793b x86: coreboot: Document cbmem console struct
Coreboot changed a few years ago to include an overflow flag. Update the
structure to match this.

This comes from coreboot commit:

   6f5ead14b4 ("mb/google/nissa/var/joxer: Update eMMC DLL settings")

Note: There are several implementations of this in coreboot. I have chosen
to follow the one in src/lib/cbmem_console.c

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
35307ba776 x86: doc: Update the list of supported Chromebooks
One is missing, so add it. Also mention the SoC used in each.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
6acc072365 x86: dm: Mark driver model as dead when disabling CAR
When turning off CAR, set the flag to make sure that nothing tries to use
driver model in SPL before jumping to U-Bot proper, since its tables are
in CAR.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
cd1ee5d96e x86: broadwell: Set up MTRRs
The current condition does not handle the samus_tpl case where it sets
up the RAM in SPL but needs to commit the MTRRs in U-Boot proper.

Add another case to handle this and update the comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
3ca9b86e23 x86: broadwell: Avoid initing the CPU twice
When TPL has already set up the CPU, don't do it again. This existing
code actually has this backwards, so fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
623b3e8f97 x86: spl: Change the condition for copying U-Boot to RAM
Make this depend on whether the address matches the offset, rather than
a particular board build. For samus_tpl we don't need to copy, for
example.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
9d69324e7f x86: samus_tpl: Correct text base and alloc sizes
Make sure that CONFIG_X86_OFFSET_U_BOOT is the same as CONFIG_TEXT_BASE
as it is changing CONFIG_X86_OFFSET_U_BOOT

Samus boots into U-Boot proper in flash, not RAM. Also expand the SPL
malloc() size a little, to avoid an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
02de9199bc x86: Add some log categories
Add some missing log categories to a few files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
8e34ddc113 x86: broadwell: Show the memory delay
Samus only takes 7 seconds but it is long enough to think it has hung. Add
a message about what it is doing, similar to the approach on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
15a23b6f16 dm: core: Allow marking driver model as dead
On x86 devices we use CAR (Cache-As-RAM) to hold the malloc() region in
SPL, since SDRAM is not set up yet. This means that driver model stores
its tables in this region.

When preparing to jump from SPL to U-Boot proper, we must disable CAR, so
that the CPU can uses the caches normally. This means that driver model
tables become inaccessible. From there until we jump to U-Boot proper, we
must avoid using driver model.

This is only a problem on boards which operate this way, for example
chromebook_link64

Add a flag to indicate that driver model is dead and should not be used.
It can be used in SPL to avoid hanging the machine.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
9804e572cf x86: doc: Document the -cdrom issues I ran into
Add a note about using -cdrom with QEMU.

Suggested-by: Bin Meng <bmeng@tinylab.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
2023-09-22 06:03:46 +08:00
Andy Shevchenko
b95bc64b06 x86: Prevent from missing the FADT chaining
Recent approach with FADT writer shows that there is
a room for subtle errors. Prevent this from happening
again by introducing acpi_add_fadt() helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
2e977b2ce8 Reland "x86: Move FACP table into separate functions""
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.

Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-22 06:03:46 +08:00
Simon Glass
0879de0e8b x86: coreboot: Avoid a declaration after a label
Declare the global_data pointer at the top of the file, to avoid an
error:

   arch/x86/include/asm/global_data.h:143:35: error: a label can
      only be part of a statement and a declaration is not a statement
   board/coreboot/coreboot/coreboot.c:60:2: note: in expansion of macro
      ‘DECLARE_GLOBAL_DATA_PTR’

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
48bf738e36 Allow Python packages to be dropped
When building in a portage chroot, we do not have the environment needed
to build pylibfdt. It is instead build as a separate package.

Provide a build option to tell U-Boot to skip this part of the build. We
still need it to use binman, etc. but don't need it to build its
dependencies.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
[s/build bytes/builds bytes in tools.rst]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Thomas Mittelstaedt
1a075d4e0d x86: pxeboot: bugfix: Set variable for size of initrd
The problem was, that zboot() didn't work because of missing
ramdisc size.

Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-22 06:03:46 +08:00
Thomas Mittelstaedt
fde0df92b5 x86: efi-payload64: Add bootstd support
Enable bootstd support for U-Boot at VirtualBox described at
https://source.denx.de/u-boot/u-boot/-/blob/master/doc/develop/bootstd.rst

This is used to boot system images at Virtualbox via
- distroboot (extlinux.conf)
- boot script

Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Thomas Mittelstaedt
c323921ba9 x86: efi-payload64: Add support for SCSI devices
U-Boot at VirtualBox must load Linux and boot configuration from disk devices.
Here the discs at AHCI (scsi) bus are used to load the needed boot data.

Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag and rebased on top of u-boot/master]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Troy Kisky
5c39f2c150 x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI)
This avoids an error when ifdef CONFIG_PCI is changed to
if CONFIG_IS_ENABLED(PCI)

Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
[Rebased on top of u-boot/master]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Tom Rini
d01a8541d6 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Fixup memory size passed to kernel on visionfive2
2023-09-21 15:56:47 -04:00
Tom Rini
5d2fae79c7 Xilinx changes for v2024.01-rc1
clk:
 - Dont return error when assigned-clocks is empty or missing
 
 dm:
 - Support reading a single indexed u64 value
 - Add support for reading bootscript address/flash address from DT
 
 cmd:
 - Fix flash_is_unlocked API
 
 fpga:
 - Define fpga_load() for debug build
 
 global:
 - U-Boot project name cleanup (next2)
 
 net:
 - zynq_gem: Use generic_phy_valid() helper
 - axienet: Convert to ofnode functions
 - gmii2rgmii: Read bridge address from DT
 
 pytest:
 - skip tpm2_startup when env__tpm_device_test_skip=True
 
 spi-nor:
 - Add mx25u25635f support
 - zynqmp_qspi: Tune cache behavior
 
 trace:
 - Fix flyrecord alignment issue
 
 xilinx:
 - Move scriptaddr to DT as bootscr-address
 - Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
 - Do not generate distro boot variables if disabled
 
 versal:
 - Extend memory ranges to cover HBM
 - Enable TPM, sha1sum and KASLRSEED
 - Fix distroboot prioritization in connection to available devices
 - Clean mini targets bootcommand
 - Fix clock driver
 
 versal-net:
 - Enable TPM, sha1sum and KASLRSEED
 - Fix distroboot prioritization in connection to available devices
 
 zynqmp;
 - Allow AES to run from SPL
 - Enable CMD_KASLRSEED
 - Add proper dependencies for USB and remove ZYNQMP_USB
 - Fix user si570 default frequency for zcu* boards
 - Cover SOM rev2 revision
 - Various DT changes
 - Add firmware and pinctrl support for tristate configuration
   (high impedance/output enable)
 - Add output-enable pins to SOMs
 - Fix distroboot prioritization in connection to available devices
 - Read bootscript address/flash address from DT
 - Fix pcap_prog address
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Merge tag 'xilinx-for-v2024.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2024.01-rc1

clk:
- Dont return error when assigned-clocks is empty or missing

dm:
- Support reading a single indexed u64 value
- Add support for reading bootscript address/flash address from DT

cmd:
- Fix flash_is_unlocked API

fpga:
- Define fpga_load() for debug build

global:
- U-Boot project name cleanup (next2)

net:
- zynq_gem: Use generic_phy_valid() helper
- axienet: Convert to ofnode functions
- gmii2rgmii: Read bridge address from DT

pytest:
- skip tpm2_startup when env__tpm_device_test_skip=True

spi-nor:
- Add mx25u25635f support
- zynqmp_qspi: Tune cache behavior

trace:
- Fix flyrecord alignment issue

xilinx:
- Move scriptaddr to DT as bootscr-address
- Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
- Do not generate distro boot variables if disabled

versal:
- Extend memory ranges to cover HBM
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
- Clean mini targets bootcommand
- Fix clock driver

versal-net:
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices

zynqmp;
- Allow AES to run from SPL
- Enable CMD_KASLRSEED
- Add proper dependencies for USB and remove ZYNQMP_USB
- Fix user si570 default frequency for zcu* boards
- Cover SOM rev2 revision
- Various DT changes
- Add firmware and pinctrl support for tristate configuration
  (high impedance/output enable)
- Add output-enable pins to SOMs
- Fix distroboot prioritization in connection to available devices
- Read bootscript address/flash address from DT
- Fix pcap_prog address
2023-09-21 10:51:58 -04:00
Tom Rini
bcfde74974 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
+ Add NVMe & USB boot devices for VisionFive2
+ Add StarFive SPL image support in mkimage tool
2023-09-21 10:51:15 -04:00
Venkatesh Yadav Abbarapu
a3ade3dae4 spi: zynqmp_qspi: Workaround for small data cache issue
Cache related issues are seen with small sized data reads.
Due to this, proper data is not read. Also some times sf probe
fails randomly. To workaround this issue, invalidate dcache after read DMA
is triggered.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230915031759.28889-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:12 +02:00
Ashok Reddy Soma
638189ddea spi: zynqmp_qspi: Change flush cache to invalidate cache
Before DMA read, ideally cache should be invalidated, so that data from
memory will be updated to cache after DMA is completed. But
flush_dcache_range is being used which is incorrect. Change
flush_dcache_range to invalidate_dcache_range.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230915031759.28889-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:12 +02:00
Michal Simek
8750d35ee2 trace: Fix alignment logic in flyrecord header
Current alignment which is using 16 bytes is not correct in connection to
trace_clocks description and it's length.
That's why use start_addr variable and record proper size based on used
entries.

Fixes: be16fc81b2 ("trace: Update proftool to use new binary format").
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/691dad64df80993ca4cfb6d0e33964ed26f50bee.1694779918.git.michal.simek@amd.com
2023-09-21 13:20:12 +02:00
Michal Simek
ad0f3cdc21 trace: Move trace_clocks description above record offset calculation
Flyrecord tracing data are page aligned that's why it is necessary to
calculate alignment properly. Because trace_clocks description is the part
of record length it is necessary to have information about length earlier.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d3853d91b6fa7e3a1e5c24dd3c17335cf0041b5b.1694779918.git.michal.simek@amd.com
2023-09-21 13:20:12 +02:00
Michal Simek
dee8739a1b trace: Use 64bit variable for start and len
tputq() requires variables to have 64bit width that's why make them 64bit
to clean alignment requirement.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6edb34ef1f10010d2380f964fb6b4fb3dc257799.1694779918.git.michal.simek@amd.com
2023-09-21 13:20:12 +02:00
Venkatesh Yadav Abbarapu
1290262292 cmd: sf: Fix the flash_is_unlocked api size parameter
When flash erase is called with size parameter, code is checking
if sectors are locked or not. But for checking, the whole device
length minus offset is used instead of actual size which should
be erased. That's why when only some sectors are locked it is
not possible to erase unlocked sectors.

The length is calculated as "length = max_chipsize - offset",
flash_is_unlocked() api is getting updated with length which is
incorrect. Fix this flash_is_unlocked() api by passing the size
parameter.

ZynqMP> sf erase 0 100000
len=0x8000000 which is flash size
size=0x100000

We need to update the size in the flash_is_unlocked() api and not
the length.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230920025450.6281-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:12 +02:00
Venkatesh Yadav Abbarapu
b764e84f9f zynqmp: config: Add proper dependencies for USB
When CONFIG_CMD_USB and CONFIG_USB are disabled, still some compilation
errors are seen as below.

In file included from include/configs/xilinx_zynqmp.h:173,
                 from include/config.h:3,
                 from include/common.h:16,
                 from env/common.c:10:
include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB'
  302 |         BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:302:9: note: in definition of macro
'BOOTENV_DEV_NAME_USB'
  302 |         BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/configs/xilinx_zynqmp.h:77:41: note: in expansion of macro
'BOOTENV_DEV_NAME'
   77 | # define BOOT_TARGET_DEVICES_USB(func)  func(USB, usb, 0)
   func(USB, usb, 1)
      |                                         ^~~~
include/configs/xilinx_zynqmp.h:168:9: note: in expansion of macro
'BOOT_TARGET_DEVICES_USB'
  168 |         BOOT_TARGET_DEVICES_USB(func) \
      |         ^~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:454:25: note: in expansion of macro
'BOOT_TARGET_DEVICES'
  454 |         "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0"
      |                         ^~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:474:9: note: in expansion of macro
'BOOTENV_BOOT_TARGETS'
  474 |         BOOTENV_BOOT_TARGETS \
      |         ^~~~~~~~~~~~~~~~~~~~
include/configs/xilinx_zynqmp.h:179:9: note: in expansion of macro
'BOOTENV'
  179 |         BOOTENV
      |         ^~~~~~~
include/env_default.h:120:9: note: in expansion of macro
'CFG_EXTRA_ENV_SETTINGS'
  120 |         CFG_EXTRA_ENV_SETTINGS
      |         ^~~~~~~~~~~~~~~~~~~~~~
In file included from env/common.c:32:
include/env_default.h:27:36: note: to match this '{'
   27 | const char default_environment[] = {
      |                                    ^
scripts/Makefile.build:256: recipe for target 'env/common.o' failed
make[1]: *** [env/common.o] Error 1
Makefile:1853: recipe for target 'env' failed
make: *** [env] Error 2
make: *** Waiting for unfinished jobs....

Add CONFIG_USB_STORAGE as dependency for USB related macro's such as
BOOT_TARGET_DEVICES_USB() and DFU_DEFAULT_POLL_TIMEOUT and
CONFIG_THOR_RESET_OFF.

Remove CONFIG_ZYNQMP_USB from Kconfig and also from defconfig since it
is not used anywhere else.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230904031528.11817-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:12 +02:00
Venkatesh Yadav Abbarapu
16794d3008 cmd: thordown: Add proper dependency for CMD_THOR_DOWNLOAD
When CONFIG_CMD_USB and CONFIG_USB are disabled some compilation errors are seen as below.

cmd/thordown.o: in function `usb_gadget_initialize':
include/linux/usb/gadget.h:981: undefined reference to `board_usb_init'
cmd/thordown.o: in function `do_thor_down':
cmd/thordown.c:68: undefined reference to `g_dnl_unregister'
cmd/thordown.o: in function `usb_gadget_release':
include/linux/usb/gadget.h:986: undefined reference to `board_usb_cleanup'
cmd/thordown.o: in function `do_thor_down':
cmd/thordown.c:41: undefined reference to `g_dnl_register'
cmd/thordown.c:48: undefined reference to `thor_init'
cmd/thordown.c:56: undefined reference to `thor_handle'
gnu/aarch64/lin/aarch64-linux/bin/aarch64-linux-gnu-ld.bfd: line 4:  8485
Segmentation fault      (core dumped) $CC --sysroot=$LIBC
--no-warn-rwx-segment "$@"
Makefile:1779: recipe for target 'u-boot' failed
make: *** [u-boot] Error 139
make: *** Deleting file 'u-boot'

Add dependency of USB_GADGET_DOWNLOAD for CONFIG_CMD_THOR_DOWNLOAD to fix the errors.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/r/20230904031528.11817-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:11 +02:00
Venkatesh Yadav Abbarapu
c7cce2606d clk: versal: Fix the function versal_clock_ref
For reference clocks, PM_CLK_GET_PARENT call is not allowed.
PM_CLK_GET_PARENT only allowed for MUX clocks. Rename the
versal_clock_ref() with versal_clock_get_ref_rate() for better
readability. Fix the versal_clock_get_ref_rate function by
passing the parent_id, and check whether the parent_id
belongs to ref_clk or pl_alt_ref_clk.
Also adding the function versal_clock_get_fixed_factor_rate()
if the clk_id belongs to the fixed factor clock.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230912033055.2549-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:11 +02:00
Thippeswamy Havalige
df2ed08b2d arm64: zynqmp: Update ECAM size to discover up to 256 buses
Update ECAM size to discover up to 256 buses

Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Acked-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/087391c3e1f60b0a765fca081d47ce632fda8f06.1694441445.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Srinivas Neeli
9e568e4110 arm64: zynqmp: Add resets property for CAN nodes
Added resets property for CAN nodes.

Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c4efb7ac361eec591a2f775e161ec446c4dc04c1.1694441445.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Saeed Nowshadi
0ec0c1e957 arm64: zynqmp: Fix i2c address for si570_user1 clock
Correct the i2c address for si570 oscillator that generates the si570_user1
clock. i2c address was changed by commit b6a8c603d680 ("arm64: zynqmp: Fix
i2c addresses for vck190 SC") because address in node name wasn't aligned
with reg property. But actual 0x5f address is correct which is quite rare
because all other si570s are at 0x5d.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6f31881b0e2dd657f0d4ff0869c009c2e1224f22.1694441445.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Amit Kumar Mahapatra
d282c1d9e7 arm64: versal: Add no-wp DT property in OSPI flash node
Added no-wp DT property in OSPI flash node for all board dts & dtsi files
on which the WP# signal of the OSPI flash device is not connected. If this
property is set, then the software will avoid setting the status register
write disable (SRWD) bit in status register during status register
write operation.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e88dd7b9306bdf0738b2248bf9017e1997d25dc.1694441445.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Michal Simek
cfc294c082 arm64: zynqmp: Rename xlnx, mio_bank to xlnx, mio-bank for DLC21
xlnx,mio_bank was used in past but it was renamed to xlnx,mio-bank because
'_' in property shoudln't be used. There is no impact on the platform
because if the properly is not defined bank 0 is default. Bank 0 and 1 have
the same configuration that's why there shouldn't be any issue.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ace68d4b7701d1606a85cb18242409fce941b363.1694441445.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00