Commit graph

236 commits

Author SHA1 Message Date
Moritz Fischer
147f785f67 cros_ec: i2c: Add support for version 3 of the EC protocol
Add support for version 3 of the ec protocol. It basically works by
stitching some additional header in front (special command code),
and having a result and packet_length stitched on for the reply.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
Tested on snow:
Tested-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:16 -07:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Moritz Fischer
e9b25f2ea1 cros_ec: i2c: Group i2c write / read into single transaction
Replace dm_i2c_write() / dm_i2c_read() with transaction using
struct i2c_msg[2] in order to allow for i2c controller to detect
write/read cycle to emit a repeated start condition.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
Tested on snow:
Tested-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:07:13 -07:00
Simon Glass
42fd8c19b5 x86: Use unsigned long for address in table generation
We should use unsigned long rather than u32 for addresses. Update this so
that the table-generation code builds correctly on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Uri Mashiach
2d8d190c83 status_led: Kconfig migration
Move all of the status LED feature to drivers/led/Kconfig.
The LED status definitions were moved from the board configuration
files to the defconfig files.

TBD: Move all of the definitions in the include/status_led.h to the
relevant board's defconfig files.

Tested boards: CL-SOM-AM57x, CM-T335

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2017-01-21 15:12:33 -05:00
Peng Fan
b2ebdd85d9 OCOTP: Update OCOTP driver to support i.MX6SLL
Add the i.MX6SLL support to OCOTP driver.

The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words
each, and there is a hole between bank 5 and bank 6.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2016-12-16 11:38:24 +01:00
Moritz Fischer
a2558e8729 cmd: crosec: Move cros_ec_decode_region helper to cmd/cros_ec.c
The cros_ec_decode_region() function is only used in combination
with the crosec cmds. Move the function to the correct place.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
2016-12-02 21:04:48 -07:00
Tom Rini
79493609c5 Merge git://git.denx.de/u-boot-dm 2016-10-12 20:48:43 -04:00
Tom Rini
711b534120 Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/ls1021aqds.h
	include/configs/ls1021atwr.h
2016-10-12 08:29:42 -04:00
Moritz Fischer
bfeba0173a cmd: cros_ec: Move crosec commands to cmd subdirectory
Move crosec commands from drivers/misc/cros_ec.c to
cmd/cros_ec.c

Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Miao Yan <yanmiaobest@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: u-boot@lists.denx.de
2016-10-11 10:17:08 -06:00
Moritz Fischer
bae5b97e8e cros_ec: Fix issue with cros_ec_flash_write command
This commit fixes an issue where data is written to an
invalid memory location.
The issue has been introduced in commit
(88364387 cros: add cros_ec_driver)

Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-09 09:30:32 -06:00
Moritz Fischer
7a71e4891d cros_ec: Add crosec flashinfo command
Add command to print out the flash info as reported by the
ec. The data read back includes size, write block size,
erase block size.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-09 09:30:32 -06:00
Moritz Fischer
281ca88fab cros_ec: Add function to read back flash parameters
Add support for reading back flash parameters as reported by
the ec.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-09 09:30:32 -06:00
Tom Rini
f5fd45ff64 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-10-08 09:33:37 -04:00
Moritz Fischer
6d1a718fdf cros_ec: Honor the google,remote-bus dt property
Boards where ECs that use a I2C port != 0 specify this in the
devicetree file via the google,remote-bus property.
Previously this was ignored and hardcoded to port 0.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-08 09:33:36 -04:00
Sumit Garg
b259732d36 fsl_sec_mon: Update driver for Security Monitor
Update the API's for transition of Security Monitor states. Instead
of providing both initial and final states for transition, just
provide final state for transition as Security Monitor driver will
take care of it internally.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
[York Sun: Reformatted commit message slightly]
Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06 09:54:14 -07:00
Peng Fan
f8b95731ff imx: ocotp: support i.MX6ULL
i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8,
while other banks use 256 bits. So we have to adjust the
word and bank index when accessing the bank 8.

When in command line `fuse read 8 0 1`, you can image
`fuse read 7 4 1` in the ocotp driver implementation for 6ULL.

When programming, we use word index, so need to fix bank7/8 programming
for i.mx6ull.

For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67.
But actully it should be (7 << 3 | 7) ---> 63.
So fix it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-10-04 15:41:00 +02:00
Stephen Warren
bd3ee84ac7 misc: implement Tegra CAR core driver
The Tegra CAR (Clock And Reset) module provides control of most clocks
and reset signals within the Tegra SoC. This change implements a driver
for this module. However, since the module implements multiple kinds of
services (clocks, resets, perhaps more), all this driver does is bind
various sub-devices, which in turn provide the real services. This driver
is essentially an "MFD" (Multi-Function Device) in Linux kernel speak.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:02 -07:00
Tom Rini
cbe7706ab8 Merge git://git.denx.de/u-boot-fsl-qoriq
trini: Drop local memset() from
examples/standalone/mem_to_mem_idma2intr.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-26 17:10:56 -04:00
Masahiro Yamada
1221ce459d treewide: replace #include <asm/errno.h> with <linux/errno.h>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 17:55:42 -04:00
York Sun
b63a950629 armv8: ls2080a: Remove debug server support
Debug server feature has been dropped from roadmap.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:19 -07:00
Stefan Roese
4cf9e464f7 misc: Add simple driver for some Nuvoton NCT6102D devices
This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
2016-08-16 11:44:09 +08:00
Stephen Warren
73dd5c4cfe misc: add Tegra BPMP driver
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:12 -07:00
Tom Rini
f4b0df1823 Merge git://git.denx.de/u-boot-dm 2016-08-12 16:00:50 -04:00
Stephen Warren
b647f55420 misc: add "call" uclass op
The call op requests that the callee pass a message to the underlying HW
or device, wait for a response, and then pass back the response error code
and message to the callee. It is useful for drivers that represent some
kind of messaging or IPC channel to a remote device.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 11:01:22 -06:00
Max Filippov
b25732c22b drivers/sysreset: group sysreset drivers
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:22:17 -04:00
Simon Glass
911954859d dm: Use dm_scan_fdt_dev() directly where possible
Quite a few places have a bind() method which just calls dm_scan_fdt_dev().
We may as well call dm_scan_fdt_dev() directly. Update the code to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:54 -06:00
Simon Glass
2e3f1ff63f dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()
This new function is more convenient for callers, and handles pre-relocation
situations automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:07 -06:00
mario.six@gdsys.cc
d7e28918aa i2c_eeprom: Add reading support
This patch implements the reading functionality for the generic I2C
EEPROM driver, which was just a non-functional stub until now.

Since the page size will be of importance for the writing support, we
add suitable members to the private data structure to keep track of it.

Compatibility strings for a range of at24c* chips are added.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2016-07-22 09:52:59 -04:00
Simon Glass
2c9dfb5807 sandbox: Don't bring in the eeprom emulator in SPL
This driver should not be used in SPL since we do not have I2C support
enabled in SPL on sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Simon Glass
bab8233a1d dm: sandbox: Add a simple driver to test of-platdata
Add a driver which uses of-platdata to obtain its platform data. This can
be used to test the feature in sandbox. It displays the contents of its
platform data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Simon Glass
920c6965d1 sandbox: Find keyboard driver using driver model
The cros-ec keyboard is always a child of the cros-ec node. Rather than
searching the device tree, looking at the children. Remove the compat string
which is now unused.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Tom Rini
3fc304b8d7 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-06-12 12:51:34 -04:00
Simon Glass
5c0862155c reset: Drop the reset failure message
This adds to code size and is not needed, since hang() will print a message.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:50:29 -06:00
Stephen Warren
1163625898 Rename reset to sysreset
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:48:31 -06:00
Peng Fan
bff7550331 ocotp: mxc: use simpler runtime cpu dection macros
Use simpler runtime cpu dection macros.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-05-24 14:59:57 +02:00
Miao Yan
eece493a7a cmd: qfw: bring ACPI generation code into qfw core
Loading ACPI table from QEMU's fw_cfg interface is not x86 specific
(ARM64 may also make use of it). So move the code to common place.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Miao Yan
1868659002 cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]
Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Miao Yan
2e82e745a4 x86: qemu: move x86 specific operations out of qfw core
The original implementation of qfw includes several x86 specific
operations, like directly calling outb/inb and using some inline
assembly code which prevents it being ported to other architectures.

This patch adds callback functions and moves those to arch/x86/

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Miao Yan
fcf5c04193 x86: qemu: split qfw command interface and qfw core
This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.

Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Tom Rini
88033d737d Merge git://git.denx.de/u-boot-dm 2016-03-14 19:21:44 -04:00
Simon Glass
73223f0e1b Kconfig: Move CONFIG_FIT and related options to Kconfig
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.

Move these options to Kconfig and tidy up board configuration:

   CONFIG_FIT
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_FIT_SIGNATURE
   CONFIG_FIT_BEST_MATCH
   CONFIG_FIT_VERBOSE
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_RSA

Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.

Note: Masahiro's moveconfig.py script is amazing.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-03-14 19:18:07 -04:00
Simon Glass
3f603cbbb8 dm: Use uclass_first_device_err() where it is useful
Use this new function in places where it simplifies the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-14 15:34:50 -06:00
Bin Meng
98af34f897 superio: Add SMSC SIO1007 driver
The SMSC SIO1007 superio chipset integrates two ns16550 compatible
serial ports for legacy applications, 16 GPIO pins and some other
functionalities like power management.

This adds a simple driver to enable serial port and handle GPIO.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-21 13:42:52 +08:00
Stefan Roese
85056932f2 misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-28 13:53:30 +08:00
Simon Glass
d7248c42f1 cros_ec: Disable the Chrome OS EC in SPL
This is not used in SPL so don't allow it to be built there, even if I2C
is enabled in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
5fd6badbd2 dm: Add a power sequencing uclass
Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Tom Rini
5b8031ccb4 Add more SPDX-License-Identifier tags
In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously.  Convert all of these to the correct SPDX-License-Identifier
tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-19 08:31:21 -05:00
Simon Glass
24b852a7a2 Move console definitions into a new console.h file
The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:27:50 -07:00
Daniel Schwierzeck
3f51a772d4 sandbox: cros_ec: fix uninitialized use of len
Building with gcc-5.2 raises this warning:

drivers/misc/cros_ec_sandbox.c: In function cros_ec_sandbox_packet:
drivers/misc/cros_ec_sandbox.c:483:5: warning: len may be used uninitialized in this function [-Wmaybe-uninitialized]
  if (len < 0)
     ^

If the function process_cmd() is called with
req_hdr->command == EC_CMD_ENTERING_MODE, the value of len will be
returned uninitialized.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:42 -07:00