Commit graph

77542 commits

Author SHA1 Message Date
Sunil V L
8efefcec00 efi_selftest: unit test for RISCV_EFI_BOOT_PROTOCOL
Add a test for the RISCV_EFI_BOOT_PROTOCOL.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-05 20:20:01 +01:00
Heinrich Schuchardt
de44d80e99 configs: disable UEFI for Colibri VF610
The size of the board file is limited to 520192 bytes. This conflicts with
the size requirement for the UEFI code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-02-05 20:20:01 +01:00
Tom Rini
3aaabfe9ff Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This is the promised second part of the sunxi PR for 2022.04, albeit
technially outside of the merge window. We were working on this full
steam since the beginning of the year, and it deserves to be merged,
I think.
The main attraction is support for the F1C100s SoC, which sports a
venerable ARM926 core. Support for this SoC and the LicheePi Nano board
has been in Linux for years, and U-Boot patches were posted mid last
year already.
The new SoC using ARMv5 also means that the bulk of the new code should
not touch any existing boards, although we did some refactorings first,
of course, which actually cleans up some existing sunxi code.

Compile tested for all 160 sunxi boards, and briefly tested on BananaPi M1,
OrangePi Zero, Pine64 and Pine-H64. Tested by others on their boards,
including F1C100s and F1C200s devices.
2022-02-03 23:24:31 -05:00
Icenowy Zheng
b6ffd58e45 configs: sunxi: Add support for Lichee Pi Nano
The Lichee Pi Nano is a board based on the F1C100s.
Add defconfigs for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
ce2b6c4481 ARM: dts: suniv: Add device tree files and bindings for F1C100s
Add device tree files for suniv and
Lichee Pi Nano it is a board based on F1C100s.
dt-bindings/dts are synced with 5.16.0

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
cfe673cda7 mach-sunxi: Add support for SUNIV architecture
Add support for the suniv architecture, which is newer ARM9 SoCs by
Allwinner. The design of it seems to be a mixture of sun3i, sun4i and
sun6i.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
2c699fe0d3 configs: sunxi: Add common SUNIV header
Adds support for SUNIV and the F1C100s.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
116e1ed1ab sunxi: board: Add support for SUNIV
Generic Timer Extension is not available on SUNIV.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
645ee3c25d sunxi: Add F1C100s DRAM initial support
Add support for F1C100s internal dram controller.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
5d35f0f254 ARM: sunxi: Add clock and uart to sunxi headers
This patch aims to add header files for the suniv.
The header files included add support for uart, and clocks.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
88998f7775 arm: arm926ej-s: Add sunxi code
Some Allwinner SoCs use ARM926EJ-S core.

Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Jesse Taube
0d4377fc92 mach-sunxi: Move timer code to mach folder
Both armv7 and arm926ejs use this timer code so move it to mach-sunxi.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Icenowy Zheng
508f75afb5 arm: arm926ej-s: start.S: port save_boot_params support from armv7 code
The ARMv7 start code has support for saving some boot params at the
entry point, which is used by some SoCs to return to BROM.

Port this to ARM926EJ-S start code.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Andre Przywara
f2c33699d1 sunxi-common.h: remove pointless #ifdefs
Remove some pointless #ifdefs from this file, as there are quite too
many of them already.

Some definitions don't really hurt to have in any case, so remove the
pointless CONFIG_MMC guard around CONFIG_MMC_SUNXI_SLOT.

The BOARD_SIZE_LIMIT applies regardless of ARM64 or not (now), so remove
that guard as well. The maximum number of MMC devices does not depend on
CONFIG_ENV_IS_IN_MMC, so move that out to simplify the file.

Last but not least CONFIG_SPL_BOARD_LOAD_IMAGE serves no real purpose
anymore: it's unconditionally defined for all sunxi boards, and protects
nothing applicable outside of sunxi code anymore. Just remove it.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Andre Przywara
b8cd7f439a armv8: remove no longer needed lowlevel_init.S
When we added Allwinner SoC support to ARMv8, we needed to pull in an
implementation of lowlevel_init() calling the C function s_init(), as
sunxi required it as this time.

The last few patches got rid of this bogus requirement, and as sunxi was
still the only user, we can now remove this lowlevel_init.S from ARMv8
altogether.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-04 00:09:57 +00:00
Andre Przywara
534b82a1f2 sunxi: move early "SRAM setup" into separate file
Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied
from the original BSP U-Boot. The comment speaks of this being required
before DRAM access gets enabled, but there is no indication that this
would actually be required that early.

Move this out of s_init(), into board_init_f(). Since this actually only
affects a very few older SoCs, the actual code goes into the cpu/armv7
directory, to move it out of the way for all other SoCs.

This also uses the opportunity to convert some #ifdefs over to the fancy
IS_ENABLED() macros used in actual C code.

We keep the s_init() stub around for now, since armv8's lowlevel_init
still relies on it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-04 00:09:57 +00:00
Andre Przywara
2564fce7ee sunxi: move Cortex SMPEN setting into start.S
According to their TRMs, Cortex ARMv7 CPUs with SMP support require the
ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB
maintenance operations are done. As we do those things still in start.S,
we need to move the SMPEN bit setting there, too.

This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR
very early in start.S, and moves sunxi boards over to use that instead
of the custom code we had in our board.c file (where it was called
technically too late).

In practice we got away with this so far, because at this point all the
other cores were still in reset, so any broadcasting would have been
ignored anyway. But it is architecturally cleaner to do it early, and
we move a core specific piece of code out of board.c.

This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few
years back, and moves the respective logic into the new Kconfig entry.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:36 +00:00
Andre Przywara
5bc4cd05d7 sunxi: move non-essential code out of s_init()
So far all Allwinner based boards were doing some not-so-lowlevel-setup
in lowlevel's s_init() routine.
This includes the initial clock, timer and pinmux setup, among other
things. This is clearly out of the "absolute bare minimum to get started"
scope that lowlevel_init.S suggests for this function.

Since we have an SPL, which is called right after s_init(), move those
calls to our board_init_f() function. As we overwrite this only for
the SPL, this has the added benefit of not doing this setup *again*
shortly afterwards, when running U-Boot proper.

This makes gpio_init() to be called from the SPL only, so pull this code
into a CONFIG_SPL_BUILD protected part to avoid build warnings.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:03 +00:00
Tom Rini
3e5f4b337d Merge branch '2022-02-03-assorted-fixes'
- Update CI image to have libgnutls available.
- Assorted ARM and SPL bugfixes
2022-02-03 15:55:02 -05:00
Simon Glass
5b9a5b2b96 treewide: Use 16-bit Unicode strings
At present we use wide characters for Unicode but this is not necessary.
Change the code to use the 'u' literal instead. This helps to fix build
warnings for sandbox on the Raspberry Pi.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-02-03 15:53:28 -05:00
Simon Glass
156ccbc3c4 efi: Use 16-bit unicode strings
At present we use wide characters for unicode but this is not necessary.
Change the code to use the 'u' literal instead. This helps to fix build
warnings for sandbox on rpi.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-02-03 12:16:01 -05:00
Simon Glass
587254ebcf scripts/checkpatch.pl: Resync with v5.16
This resyncs us with the version found in v5.16 of the Linux kernel with
the following exceptions:
- Keep our u-boot specific tests / code area.
- Change the location of checkpatch.rst
- Drop the "use strscpy" test as we don't have that, but do have strlcpy
  and want that used now.
- Keep debug/printf in the list for $logFunctions

This also syncs the spdxcheck.py tool and all the associated
documentation.
S
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-03 12:16:00 -05:00
Andre Przywara
68f08966b0 armv8: start.S: remove CONFIG_SYS_RESET_SCTRL code
There is some code that tries to "reset" the SCTLR_ELx register early in
the boot process. The idea seems to be to guarantee some sane settings
that U-Boot actually relies on, for instance running in little-endian
mode, with the MMU off initially.
However the current code has multiple problems:
- For a start, no platform or config defines the symbol that would
  enable that code.
- The code itself really only works if the bits that it tries to clear
  are already cleared:
  - If we run in big-endian mode initially, any previous loads would have
    been wrong already. That applies to the (optional) relocation code,
    but more prominently to the mask that it uses to clear those bits:
    "ldr x1, =0xfdfffffa" looks innocent, but actually involves a memory
    access to the literal pool, using the current endianness.
  - If we run with the MMU enabled, we are probably doomed already. We
    *could* hope that we are running with an identity mapping, but would
    need to do some cache maintenance to avoid losing dirty cache lines.
- The idea of doing a read-modify-write of SCTLR is somewhat
  questionable to begin with, because as the owner of the current
  exception level we should initialise all bits of this register with a
  certain fixed value.
- The code is unnecessarily complicated, and the function name is
  misspelled.

While those problems *could* admittedly be fixed, the point that is does
not seem to be used at all at the moment tells me we should just remove
this code, and be it to not give a bad example.

If people care, I could introduce some proper SCTLR initialisation code.
We are about to work this out for the boot-wrapper[1] as we speak, but
apparently we got away without doing this in U-Boot ever since, so it
might not be worth the potential trouble.

[1] https://lore.kernel.org/linux-arm-kernel/20220114105653.3003399-7-mark.rutland@arm.com/

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-03 12:15:37 -05:00
Philippe Reynes
96757b7be5 scripts: Makefile: also clean subdir dtc
Since commit 93b1965322 ("Makefile: Only build dtc if needed"),
the sub directory scripts/dtc is never cleaned.
Adds the directory dtc to subdir to always clean it.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-03 12:15:36 -05:00
Vignesh Raghavendra
83fe92f3cf net: ti: am65-cpsw: Cleanup resources before jump to kernel
In case fastboot over Ethernet, am65_cpsw_stop() is not called unless
DM_FLAG_OS_PREPARE is set. Without call to am65_cpsw_stop(), DMA
resources are not released thus leading to failures in kernel.
Fix this by adding DM_FLAG_OS_PREPARE flag to am65_cpsw_nuss_port
driver.

Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-02-03 12:15:35 -05:00
Felix Brack
39f315e942 arm: pdu001: Exend the list of maintained files
Add the PDU001 board specific DT files to MAINTAINERS. This should
help for better tracking of changes to these files.

Signed-off-by: Felix Brack <fb@ltec.ch>
2022-02-03 12:15:34 -05:00
Alper Nebi Yasak
22eb7ba80e armv8: spl: Fix build with LINUX_KERNEL_IMAGE_HEADER
Setting LINUX_KERNEL_IMAGE_HEADER=y attempts to include an ARM64 Linux
kernel image header at the start of both U-Boot proper and SPL binaries.
However, some definitions that the image header uses are not included by
the SPL linker script, resulting in a build error. Include them the way
they are included in U-Boot proper's linker script to fix the error.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-02-03 12:15:33 -05:00
Vignesh Raghavendra
c1335e2ca5 spl: ymodem: Fix buffer overflow during Image copy
ymodem_read_fit() driver will end copying up to BUF_SIZE boundary even
when requested size of copy operation is less than that.
For example, if offset = 0, size = 1440B, ymodem_read_fit() ends up
copying 2KB from offset = 0, to destination buffer addr

This causes data corruption when malloc'd buffer is passed during UART
boot since commit 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer
for loading images")

With this, UART boot works again on K3 (AM654, J7, AM64) family of
devices.

Fixes: 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer for loading images")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-02-03 12:15:33 -05:00
Tom Rini
cd59d44cfd Dockfile, CI: Update to latest focal tag and build
- Latest focal tag
- Add libgnutls to image

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-03 12:15:32 -05:00
AKASHI Takahiro
ad3616edb0 Dockerfile: Add libgnutls package for building mkeficapsule command
For adding signing feature for capsule authentication to the host tool,
mkeficapsule, we will link gnutls library for crypto operation.
Since we need this command to complete the capsule authentication test
on sandbox in CI loop, necessary packages must be installed on the host.

See my patch, "tools: mkeficapsule: add firmware image signing."

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-02-03 12:15:20 -05:00
Tom Rini
006fddde01 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Update and fixes for ls1088a, FMAN, ls1046ardb, ls1043ardb
sync ls1028ardb u-boot and Linux device-tree
2022-02-02 09:16:49 -05:00
Tom Rini
e291d3dc04 Merge https://source.denx.de/u-boot/custodians/u-boot-cfi-flash
- cfi_mtd: populate mtd->dev with flash_info->dev (Patrice)
2022-02-01 10:54:52 -05:00
Patrice Chotard
016e82d322 mtd: cfi_mtd: populate mtd->dev with flash_info->dev
Populate mtd->dev with flash_info->dev which allows to get
full mtd information using the "mtd list" command.
Before, "mtd list" command returns :

List of MTD devices:
* nor0
  - type: NOR flash
  - block size: 0x40000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "nor0"

After this patch we get for example:

List of MTD devices:
* nor0
  - device: flash@0
  - parent: spi@40430000
  - driver: cfi_flash
  - path: /soc/spi@40430000/flash@0
  - type: NOR flash
  - block size: 0x40000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "nor0"

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-01 10:56:25 +01:00
Martin Schiller
522f70463c board: ls1046ardb: force PCI device enumeration
Commit 045ecf8992 ("configs: enable DM_ETH support for LS1046ARDB")
resulted in the PCI bus no longer being implicitly enumerated.

However, this is necessary for the fdt pcie fixups to work.

Therefore, similar to commit 8b6558bd41 ("board: ls1088ardb:
transition to DM_ETH"), pci_init() is now called in the board_init()
routine when CONFIG_DM_ETH is active.

Signed-off-by: Martin Schiller <ms@dev.tdt.de>
CC: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Jianpeng Bu
0a96dfb57e board: ls1088a: update ifc node name to be memory-controller
IFC-NOR and QSPI are muxed on SoC.
So disable IFC node in dts if QSPI is enabled or disable QSPI node in dts
in case QSPI is not enabled.
"ifc/nor" will be changed to "memory-controller/nor" in linux. So need to
modify "ifc/nor" to "memory-controller/nor" in fdt_path_offset().

Signed-off-by: Jianpeng Bu <jianpeng.bu@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Camelia Groza
4118a5b1cf configs: fsl: add missing FMAN/QE_FW_ADDR defines
The initial patch had typos that caused four defconfigs to miss the
symbol transition to Kconfig. CONFIG_SYS_QE_FW_ADDR and
CONFIG_SYS_FMAN_FW_ADDR are currently initialized to 0 by default
on these builds, which prevents the firmware from loading.

Add the correct symbols to these defconfigs.

Fixes: a97a071d10 ("configs: fsl: migrate FMAN/QE specific defines to Kconfig")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
681adaa466 arm: dts: ls1028a-qds: declare in-band autoneg for Ethernet ports
The commit in the Fixes: tag below broke traffic through switch ports
where the SERDES protocol requires in-band autoneg and this requirement
isn't described in the device tree: SGMII, QSGMII, USXGMII (with
2500Base-X, in-band autoneg isn't supported).

The LS1028A-QDS boards are not yet ready for syncing their device trees
with Linux, since Ethernet is missing there (but has been submitted):
https://lore.kernel.org/lkml/20211112223457.10599-11-leoyang.li@nxp.com/

When agreement is reached for the Ethernet support in Linux, there will
be a sync for these boards as well. For now, just enable in-band autoneg
to fix the breakage.

Fixes: e3789a7262 ("net: dsa: felix: configure the in-band autoneg property based on OF node info")
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
bee9fd2957 arm: dts: ls1028a-rdb: sync device tree with Linux
Allow device trees to be reused between Linux and U-Boot.
The source for these device trees is linux-next as of commit
bd8a9cd624c6 ("arm64: dts: ls1028a-rdb: update copyright"), which was
chosen because some changes needed to be done to the Linux DTs too,
before they could be shared:
https://lore.kernel.org/linux-arm-kernel/20211202141528.2450169-5-vladimir.oltean@nxp.com/T/#m6f63c92e75fa79a01144b2c2c6dc4776e7971395

There are two more commits on the RDB device tree which haven't been
picked up yet, because they have dependencies on the SoC device tree:

dd3d936a1b17 ("arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source")
b2e2d3e02fb6 ("arm64: dts: ls1028a-rdb: enable pwm0")

These will be picked up on the next resync.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
50c49ef2ff arm: dts: ls1028a-rdb: enable PCIe controllers from U-Boot dtsi
Reuse the scheme implemented by the Kontron SL28 boards in
commit d08011d7f9
("arm: dts: ls1028a: disable the PCIe controller by default")
and move the 'status = "okay"' lines for the PCIe controllers
inside a separate U-Boot dtsi for the LS1028A-RDB board. This way, the
existing Linux device tree can simply be dropped in.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
f33fad6f37 arm: dts: ls1028a-rdb: disable I2C buses 1 through 7
There is no I2C peripheral on these buses on the reference design board,
and the Linux device tree does not enable them either.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
5b0f8eeb3d arm: dts: ls1028a-rdb: disable DSPI nodes
There is no SPI peripheral on the LS1028A-RDB, therefore no reason to
enable these nodes in the U-Boot device tree (and Linux does not enable
them either).

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
4a5362fc10 arm: dts: ls1028a-rdb: sync Ethernet device tree nodes with Linux
In a bit of a blunder, the blamed commit in the Fixes: tag below made
the mscc_felix switch driver look at the 'managed = "in-band-status"'
device tree property, forgetting that the U-Boot device tree had not
been updated to include that property, whereas the Linux one does.

The switch is therefore described in the device tree as not requiring
in-band autoneg, but the PHY driver for VSC8514 (drivers/net/phy/mscc.c)
still enables that feature. This results in a mismatch => no traffic.

This patch is a copy-paste of the Ethernet device tree nodes from Linux,
which resolves that issue. The device tree update also renames the
Ethernet PHY labels.

Fixes: e3789a7262 ("net: dsa: felix: configure the in-band autoneg property based on OF node info")
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
5009b11bec arm: dts: ls1028a-rdb: sort nodes alphabetically
The nodes in the NXP LS1028A-RDB device tree are out of order, regroup
them alphabetically to have a simple delta when the Linux device tree is
brought in.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
ad1ff53218 rtc: pcf2127: remove U-Boot specific compatible string
Now that all in-tree boards have been converted to the compatible
strings from Linux, delete the support for the ad-hoc "pcf2127-rtc" one.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
aa0586247b arm: dts: lx2160a-rdb: use Linux compatible string for RTC
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LX2160A-RDB to use the compatible string that was established in Linux.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
41496cc330 arm: dts: ls1028a-rdb: use Linux compatible string for RTC
During this board's sync with Linux device trees, it was observed that
it doesn't use the same compatible string for the RTC node as in U-Boot.
This change makes the RTC compatible strings match, for a smoother sync.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
801f4b0cde arm: dts: ls1028a-qds: use Linux compatible string for RTC
The LS1028A-QDS board won't be synced with the Linux device trees right
now, since those are currently still in progress (Ethernet is missing).

However, while we're at converting the RDB, it can be observed that the
same RTC is present on the two boards, and the wrong compatible string
is used in both places. This change updates the RTC from the QDS to use
the compatible string that was established in Linux.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
246b7e6c9f arm: dts: lx2160a-qds: use Linux compatible string for RTC
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LX2160A-QDS to use the compatible string that was established in Linux.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
5d0b044e96 arm: dts: ls1088a-rdb: use Linux compatible string for RTC
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LS1088A-RDB to use the compatible string that was established in Linux.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
489c428763 arm: dts: ls1088a-qds: use Linux compatible string for RTC
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LS1088A-QDS to use the compatible string that was established in Linux.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-01 15:08:07 +05:30