Commit graph

19202 commits

Author SHA1 Message Date
Tien Fong Chee
da0d5f6f73 ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL
. The result of calculation is come from default max cluster(0x10000) +
others(0x2000) + additional memory for headroom(0x3000).

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
0a42a132a4 ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Chris Packham
4ad2c8953d Remove #define CONFIG_CRC32
There is no check for CONFIG_CRC32 so the #define in image.h does
nothing. Remove it.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-10 07:18:13 -04:00
Fabrice Fontaine
93e078807f Make FIT support really optional
Due to some mistakes in the source code, it was not possible to really
turn FIT support off. This commit fixes the problem by means of the
following changes:

- Enclose "bootm_host_load_image" and "bootm_host_load_images" between
  checks for CONFIG_FIT_SIGNATURE, in common/bootm.c.

- Enclose the declaration of "bootm_host_load_images" between checks for
  CONFIG_FIT_SIGNATURE, in common/bootm.h.

- Condition the compilation and linking of fit_common.o fit_image.o
  image-host.o common/image-fit.o to CONFIG_FIT=y, in tools/Makefile.

Signed-off-by: Carlos Santos <casantos@datacom.ind.br>
[fabio: adapt for 2016.07]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
[Ricardo: fix conditional compilation and linking of the files mentioned above
for 2016.07]
Signed-off-by: Ricardo Martincoski <ricardo.martincoski@gmail.com>
[Jörg: adapt for 2019.01]
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
[Retrieved from:
https://git.buildroot.net/buildroot/tree/package/uboot-tools/0003-Make-FIT-support-really-optional.patch]
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
2019-05-09 19:52:55 -04:00
Tom Rini
f30f268a07 Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip
Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie
2019-05-09 12:36:17 -04:00
Tom Rini
062aceb8bf Merge git://git.denx.de/u-boot-marvell
- DM updates for multiple MVEBU boards (Stefan)
- Add CRS305-1G-4S board (Luka)
- Enable MMC in SPL on clearfog (Baruch)
2019-05-09 07:12:25 -04:00
Tom Rini
7d41f2dcbe Merge git://git.denx.de/u-boot-riscv
- Correct SYS_TEXT_BASE for qemu.
- Support booti.
- Increase SYSBOOTM_LEN for Fedora/RISCV kernel.
- Support SMP booting from flash.
2019-05-09 07:11:52 -04:00
Rick Chen
d8fc1ef2f0 riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flash
When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of
CONFIG_OF_BOARD.

Also remove unused code about prior_stage_fdt_address.
And modify CONFIG_SYS_FDT_BASE as flash address.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09 16:46:46 +08:00
David Abdurachmanov
081c660201 riscv: qemu-riscv.h: define CONFIG_PREBOOT (enables extlinux)
- Set fdt_addr variable, which is needed for extlinux to find FDT.
  Otherwise booting kernel using extlinux results in missing FDT.

- Also run fdt addr with FDT address so that fdt commands would
  work out of the box in U-Boot prompt.

This is successfully used by Fedora/RISCV with 5.1-rc3+ kernel using
OpenSBI -> U-Boot (S-mode) [extlinux] -> Kernel setup.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-09 16:46:13 +08:00
David Abdurachmanov
ac12c61909 riscv: set CONFIG_SYS_BOOTM_LEN to SZ_64M
After updating Fedora/RISCV kernel to 5.1-rc3+ the size increased above
the current threshold. Looking into HiKey, Dragonboards, etc. seems that
SZ_64M is a popular option.

This sucessfully boots Fedora/RISCV with 5.1-rc3+ kernel on QEMU 4.0 (master)
with OpenSBI -> U-Boot (S-mode) [extlinux] -> Kernel setup.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-09 16:46:13 +08:00
Luka Kovacic
22bb913fdf arm: mvebu: Add CRS305-1G-4S board
CRS305-1G-4S has a switch chip with an integrated CPU (98DX3236) and
like some of the other similar boards requires bin_hdr.
bin_hdr (DDR3 init stage) is currently retrieved from the stock
bootloader and compiled into the kwb image.

Adds support for U-Boot, enable UART, SPI, Winbond SPI flash chip
support and writing env to SPI flash.

Signed-off-by: Luka Kovacic <me@lukakovacic.xyz>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-09 07:35:04 +02:00
Tom Rini
eb511984e9 Merge branch 'master' of git://git.denx.de/u-boot-net
- Various PHY fixes / enhancements.
- TI K2G fixes
2019-05-08 22:46:31 -04:00
Tom Rini
504bf790da Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- H6 Beelink GS1 board (Clément)
- Olimex A64-Teres-I board (Jonas)
- sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
- Change include order (Jagan)
- EPHY clock changes (Jagan)
- EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
2019-05-08 16:21:43 -04:00
Jagan Teki
ea9dc35aab reset: Get the RESET by index without device
Getting a RESET by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process RESET operation for child
without udevice but with ofnode.

So add reset_get_by_index_nodev() and move the common code
in reset_get_by_index_tail() to use for reset_get_by_index()

Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 00:44:13 +05:30
Jagan Teki
75f98314f9 clk: Get the CLK by index without device
Getting a CLK by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process CLK operation for child
without udevice but with ofnode.

So add clk_get_by_index_nodev() and move the common code
in clk_get_by_index_tail() to use for clk_get_by_index()

Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 00:44:13 +05:30
Tom Rini
8c66fb88e3 Merge git://git.denx.de/u-boot-x86
- Allow x86 boards to use TPL, SPL and U-Boot proper
- Update sysreset x86 driver to utilize ACPI registers to do power off
- Add a new chromebook_samus_tpl board for TPL support
- Several minor changes in binman tool
2019-05-08 09:20:19 -04:00
Tom Rini
d4c352138c Pull request for UEFI sub-system for v2019.07-rc2 (2)
Fix a bunch of errors in the UEFI sub-system:
 
 * implement missing UnloadImage(),
 * implement missing RegisterProtocolNotify(),
 * unload images in Exit(),
 * parameter checks.
 
 Provide a unit test for UnloadImage().
 Remove a redundant function for unit tests.
 Clean up the UEFI sub-system initialization
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Merge tag 'efi-2019-07-rc2-2' of git://git.denx.de/u-boot-efi

Pull request for UEFI sub-system for v2019.07-rc2 (2)

Fix a bunch of errors in the UEFI sub-system:

* implement missing UnloadImage(),
* implement missing RegisterProtocolNotify(),
* unload images in Exit(),
* parameter checks.

Provide a unit test for UnloadImage().
Remove a redundant function for unit tests.
Clean up the UEFI sub-system initialization
2019-05-08 09:20:04 -04:00
Kever Yang
6bbf5e1a94 rockchip: rk3399: add tpl support
Rockchip platform suppose to use TPL(run in SRAM) as dram init and
SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be
limited by SRAM size.
This patch add rk3399-board-tpl.c and its common configs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
cd193462ee rockchip: px5: update SPL size for spl/tpl
Use larger space for load bl31 in SPL

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
26f3814e02 rockchip: evb-rk3229: remove unnecessary defines
Prefer to use default setting like other SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
c34643e0db rockchip: rk322x: add tpl support
Move original spl to tpl, and add spl to load next stage firmware,
adapt all the address and option for them.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Simon Glass
ffe403762b x86: samus: Add a target to boot through TPL
Add a version of samus which supports booting from TPL to SPL and then
to U-Boot. This allows TPL to select from an A or B SPL to support
verified boot with field upgrade.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:19 +08:00
Simon Glass
7c03caf6fa x86: Add a simple TPL implementation
Add the required CPU code so that TPL builds correctly. Also update the
SPL code to deal with being booted from TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:18 +08:00
Simon Glass
31d5261d35 x86: Enable the RTC on all boards
With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:18 +08:00
Simon Glass
b69b603bcd x86: pch: Add an ioctl to read power-management info
Add a new ioctl() request to read information about the power-management
system. This can be used to power off the device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:14 +08:00
Simon Glass
62c72995e3 Revert "pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS"
This reverts commit aec4298ccb.

Unfortunately this has a dramatic impact on the pre-relocation memory
used on x86 platforms (increasing it by 2KB) since it increases the
overhead for each PCI device from 220 bytes to 412 bytes.

The offending line is in UCLASS_DRIVER(pci):

	.per_device_auto_alloc_size = sizeof(struct pci_controller),

This means that all PCI devices have the controller struct associated
with them. The solution is to move the regions[] member out of the array,
makes its size dynamic, or split UCLASS_PCI into controllers and
non-controllers, as the comment suggests.

For now, revert the commit to get things running again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:10 +08:00
Carlo Caione
4f6746dc7f net: phy: Add generic helpers to access MMD PHY registers
Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.

The MMD PHY registers can be accessed by several means:

1. Using two new MMD access function hooks in the PHY driver. These
functions can be implemented when the PHY driver does not support the
standard IEEE Compatible clause 45 access mechanism described in clause
22 or if the PHY uses its own non-standard access mechanism.

2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable
DEVADs.

3. The standard clause 45 access extensions to the MMD registers through
the indirection registers (clause 22) in all the other cases.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Heinrich Schuchardt
b015ab57bf efi_loader: signature of ExitBootServices()
Consistently use efi_uintn_t as type of memory keys.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <graf@amazon.com>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
84a918e8ce efi_loader: LoadImage() check parent image
If the parent image handle does not refer to a loaded image return
EFI_INVALID_PARAMETER.
(UEFI SCT II 2017: 3.4.1 LoadImage() - 5.1.4.1.1)

Mark our root node as a loaded image to avoid an error when using it as
parent image.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
ab15d4149e efi_loader: implement RegisterProtocolNotify()
The RegisterProtocolNotify() boot service registers an event to be
notified upon the installation of a protocol interface with the
specified GUID.

Add the missing implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
8101dd3dfa efi_selftest: remove redundant function efi_st_memcmp()
Function memcmp() is available in efi_freestanding.c. So we do not remove a
further implementation.

Replace all usages of efi_st_memcmp() by memcmp().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
126a43f15b efi_loader: unload applications upon Exit()
Implement unloading of images in the Exit() boot services:

* unload images that are not yet started,
* unload started applications,
* unload drivers returning an error.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:03 +02:00
Heinrich Schuchardt
df116e81ea efi_loader: implement UnloadImage()
Implement the UnloadImage() boot service

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:03 +02:00
Heinrich Schuchardt
cd73aba656 efi_loader: mark started images
In UnloadImage() we need to know if an image is already started.

Add a field to the handle structure identifying loaded and started images.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:03 +02:00
Tom Rini
8d7f06bbbe Merge branch 'master' of git://git.denx.de/u-boot-sh
- RZ/A1 addition.
- Old board removal.
2019-05-07 09:38:00 -04:00
Tom Rini
6984044d05 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Assorted stratix10 fixes.
- DDR driver DM migration.
2019-05-07 09:37:11 -04:00
Chris Brandt
ba932bc846 ARM: dts: renesas: Add RZ/A1 GR-Peach board
Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach,
which is a cheap development platform with RZ/A1H SoC. The
DTs are imported from Linux 5.0.11, commit d5a2675b207d .

Currently supported are UART, ethernet and RPC SPI. The board
can be booted from RPC SPI by writing the u-boot.bin binary
to the beginning of the SPI NOR, e.g. using the "sf" command.
The board can also be booted via JTAG by setting text base to
0x20020000, loading u-boot.bin there via JTAG and executing it
from that address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Chris Brandt
3529596442 ARM: dts: renesas: Add RZ/A1 platform code
Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC.
Distinguishing feature of this SoC is that it has up to
10 MiB of on-SoC static RAM (SRAM).

The DTs are imported from Linux 5.0.11, commit d5a2675b207d .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
06480665aa sh: sh7785lcr: Remove the board
Last change to this board was done in 2016, it uses non-DM USB
with no prospects of ever being converted to DM USB, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07 05:41:31 +02:00
Marek Vasut
e4f01b5133 sh: ecovec: Remove the board
Last change to this board was done in 2016, it uses non-DM USB
with no prospects of ever being converted to DM USB, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07 05:41:31 +02:00
Tom Rini
44237e272f Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various pinctrl / gpio fixes for R-Car
2019-05-06 07:19:31 -04:00
Ley Foon Tan
6bf238a461 arm: socfpga: Move Stratix 10 SDRAM driver to DM
Convert Stratix 10 SDRAM driver to device model.

Get rid of call to socfpga_per_reset() and use reset
framework.

SPL is changed from calling function in SDRAM driver
directly to just probing UCLASS_RAM.

Move sdram_s10.h from arch to driver/ddr/altera directory.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Ley Foon Tan
5918afda9d ddr: altera: Compile ALTERA SDRAM in SPL only
Compile ALTERA_SDRAM driver in SPL only.
Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Adam Ford
95468e6c9b ARM: da850evm: Enable da850-ohci USB host controller
The DA850 EVM has one USB 1.1 OHCI Host controller.  With the
host controller now support DM_USB, this patch enables
the respective functions for the da850evm.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-05 08:48:50 -04:00
Marek Behún
8509f22aac lib: add Zstandard decompression support
Add the zstd library from Linux kernel (only decompression support).
There are minimal changes to build with U-Boot, otherwise the files are
identical to Linux commit dc35da16 from March 2018, the files had not
been touched since in kernel. Also SPDX lincese tags were added.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2019-05-05 08:48:50 -04:00
Marek Behún
83a486b6fd lib: Add xxhash support
This adds the xxhash support from Linux. Files are almost identical to
those added to Linux in commit 5d240522 ("lib: Add xxhash module") (they
haven't been touched since in Linux). The only difference is to add some
includes to be compatible with U-Boot. Also SPDX lincese tags were
added.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2019-05-05 08:48:50 -04:00
Dinh Nguyen
84b124db35 dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.

Add a uclass and a test for cache.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-05-05 08:48:50 -04:00
Alex Kiernan
89665f2eb1 Refactor IMAGE_ENABLE_VERIFY to handle builds without SPL verification
If building with SPL_LOAD_FIT_FULL and FIT_SIGNATURE, but without
SPL_FIT_SIGNATURE then the build fails with:

  common/built-in.o: In function `fit_image_verify_with_data':
  common/image-fit.c:1220: undefined reference to `fit_image_verify_required_sigs'
  common/image-fit.c:1244: undefined reference to `fit_image_check_sig'
  common/built-in.o: In function `fit_image_load':
  common/image-fit.c:1857: undefined reference to `fit_config_verify'

Refactor so that host builds still depend on FIT_SIGNATURE, but target
builds check FIT_SIGNATURE/SPL_FIT_SIGNATURE dependent on the build.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-05 08:48:50 -04:00
Tom Rini
86f578ee85 - mscc: small fixes, enhance network support for Serval, Luton amd
Ocelot
 - mt7620: rename arch to more generic name mtmips
 - mips: pass initrd addresses via DT as physical addresses
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Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips

- mscc: small fixes, enhance network support for Serval, Luton and Ocelot
- mt7620: rename arch to more generic name mtmips
- mips: pass initrd addresses via DT as physical addresses
2019-05-04 20:02:42 -04:00
Tom Rini
c9baea6d0e Merge tag 'mmc-2019-5-3' of https://github.com/MrVan/u-boot 2019-05-04 20:02:16 -04:00