The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Wolfgang Denk <wd@denx.de>
The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by
Calao Systems <http://www.calao-systems.com>. Their components are very
similar to the AT91SAM9260EK board, so their configuration is based on
the configuration of this board. There are however some differences:
different clocks, no LCD, no ethernet. They also can use SPI EEPROM to
store the environment.
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems
<http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC
running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard
battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND
flash, two USB host ports, and an USB device port. More informations can be
found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
This patch adds support for i.MX27-LITEKIT development board from
LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
flash, FEC ethernet controller integrated into i.MX27.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Call fsl_pci_init_port() to initialize all the PCIe ports on the board.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
With current values of CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END
memory test hangs if run without arguments. Set them to sane values, so
that all available 512MB of RAM excluding exception vectors at the bottom
and u-boot code and stack at the top can be tested.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.
Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The number of CPUs are getting detected dynamically by checking the
processor SVR value. Also removed CONFIG_NUM_CPUS references from all
the platforms with 85xx/86xx processors.
This can help to use the same u-boot image across the platforms.
Also revamped and corrected few Freescale Copyright messages.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The old PCI ATMU setup code would just mimic the PCI regions into the
ATMU registers. For simple memory maps in which all memory, MMIO, etc
space fit into 4G this works ok. However there are issues with we have
>4G of memory as we know can't access all of memory and we need to
ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with
anything since we can't turn it off.
We first setup outbound windows based on what the board code setup
in the pci regions for MMIO and IO access. Next we place PCICSRBAR
below the MMIO window. After which we try to setup the inbound windows
to map as much of memory as possible.
On PCIe based controllers we are able to overmap the ATMU setup since
RX & TX links are separate but report the proper amount of inbound
address space to the region tracking to ensure there is no overlap.
On PCI based controllers we use as many inbound windows as available to
map as much of the memory as possible.
Additionally we changed all the CCSR register access to use proper IO
accessor functions. Also had to add CONFIG_SYS_CCSRBAR_PHYS to some
86xx platforms that didn't have it defined.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
apparently the ITX was missed last round.
Also make bootdelay consistent with other boards, so as to give on the
opportunity to fix mistakenly set bootcmd without having checked for an
bootdelay zero setting first.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
- changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900
- changed CS8900_BASE to CONFIG_CS8900_BASE
- changed CS8900_BUS?? to CONFIG_CS8900_BUS??
- cleaned up line lengths
- modified VCMA9 command function that accesses the device
- removed MAC address initialization from lib_arm/board.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
This chooses 4kB data size for both TFTP and NFS, as an example
about how to use support for IP fragments.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Add support for the DEKA Research and Development galaxy5200 board
The galaxy5200 is an Freescale mpc5200 based embedded industrial
control board.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Some boards have fallen out of sync by defining CONFIG_ENV_IS_EMBEDDED
manually. While it is useful to have this available to the build system,
let's do it automatically rather than forcing people to opt into it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Newer revisions of these boards have slightly larger flashes, so increase
the configured number of sectors so that U-Boot works on all revisions.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot
at either:
NET: Registered protocol family 16
or the
io scheduler cfq registered
message. Fixing up these DDR settings appears to fix the problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 9993e196da "mpc83xx: convert all
remaining boards over to 83XX_GENERIC_PCI" remapped pci windows on
tqm834x to make it more consistent with the other 83xx boards. During
that time however, the author failed to realize that FLASH_BASE was
occupying the same range as what PCI1_MEM_BASE was being assigned.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Wolfgang Denk <wd@denx.de>
This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.
u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
u-boot$
It currently isn't used, so delete it before it spreads further.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
The name of the atmel nand driver in the kernel changed from at91_nand
to atmel_nand back in June 2008, but the at91-based boards config files
still refer to at91_nand. This patch updates them with the new name
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
This patch fixes the "chip_config" command for I2C bootstrap EEPROM
configuration. First it changes the I2C bootstrap EEPROM address to
0x54 as this is used on Arches (instead of 0x52 on Canyonlands/
Glacier). Additionally, the NAND bootstrap settings are removed
for Arches since Arches doesn't support NAND-booting.
Signed-off-by: Stefan Roese <sr@denx.de>
For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that
got copied int the MPC8536, MPC8572 and P2020 DS boards. The BEDBUG
support has never been made to work completely on e500/85xx so we
just disable it to save space and match the other FSL 85xx boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
http://lists.denx.de/pipermail/u-boot/2009-May/052247.html
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses. All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.
No documented erratum justifies these accesses. It looks like maybe
some pre-release BDI-2000 setup code has been carried along by cargo
cult programming since at least late 2004 (per GIT history).
Here's a patch disabling what seems to be bogosity. Tested on a
csb337; there were no behavioral changes.
Signed-off-by: David Brownell <david-b@pacbell.net>
on RM9200ek
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch moves the load addresses for kernel, fdt and ramdisk to higher
addresses (>= 16MB). This enables booting of bigger kernel images (e.g.
lockdep enabled).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes CONFIG_SYS_BOOTMAPSZ from 8MB to 16MB which is the
initial TLB on 40x PPC's in the Linux kernel. With this change even bigger
Linux kernels (> 8MB) can be booted.
This patch also sets CONFIG_SYS_BOOTM_LEN to 16MB (default 8MB) to enable
decompression of bigger images.
Signed-off-by: Stefan Roese <sr@denx.de>
