Commit graph

95 commits

Author SHA1 Message Date
Stefan Roese
24956642ef Remove unused CONFIG_SERIAL_SOFTWARE_FIFO feature
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-09-23 09:02:05 +02:00
Kim Phillips
1a2e203b31 mpc83xx: turn on icache in core initialization to improve u-boot boot time
before, MPC8349ITX boots u-boot in 4.3sec:

        column1 is elapsed time since first message
        column2 is elapsed time since previous message
        column3 is the message
0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX
0.000 0.000:
0.000 0.000: Reset Status:
0.000 0.000:
0.032 0.032: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.032 0.000: Board: Freescale MPC8349E-mITX
0.032 0.000: UPMA:  Configured for compact flash
0.032 0.000: I2C:   ready
0.061 0.028: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
1.516 1.456: FLASH: 16 MB
2.641 1.125: PCI:   Bus Dev VenId DevId Class Int
2.652 0.011:         00  10  1095  3114  0180  00
2.652 0.000: PCI:   Bus Dev VenId DevId Class Int
2.652 0.000: In:    serial
2.652 0.000: Out:   serial
2.652 0.000: Err:   serial
2.682 0.030: Board revision: 1.0 (PCF8475A)
3.080 0.398: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
3.080 0.000: TSEC0, TSEC1
4.300 1.219: IDE:   Bus 0: .** Timeout **

after, MPC8349ITX boots u-boot in 3.0sec:

0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
0.010 0.000:
0.010 0.000: Reset Status:
0.010 0.000:
0.017 0.007: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.017 0.000: Board: Freescale MPC8349E-mITX
0.038 0.020: UPMA:  Configured for compact flash
0.038 0.000: I2C:   ready
0.038 0.000: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
0.260 0.222: FLASH: 16 MB
1.390 1.130: PCI:   Bus Dev VenId DevId Class Int
1.390 0.000:         00  10  1095  3114  0180  00
1.390 0.000: PCI:   Bus Dev VenId DevId Class Int
1.400 0.010: In:    serial
1.400 0.000: Out:   serial
1.400 0.000: Err:   serial
1.400 0.000: Board revision: 1.0 (PCF8475A)
1.832 0.432: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
1.832 0.000: TSEC0, TSEC1
3.038 1.205: IDE:   Bus 0: .** Timeout **

also tested on these boards (albeit with a less accurate
boottime measurement method):

seconds: before  after
8349MDS  ~2.6    ~2.2
8360MDS  ~2.8    ~2.6
8313RDB  ~2.5    ~2.3 #nand boot
837xRDB  ~3.1    ~2.3

also tested on an 8323ERDB.

v2: also remove the delayed icache enablement assumption in arch ppc's
board.c, and add a CONFIG_MPC83xx define in the ITX config file for
consistency (even though it was already being defined in 83xx'
config.mk).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-22 18:44:56 -05:00
Kim Phillips
a059e90e16 mpc83xx: enable command line autocompletion
because it's convenient.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-22 18:34:49 -05:00
Kim Phillips
ecd1a09b81 mpc83xx: remove hardcoded network addresses from config files
and avoid e.g., two identical boards from causing random networking
conflicts when hooked up to the same network.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-02-22 16:48:06 -06:00
Wolfgang Denk
98d92d8c9f sbc8349: fix incorrect comment
The comment for the BR0_PRELIM port size initialization incorrectly
stated 32 bit, while it's actually 16 bit. The code is correct.

Reported-by: Guenter Koellner <guenter.koellner@nsn.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-28 22:07:56 +01:00
Paul Gortmaker
efaf6f1bf6 mpc83xx: cosmetic comment update relating to SPD EEPROM
commit 6d0f6bcf33 did the big
rename of CFG_ macros to CONFIG_SYS macros.  But it missed
a couple of instances within comments.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-10-09 14:09:15 -05:00
Kim Phillips
c7190f028f mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.

Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS_<registername>_<bitfield> assignments in the board
config file.

also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.

also start to use i/o accessors.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-26 21:19:38 -05:00
Paul Gortmaker
00ec0ff549 sbc8349: tidy up Makefile to use new configuration script.
Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the board config header.  This takes advantage of
that for the sbc8349 board.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25 18:27:54 -05:00
Kim Phillips
79f516bccc mpc83xx: accommodate larger kernel sizes by default
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:11:44 -05:00
Paul Gortmaker
193b4cb3f6 mpc83xx: mpc8349 - delete unused SYS_MID_FLASH_JUMP
This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.

  u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
  include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
  include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP     0x7F000000
  include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP     0x7F000000
  u-boot$

It currently isn't used, so delete it before it spreads further.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:10:04 -05:00
Paul Gortmaker
c0d660fbbe mpc83xx: sbc8349 - make enabling PCI more user friendly
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:09:21 -05:00
Paul Gortmaker
fe613cdd4e sbc8349: combine HRCW flash and u-boot image flash
Up to this point in time, the sbc8349 board was storing the u-boot
image in flash 2x.  One for the HRCW value at the beginning of
flash (0xff80_0000), and once close to the end of flash (0xfff8_0000)
for the actual image that got executed.

This moves the TEXT_BASE to be the beginning of flash, which makes
the second copy of the image redundant, and frees up the flash
from the end of the environment storage to the end of the flash
device itself.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 18:35:53 -05:00
Kim Phillips
be9b56df02 mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove the former
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 10:17:54 -05:00
Kim Phillips
9993e196da mpc83xx: convert all remaining boards over to 83XX_GENERIC_PCI
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-18 19:43:04 -05:00
Peter Tyser
2c7920afaf 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x
Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Peter Tyser
0f89860494 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx
Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Peter Tyser
d48eb5131d i2c: Remove deprecated individual i2c commands
The following individual I2C commands have been removed: imd, imm, inm,
imw, icrc32, iprobe, iloop, isdram.

The functionality of the individual commands is still available via
the 'i2c' command.

This change only has an impact on those boards which did not have
CONFIG_I2C_CMD_TREE defined.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:46 +02:00
Kim Phillips
3c9b1ee17e mpc83xx: don't set SICRH_TSOBI1 to RMII/RTBI operation
In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer
impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0.
SICRH[TSIOB1] was erroneously being set high.

U-Boot always operated this PHY interface in GMII mode.  It is assumed this
was missed in the clean up by the original board porters, and copied along
to the TQM and sbc boards.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Ira Snyder <iws@ovro.caltech.edu>
Reviewed-by: David Hawkins <dwh@ovro.caltech.edu>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Dave Liu <DaveLiu@freescale.com>
2009-06-08 10:45:09 -05:00
Scott Wood
c123098035 mpc83xx: Set guarded bit on BAT that covers the end of the address space
The mpc8313erdb board currently sets DBAT6 to cover all of the final 256MiB of
address space; however, not all of this space is covered by a device.  In
particular, flash sits at 0xfe000000-0xfe7fffff, and nothing is mapped
at the far end of the address space.

In zlib, there is a loop that references p[-1] if p is non-NULL.  Under
some circumstances, this leads to the CPU speculatively loading from
0xfffffff8 if p is NULL.  This leads to a machine check.

Signed-off-by: Scott Wood <scottwood@freescale.com>

continuation to the remaining mpc83xx boards that suffer from the same problem.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-04-01 16:48:57 -05:00
Kumar Gala
540dcf1cb8 83xx: Use common LSDMR defines from asm/fsl_lbc.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-30 13:33:49 -05:00
Mike Frysinger
bdab39d358 rename CONFIG_CMD_ENV to CONFIG_CMD_SAVEENV
The CONFIG_CMD_ENV option controls enablement of the `saveenv` command
rather than a generic "env" command, or anything else related to the
environment.  So, let's make sure the define is named accordingly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-02-18 00:47:43 +01:00
Jon Loeliger
801a194616 Removed unused CONFIG_L1_INIT_RAM symbol.
Prevent further viral propogation of the unused
symbol CONFIG_L1_INIT_RAM by just removing it.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-12-01 10:28:50 -06:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5a1aceb068 rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
93f6d72544 rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHERE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:00 +02:00
Jean-Christophe PLAGNIOL-VILLARD
00b1883a4c drivers/mtd: Move conditional compilation to Makefile
rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:42 +02:00
Becky Bruce
31d8267224 PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now.  Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 17:48:41 +02:00
Kim Phillips
b211575740 mpc83xx: bump loadaddr over fdtaddr to 0x500000
this seems as a good compromise between human memory, typing,
and last but not least, to accommodate for current and future kernel bloat.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
2008-04-25 10:54:06 -05:00
Detlev Zundel
a99715b8eb Realining some header definitions.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-04-25 00:09:53 +02:00
Detlev Zundel
d8ab58b212 Replace "run load; run update" with conditionalized "run load update".
The latter version stops when "run load" fails for whatever reasons
rendering the combination *a lot* more secure.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-03-06 17:35:40 +01:00
Wolfgang Denk
c62776be8d Get rid of "#undef DEBUG" from board config files.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-02-12 00:45:06 +01:00
Dave Liu
2c5b48fc20 mpc83xx: Remove cache config from config.h
clean up the cache config from configs.h of board

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10 21:06:32 -06:00
Kim Phillips
5b8bc606c6 mpc83xx: convert to using do_fixup_*()
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:56:42 -06:00
Paul Gortmaker
e496865ecc sbc8349: enable libfdt by default on WRS SBC8349 board.
Make libfdt the default for the WRS SBC8349 board.
Parallel of commit 35cc4e4823
done for the other 83xx based boards.  Also fix a typo in CONFIG_PCI.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2008-01-08 09:55:42 -06:00
Kim Phillips
3bb342fc85 fdt: remove unused OF_FLAT_TREE_MAX_SIZE references
and make some minor corrections to the FDT part of the README.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-29 01:46:25 +02:00
Andy Fleming
10327dc554 Add CONFIG_HAS_ETH0 to all boards with TSEC
The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
to update TSEC1's device-tree node, so we need to add it
to all the boards with TSECs.  Do this for 83xx and 86xx, too,
since they will eventually do something similar.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-16 16:35:02 -05:00
Andy Fleming
3a79013e2a Define tsec flag values in config files
The tsec_info structure and array has a "flags" field for each
ethernet controller.  This field is the only reason there are
settings.  Switch to defining TSECn_FLAGS for each controller
in the config header, and we can greatly simplify the array, and
also simplify the addition of future boards.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-16 12:12:49 +02:00
Wolfgang Denk
cdd917a43d Fix build errors and warnings / code cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-02 00:48:45 +02:00
Jon Loeliger
079a136c35 include/configs/[p-z]* + misc: Cleanup BOOTP and lingering CFG_CMD_*.
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.

Remove lingering references to CFG_CMD_* symbols.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-10 10:12:10 -05:00
Jon Loeliger
866e3089bf include/configs: Use new CONFIG_CMD_* in sbc* board config files.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-05 11:04:18 +02:00
Kim Phillips
255a3577c8 Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-05-17 00:07:21 +02:00
Kumar Gala
4feab4de7b mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode
The config value for:
* CFG_ACR_PIPE_DEP
* CFG_ACR_RPTCNT
* CFG_SPCR_TSEC1EP
* CFG_SPCR_TSEC2EP
* CFG_SCCR_TSEC1CM
* CFG_SCCR_TSEC2CM

Were not being used when setting the appropriate register

Added:
* CFG_SCCR_USBMPHCM
* CFG_SCCR_USBDRCM
* CFG_SCCR_PCICM
* CFG_SCCR_ENCCM

To allow full config of the SCCR.

Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
that were just bogus.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-02 14:08:26 -06:00
Kim Phillips
22d71a71f5 mpc83xx: add command line editing by default 2007-03-02 11:05:54 -06:00
Paul Gortmaker
91e2576977 mpc83xx: U-Boot support for Wind River SBC8349
I've redone the SBC8349 support to match git-current, which
incorporates all the MPC834x updates from Freescale since the 1.1.6
release,  including the DDR changes.

I've kept all the SBC8349 files as parallel as possible to the
MPC8349EMDS ones for ease of maintenance and to allow for easy
inspection of what was changed to support this board.  Hence the SBC8349
U-Boot has FDT support and everything else that the MPC8349EMDS has.

Fortunately the Freescale updates added support for boards using CS0,
but I had to change spd_sdram.c to allow for board specific settings for
the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
default if the board doesn't specify a value.)

Hopefully this should be mergeable as-is and require no whitespace
cleanups or similar, but if something doesn't measure up then let me
know and I'll fix it.

Thanks,
Paul.
2007-03-02 11:05:53 -06:00