mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-29 16:10:58 +00:00
83xx: Use common LSDMR defines from asm/fsl_lbc.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Kumar Gala
parent
b0fe93eda6
commit
540dcf1cb8
5 changed files with 31 additions and 172 deletions
|
|
@ -248,34 +248,8 @@
|
|||
#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32 */
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON 0x0063b723
|
||||
|
||||
/*
|
||||
* SDRAM Controller configuration sequence.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -246,34 +246,8 @@
|
|||
#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32 */
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON 0x0063b723
|
||||
|
||||
/*
|
||||
* SDRAM Controller configuration sequence.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -262,60 +262,24 @@
|
|||
#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32 */
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR5 (3 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR8 (5 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT6 (5 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW3 (3 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC2 (2 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC3 (3 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BUFCMD (1 << (31 - 29))
|
||||
#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
| CONFIG_SYS_LBC_LSDMR_BSMA1516 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFCR8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_PRETOACT6 \
|
||||
| CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_BL8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_WRC3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFEN \
|
||||
| LSDMR_BSMA1516 \
|
||||
| LSDMR_RFCR8 \
|
||||
| LSDMR_PRETOACT6 \
|
||||
| LSDMR_ACTTORW3 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC3 \
|
||||
| LSDMR_CL3 \
|
||||
)
|
||||
|
||||
/*
|
||||
* SDRAM Controller configuration sequence.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -271,33 +271,16 @@
|
|||
#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32 */
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON 0x0063b723
|
||||
|
||||
/*
|
||||
* SDRAM Controller configuration sequence.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -227,60 +227,24 @@
|
|||
#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32 */
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR5 (3 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR8 (5 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT6 (5 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW3 (3 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC2 (2 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC3 (3 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BUFCMD (1 << (31 - 29))
|
||||
#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
| CONFIG_SYS_LBC_LSDMR_BSMA1516 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFCR8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_PRETOACT6 \
|
||||
| CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_BL8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_WRC3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFEN \
|
||||
| LSDMR_BSMA1516 \
|
||||
| LSDMR_RFCR8 \
|
||||
| LSDMR_PRETOACT6 \
|
||||
| LSDMR_ACTTORW3 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC3 \
|
||||
| LSDMR_CL3 \
|
||||
)
|
||||
|
||||
/*
|
||||
* SDRAM Controller configuration sequence.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in a new issue