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i2c: Remove deprecated individual i2c commands
The following individual I2C commands have been removed: imd, imm, inm, imw, icrc32, iprobe, iloop, isdram. The functionality of the individual commands is still available via the 'i2c' command. This change only has an impact on those boards which did not have CONFIG_I2C_CMD_TREE defined. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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26 changed files with 0 additions and 98 deletions
5
README
5
README
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@ -1315,11 +1315,6 @@ The following options need to be configured:
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clock chips. See common/cmd_i2c.c for a description of the
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command line interface.
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CONFIG_I2C_CMD_TREE is a recommended option that places
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all I2C commands under a single 'i2c' root command. The
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older 'imm', 'imd', 'iprobe' etc. commands are considered
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deprecated and may disappear in the future.
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CONFIG_HARD_I2C selects a hardware I2C controller.
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CONFIG_SOFT_I2C configures u-boot to use a software (aka
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@ -1204,7 +1204,6 @@ int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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}
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#endif
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#if defined(CONFIG_I2C_CMD_TREE)
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int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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{
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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@ -1314,11 +1313,9 @@ int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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cmd_usage(cmdtp);
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return 0;
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}
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#endif /* CONFIG_I2C_CMD_TREE */
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/***************************************************/
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#if defined(CONFIG_I2C_CMD_TREE)
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U_BOOT_CMD(
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i2c, 6, 1, do_i2c,
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"I2C sub-system",
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@ -1341,61 +1338,6 @@ U_BOOT_CMD(
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"i2c sdram chip - print SDRAM configuration information\n"
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#endif
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);
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#endif /* CONFIG_I2C_CMD_TREE */
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U_BOOT_CMD(
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imd, 4, 1, do_i2c_md, \
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"i2c memory display", \
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"chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \
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);
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U_BOOT_CMD(
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imm, 3, 1, do_i2c_mm,
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"i2c memory modify (auto-incrementing)",
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"chip address[.0, .1, .2]\n"
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" - memory modify, auto increment address\n"
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);
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U_BOOT_CMD(
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inm, 3, 1, do_i2c_nm,
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"memory modify (constant address)",
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"chip address[.0, .1, .2]\n - memory modify, read and keep address\n"
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);
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U_BOOT_CMD(
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imw, 5, 1, do_i2c_mw,
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"memory write (fill)",
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"chip address[.0, .1, .2] value [count]\n - memory write (fill)\n"
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);
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U_BOOT_CMD(
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icrc32, 5, 1, do_i2c_crc,
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"checksum calculation",
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"chip address[.0, .1, .2] count\n - compute CRC32 checksum\n"
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);
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U_BOOT_CMD(
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iprobe, 1, 1, do_i2c_probe,
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"probe to discover valid I2C chip addresses",
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"\n -discover valid I2C chip addresses\n"
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);
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/*
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* Require full name for "iloop" because it is an infinite loop!
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*/
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U_BOOT_CMD(
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iloop, 5, 1, do_i2c_loop,
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"infinite loop on address range",
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"chip address[.0, .1, .2] [# of objects]\n"
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" - loop, reading a set of addresses\n"
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);
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#if defined(CONFIG_CMD_SDRAM)
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U_BOOT_CMD(
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isdram, 2, 1, do_sdram,
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"print SDRAM configuration information",
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"chip\n - print SDRAM configuration information\n"
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" (valid chip values 50..57)\n"
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);
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#endif
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#if defined(CONFIG_I2C_MUX)
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@ -59,18 +59,6 @@ Who: Wolfgang Denk <wd@denx.de> and board maintainers
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---------------------------
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What: Individual I2C commands
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When: April 2009
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Why: Per the U-Boot README, individual I2C commands such as "imd", "imm",
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"imw", etc are deprecated. The single "i2c" command which is
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currently enabled via CONFIG_I2C_CMD_TREE contains the same
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functionality as the individual I2C commands. The individual
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I2C commands should be removed as well as any references to
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CONFIG_I2C_CMD_TREE.
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Who: Peter Tyser <ptyser@xes-inc.com>
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---------------------------
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What: Legacy NAND code
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When: April 2009
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Why: Legacy NAND code is deprecated. Similar functionality exists in
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@ -211,7 +211,6 @@
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/*-----------------------------------------------------------------------
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* I2C EEPROM (CAT24WC08) for environment
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*/
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#define CONFIG_I2C_CMD_TREE 1
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#define CONFIG_HARD_I2C /* I2c with hardware support */
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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@ -170,7 +170,6 @@
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_I2C_CMD_TREE 1
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#define CONFIG_I2C_MULTI_BUS 1
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#define CONFIG_SYS_SPD_BUS_NUM 0
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@ -321,7 +321,6 @@
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#define CONFIG_FSL_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
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@ -315,7 +315,6 @@
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_FSL_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
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@ -95,7 +95,6 @@
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#define CONFIG_FSL_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_OFFSET 0x3000
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#define CONFIG_SYS_I2C2_OFFSET 0x3100
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#define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */
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@ -265,7 +265,6 @@
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_FSL_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_NOPROBES {{0x52}} /* Don't probe these addrs */
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@ -337,7 +337,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_NOPROBES {{0, 0x29}} /* Don't probe these addrs */
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@ -287,7 +287,6 @@ extern unsigned long get_clock_freq(void);
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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@ -239,7 +239,6 @@ extern unsigned long get_clock_freq(void);
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
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@ -378,7 +378,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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@ -53,7 +53,6 @@
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#define CONFIG_FSL_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_OFFSET 0x3000
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#define CONFIG_SYS_I2C2_OFFSET 0x3100
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@ -230,7 +230,6 @@
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_I2C_CMD_TREE 1
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#define CONFIG_I2C_MULTI_BUS 1
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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@ -223,7 +223,6 @@
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#define CONFIG_FSL_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
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@ -226,7 +226,6 @@
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#define CONFIG_SYS_I2C_OFFSET 0x3000
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#define CONFIG_SYS_I2C2_OFFSET 0x3100
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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/* I2C EEPROM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_OFFSET 0x3000
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#define CONFIG_SYS_I2C2_OFFSET 0x3100
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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/* PEX8518 slave I2C interface */
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#define CONFIG_SYS_I2C_PEX8518_ADDR 0x70
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@ -287,7 +287,6 @@
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#if 0
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@ -266,7 +266,6 @@
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#ifdef CONFIG_HARD_I2C
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#define CONFIG_CMD_I2C
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 0 /* not used */
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#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
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#endif
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@ -129,7 +129,6 @@
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#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
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#define IIC0_BOOTPROM_ADDR 0x50
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@ -97,7 +97,6 @@
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#define CONFIG_SYS_SLOT_ID_MASK (0x3f) /* mask for slot ID bits */
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#define CONFIG_I2C_MULTI_BUS 1
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#define CONFIG_I2C_CMD_TREE 1
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#define CONFIG_SYS_MAX_I2C_BUS 2
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#define CONFIG_SYS_I2C_INIT_BOARD 1
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#define CONFIG_I2C_MUX 1
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@ -314,7 +314,6 @@
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_OFFSET 0x3000
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#define CONFIG_I2C_MULTI_BUS 1
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#define CONFIG_I2C_CMD_TREE 1
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#define CONFIG_SYS_MAX_I2C_BUS 2
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#define CONFIG_I2C_MUX 1
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@ -282,7 +282,6 @@
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_I2C
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_FSL_I2C
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CONFIG_SYS_I2C_OFFSET 0x3000
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_CMD_TREE
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#define CONFIG_SYS_I2C2_OFFSET 0x3100
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/* I2C RTC */
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