Commit graph

4 commits

Author SHA1 Message Date
Chia-Wei Wang
12770d0df0 ast2600: spl: Add boot mode detection
AST2600 supports boot from SPI(mmap), eMMC, and UART.
This patch adds the boot mode detection and return the
corresponding boot device type.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-06-22 21:30:05 -04:00
Chia-Wei Wang
af6451187c clk: ast2600: Add RSACLK control for ACRY
Add RSACLK enable for ACRY, the HW RSA/ECC crypto engine
of ASPEED AST2600 SoCs.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17 17:05:00 -05:00
Joel Stanley
4080714f5e clk: ast2600: Add YCLK control for HACE
Add YCLK enable for HACE, the HW hash engine of
ASPEED AST2600 SoCs.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17 17:05:00 -05:00
Ryan Chen
a3c85990c3 clk: aspeed: Add AST2600 clock support
This patch adds the clock control driver
for the AST2600 SoC.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2021-01-18 15:14:56 -05:00