Commit graph

553 commits

Author SHA1 Message Date
Mike Frysinger
8875bdb341 sf: sst: support newer standardized flashes
Newer SST flashes have dropped the Auto Address Increment (AAI) word
programming (WP) modes in favor of the standard page programming mode
that most flashes now support.  So add a flags field to the different
flashes to support both modes with new and old styles.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:32:59 +02:00
Mike Frysinger
66ecb7cdb0 sf: unify write disable commands
Every spi flash uses the same write disable command, so unify this in
the common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fixed commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-07-26 16:32:15 +02:00
Mike Frysinger
fba2c44e46 sf: eon/stmicro: inline useless ID defines
These defines are used in only one place, so just inline them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:31:07 +02:00
Mike Frysinger
b06afa75fa sf: kill off now-unused local state
Now that the common spi_flash structure tracks all the info that these
drivers need, kill off their local state indirection and use just what
the common code provides.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:29:59 +02:00
Mike Frysinger
d4aa500913 sf: unify write funcs
Once we add a new page_size field for write lengths, we can unify the
write methods for most of the spi flash drivers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:29:27 +02:00
Mike Frysinger
2744a4e688 sf: unify write enable commands
Every spi flash uses the same write enable command, so unify this in
the common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:28:21 +02:00
Graeme Russ
e110c4fe44 Timer: Allow reset_timer() only for systems with low resolution timers 2011-07-26 14:52:53 +02:00
Graeme Russ
a60d1e5b8e Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-07-16 11:55:00 +02:00
Alex Waterman
eced4626e4 NAND: Add 16bit NAND support for the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two config entries were added:

  CONFIG_SYS_NDFC_16        - Setting this tells the NDFC that a
			      16 bit device is attached.
  CONFIG_SYS_NDFC_EBC0_CFG  - This is for the External Bus
			      Controller configuration register.

Also, a new ndfc_read_byte() function was added which does not
first convert the data to little endian.

The NAND SPL was also modified to do 16bit bad block testing
when a 16 bit chip is being used.

Signed-off-by: Alex Waterman <awaterman@dawning.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:52 -05:00
Ben Gardiner
169d54d8b3 nand_util: drop trailing all-0xff pages if requested
Add a flag to nand_read_skip_bad() such that if true, any trailing
pages in an eraseblock whose contents are entirely 0xff will be
dropped.

The implementation is via a new drop_ffs() function which is
based on the function of the same name from the ubiformat
utility by Artem Bityutskiy.

This is as-per the reccomendations of the UBI FAQ [1]

[1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Artem Bityutskiy <dedekind1@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Ben Gardiner
c135456ff5 nand_util: treat WITH_YAFFS_OOB as a mode
When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an
operation which is mutually exclusive with the 'usual' way of writing.

Add a check that client code does not specify WITH_YAFFS_OOB along with any
other flags and add a comment indicating that the WITH_YAFFS_OOB flag should
not be mixed with other flags.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Ben Gardiner
a6c9aa1f92 nand_util: convert nand_write_skip_bad() to flags
In a future commit the behaviour of nand_write_skip_bad()
will be further extended.

Convert the only flag currently passed to the nand_write_
skip_bad() function to a bitfield of only one allocated
member. This should avoid an explosion of int's at the
end of the parameter list or the ambiguous calls like

nand_write_skip_bad(info, offset, len, buf, 0, 1, 1);
nand_write_skip_bad(info, offset, len, buf, 0, 1, 0);

Instead there will be:

nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB |
			WITH_OTHER);

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Ben Gardiner
bee038e9fe nand_base: trivial: fix comment read/write comment
Replace an incorrect 'read' with 'write' in a comment.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Mike Frysinger
4c2105cb9f cfi_flash: reverse geometry for newer STM parts
For newer STM parts where CFI >= 1.1, there is a byte in the extended
structure that declares the flash layout type (just like the AMD parts),
so key off of that to find out when we need to reverse the geometry.

This can be seen with M29W640 parts where U-Boot does:
Bank # 1: CFI conformant FLASH (16 x 16)  Size: 8 MB in 135 Sectors
  AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22ED
  Erase timeout: 8192 ms, write timeout: 1 ms
  Buffer write timeout: 1 ms, buffer size: 16 bytes

  Sector Start Addresses:
  20000000   RO   20002000   RO   20004000   RO   20006000   RO   20008000   RO
  2000A000   RO   2000C000   RO   2000E000   RO   20010000   RO   20020000   RO
  ...

But Linux does:
physmap platform flash device: 00800000 at 20000000
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank.
                 Manufacturer ID 0x000020 Chip ID 0x0022ed
physmap-flash.0: Swapping erase regions for top-boot CFI table.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-06-29 10:05:19 +02:00
Patrick Sestier
bd0d19cc5f sf: kick watchdog when polling
The status polling can take a while, so make sure we kick the
watchdog after each successful poll.

Signed-off-by: Patrick Sestier <psestier@mircom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-01 22:21:42 +02:00
Macpaul Lin
f194f6ba5b ftsmc020: fix relocation
Avoid relocation problem by fix global declaration.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-05-12 23:43:27 +02:00
Macpaul Lin
00d10eb041 ftsmc020: move ftsmc020 static mem controller to driver/mtd
Move the header file and definitions of ftsmc020
static memory control unit from a320 SoC folder to
"drivers/mtd" folder.

This change will let other SoC which also use ftsmc020
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-04-27 19:38:10 +02:00
Aaron Williams
a90b9575f3 cfi_flash driver - Add delay after reset command
I ran into a problem where the reset was failing except when I enabled
debugging support.  After talking with Garret Swalling at Spansion I
was told that the GL-N series of devices require a 500ns wait for the
reset to complete.  The below patch adds a 1us delay after all reset
commands.

-Aaron Williams

Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 15:51:49 +02:00
Heiko Schocher
5b448adb4b mtd, cfi: read AMD 3-byte (expanded) device ids on 16bit devices
tested on the a4m072 board with a S29GL512P flash.

flinfo without this patch
Bank # 1: CFI conformant flash (16 x 16)  Size: 32 MB in 256 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E
  Erase timeout: 16384 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 32 bytes
[...]

flinfo with this patch
Bank # 1: CFI conformant flash (16 x 16)  Size: 32 MB in 256 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
  Erase timeout: 16384 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 32 bytes
[...]

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 15:51:39 +02:00
Mike Frysinger
6a011ce851 cfi_flash: reverse geometry for M29W800DT parts
The M29W800DT parts also report their geometry with the sector layout
reversed.  So add that ID to the flash_fixup_stm function.

Otherwise, we get:
bfin> flinfo

Bank # 1: CFI conformant FLASH (16 x 16)  Size: 1 MB in 19 Sectors
  AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22D7
  Erase timeout: 8192 ms, write timeout: 1 ms

  Sector Start Addresses:
  20000000        20004000        20006000        20008000        20010000
  20020000        20030000        20040000        20050000        20060000
  20070000        20080000        20090000        200A0000        200B0000
  200C0000        200D0000        200E0000        200F0000

Reported-by: Jianxi Fu <fujianxi@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-21 15:51:17 +02:00
Florian Fainelli
aad99bbc39 NAND: rearrange ONFI revision checking, add ONFI 2.3
This patch sync with Brian's patch on Linux in nand_flash_detect_onfi()

	commit b7b1a29d94c17e4341856381bccb4d17495bea60
	Author: Brian Norris <computersforpeace@gmail.com>
	Date:   Sun Dec 12 00:23:33 2010 -0800

	    mtd: nand: rearrange ONFI revision checking, add ONFI 2.3

	    In checking for the ONFI revision, the first conditional (for checking
	    "unsupported" ONFI) seems unnecessary.  All ONFI revisions should be
	    backwards-compatible; even if this is not the case on some newer ONFI
	    revision, it should simply fail the second version-checking if-else block
	    (i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we
	    move our "unsupported" condition after having checked each bit field.

	    Also, it's simple enough to add a condition for ONFI revision 2.3. Note
	    that this does *NOT* mean we handle all new features of ONFI versions
	    above 1.0.

	    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
	    Acked-by: Florian Fainelli <ffainelli@freebox.fr>
	    Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2011-04-15 15:53:11 -05:00
Florian Fainelli
a931f49296 NAND: Fix integer overflow in ONFI detection of chips >= 4GiB
This patch sync with David's patch on Linux in nand_flash_detect_onfi()

	commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5
	Author: David Woodhouse <David.Woodhouse@intel.com>
	Date:   Fri Dec 3 16:36:34 2010 +0000

    	mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB

    	Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2011-04-15 15:53:11 -05:00
Wolfgang Denk
f16b608ae7 Merge branch 'sf' of git://git.denx.de/u-boot-blackfin 2011-04-13 22:04:11 +02:00
Peter Tyser
2c51983b81 cfi_flash: Fix CONFIG_SYS_FLASH_AUTOPROTECT_LIST usage
Commit 6ee1416e81 (mtd, cfi: introduce
void flash_protect_default(void)) introduced a bug which resulted in
boards that define CONFIG_SYS_FLASH_AUTOPROTECT_LIST not compiling with
the the following errors and warning:
  ptyser@petert u-boot $ make -s xpedite520x
  Configuring for xpedite520x board...
  cfi_flash.c: In function 'flash_protect_default':
  cfi_flash.c:2118: error: 'i' undeclared (first use in this function)
  cfi_flash.c:2118: error: (Each undeclared identifier is reported only once
  cfi_flash.c:2118: error: for each function it appears in.)
  cfi_flash.c:2118: error: 'apl' undeclared (first use in this function)
  cfi_flash.c:2118: error: invalid application of 'sizeof' to incomplete type 'struct apl_s'
  cfi_flash.c: In function 'flash_init':
  cfi_flash.c:2137: warning: unused variable 'apl'

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reported-by: Kumar Gala <galak@kernel.crashing.org>
Cc: Heiko Schocher <hs@denx.de>
2011-04-13 21:50:25 +02:00
James Kosin
1c091f59a0 sf: sst: add support for SST25VF064C
Signed-off-by: James Kosin <jkosin@intcomgrp.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13 15:39:08 -04:00
Mike Frysinger
493c360721 sf: use print_size() for sector_size output
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:30:25 -04:00
Mike Frysinger
f8f0757dcb sf: localize erase funcs
No need for these to be exported as they are only accessed indirectly
via function pointers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:56 -04:00
Mike Frysinger
c5910874ba sf: sst: setup read func
The previous unification patch missed setting up the sst read func.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:54 -04:00
Richard Retanubun
4e6a515899 sf: add struct spi_flash.sector_size parameter
This patch adds a new member to struct spi_flash (u16 sector_size)
and updates the spi flash drivers to start populating it.

This parameter can be used by spi flash commands that need to round
up units of operation to the flash's sector_size.

Having this number in one place also allows duplicated code to be
further collapsed into one common location (such as erase parameter
and the detected message).

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-12 02:15:37 -04:00
Mike Frysinger
cdb6a00fb8 sf: atmel: undo unification of status polling
The AT45 flashes are completely different (at the command set and
status register level) from all other SPI flashes, so we can't unify
their logic with common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 23:41:09 -04:00
Mike Frysinger
a4c3b40b33 sf: unify read functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:55 +02:00
Mike Frysinger
e7b44eddbe sf: unify erase functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:54 +02:00
Mike Frysinger
6163045bcd sf: unify status polling for ready bit
All of the spi flash drivers implement the status register polling for
detecting the device ready state, so unify them all in a new helper
function -- spi_flash_wait_ready.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:53 +02:00
Mike Frysinger
000044d8bf sf: unify read/write helpers
These functions largely do the same exact thing, so unify them all
into one basic function.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 21:00:49 +02:00
Heiko Schocher
6ee1416e81 mtd, cfi: introduce void flash_protect_default(void)
collect code which protects default sectors in a function, called
flash_protect_default. So boardspecific code can call it too.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-07 10:20:22 +02:00
Mario Schuknecht
2c9f48af73 cfi_flash: use AMD fixups for AMIC (e.g. A29L160A series) too
Signed-off-by: Mario Schuknecht <m.schuknecht@dresearch.de>
Signed-off-by: Steffen Sledz <sledz@dresearch.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-04-07 10:10:47 +02:00
michael
67a490d60d atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN
If NCE is hooked up to NCS3, we don't need to (and can't)
explicitly set the state of the NCE pin. Instead, the
controller asserts it automatically as part of a
command/data access. Only "CE don't care"-type NAND chips
can be used in this manner.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-04-01 14:49:08 -05:00
Florian Fainelli
0272c718ba NAND: add support for reading ONFI page table
This patch adds support for reading an ONFI page parameter from a NAND
device supporting it. If this is the case, struct nand_chip onfi_version
member contains the supported ONFI version, 0 otherwise.

This allows NAND drivers past nand_scan_ident to set the best timings for the
NAND chip.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Scott Wood
6f2ffc3da2 NAND: add more watchdog resets
Poke the watchdog in a variety of looping constructs, which could take
a long time to complete.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Martin Krause
af56730153 cfi_flash: fix bug with flash banks with different sector numbers
The function find_sector() does not take into account if the flash bank
has changed since the last call. This could lead to illegal accesses inside
and beyond the flash_info_t info strcture. For example if the current
flash bank has less sectors than the last used flash bank.

This patch adds two cheks. One that insures, that the current sector does
not exceed the allowed maximum (which is always a good idea). And one that
checks if the current access is to the same flash bank as the last access.
If not, the search loop will start with sector 0.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-03-28 19:06:51 +02:00
Wolfgang Denk
d1a24f0618 Minor Coding Style Cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-02-02 22:36:10 +01:00
Stefano Babic
58c758fe5a mxc_nand: add support for i.MX35 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2011-02-02 00:54:42 +01:00
Peter Tyser
eddf52b593 Replace "FLASH" strings with "Flash" or "flash"
There's no compelling reason to have the output on bootup or the
"flinfo" command print "flash" in uppercase, so use the proper case
where appropriate.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2011-01-19 00:02:37 +01:00
Lei Wen
245eb90091 mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()
This patch sync with David's patch on Linux for handling nand_scan_ident.

	commit 5e81e88a4c140586d9212999cea683bcd66a15c6
	Author: David Woodhouse <David.Woodhouse@intel.com>
	Date:   Fri Feb 26 18:32:56 2010 +0000

	mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()

	Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-01-12 17:13:10 -06:00
Lei Wen
47fc18f1e7 NAND: add the ability to directly write yaffs image
This patch add addition suffix to nand write to give the uboot
the power to directly burn the yaffs image to nand.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-01-12 17:13:10 -06:00
Alexander Holler
7fab9dfffa nand: fix bug with multiple NAND devices if CONFIG_MTD_DEVICE is defined.
The variable i has to be static, otherwise it would be always zero.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
2011-01-12 17:13:10 -06:00
David Müller
3b8b240ddb add AM29F400BB to table of supported legacy flashs
Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-01-11 10:43:31 +01:00
Mike Frysinger
4ffeab2cc0 cfi_flash: avoid flash_verbose when possible
The flash_verbose logic is only used by the CFI MTD layer, so if we aren't
using that, disable the logic completely.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-09 18:05:11 +01:00
Reinhard Meyer
7a8fc36e6c MTD/NAND: fix nand_base.c to use get_timer() correctly
This is part of the timer cleanup effort.
In the future we only use get_timer() in its intended way to
program timeout loops.
reset_timer() shall not be used anymore.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-12-17 14:32:12 -06:00
Mike Frysinger
0bdecd82dd nand: constify id/manu tables
These id tables need not be writable.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-12-17 14:32:11 -06:00
Wolfgang Denk
6afde8bfd0 Merge branch 'next' of git://www.denx.de/git/u-boot-cfi-flash into next 2010-12-17 20:11:54 +01:00
Wojtek Skulski
93eab86bfd sf: winbond: add support for W25Q16/32/128 parts
While we're here, cut out the useless id defines too.

Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-12-17 08:53:55 -05:00
Chong Huang
d1d9065647 sf: new driver for EON devices
Signed-off-by: Chong Huang <chuang@ucrobotics.com>
Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-12-17 08:53:55 -05:00
Stefan Roese
6f726f9584 cfi_flash: Add optional config register write to cfi-detection
This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a register that can be used to configure the operation
mode to a non-default value.

This method will be used by the t3corp board, which needs to
configure the DS617 Xilinx flash for async read mode.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-12-17 09:56:05 +01:00
Stefan Roese
4d2ca9d6a0 cfi_flash: Use flash_read32() in sector_erased()
The function sector_erased() is modified to not use pointer
access, but to use the correct accessor functions. This fixes a
problem on the t3corp board with the Xilinx DS617 flash chips. Here
a board specific accessor function is needed to read from flash
in 32bit mode. This patch enables such an operation mode.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-12-17 09:54:10 +01:00
Stefan Roese
df4e813b72 cfi_flash: Fix problems with status/id read mode
This patch adds some calls to set the flash chip in the read-status-
register- or read-id-mode before the corresponding register is
read back. This problem was detected while porting the common CFI
driver to support the Xilinx DS617 flash chips.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-12-17 09:54:03 +01:00
John Schmoller
9fd84915a9 fsl_upm: Add MxMR/MDR synchronization
According to Freescale reference manuals (eg section "13.4.4.2
Programming the UPMs" of the P4080 Reference Manual):

"Since the result of any update to the MxMR/MDR register must be in
effect before the dummy read or write to the UPM region, a write to
MxMR/MDR should be followed immediately by a read of MxMR/MDR."

The UPM on a custom P4080-based board did not work without performing
a read of MxMR/MDR after a write.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-12-13 09:32:15 -06:00
David Müller (ELSOFT AG)
2111cb44a7 fix s3c2410_nand timing default values
The attached patch fixes wrong timing default values and adds the
possibility to specify board specific timing value in the board config file.

Signed-off-by: David Mueller <d.mueller@elsoft.ch>
2010-12-06 18:28:48 -06:00
Anatolij Gustschin
34bbb8fb46 cfi_flash: fix bug introduced while recent change to flash_get_size()
commit ec50a8e389
"cfi_flash: handle 'chip size exceeds address window' situation"
added 3rd argument to flash_get_size() but didn't fix all the
function calls from the board specific code. Many boards have
their own flash_get_size() definitions in the board code and
use them there, but some boards (e.g. tqm834x, tqm85xx, pdm360ng)
use flash_get_size() from the cfi_flash.c driver.

The bug shows up if the value of the "max_size" argument (which
is not defined when calling the function with two arguments)
happens to be less than "info->size". In this case on the
affected boards we end up with a bank of reduced size and
in the worst case might even be not able to update U-Boot or
to boot the kernel from flash:

=> fli

Bank # 1: CFI conformant FLASH (32 x 16)  Size: 0 kB in 1 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E
  Erase timeout: 4096 ms, write timeout: 1 ms
  Buffer write timeout: 3 ms, buffer size: 64 bytes

  Sector Start Addresses:
  F0000000   RO

Bank # 2: CFI conformant FLASH (32 x 16)  Size: 128 MB in 512 Sectors
  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E
  Erase timeout: 4096 ms, write timeout: 1 ms
  Buffer write timeout: 3 ms, buffer size: 64 bytes

  Sector Start Addresses:
  F8000000        F8040000        F8080000        F80C0000        F8100000
  F8140000        F8180000        F81C0000        F8200000        F8240000
  ...

E.g., updating U-Boot is not possible now:

=> protect off ${u-boot_addr} +${u-boot_size}
Error: end address (0xf007ffff) not in flash!
Bad address format
=> era ${u-boot_addr} +${u-boot_size}
Error: end address (0xf007ffff) not in flash!
Bad address format

This patch removes the 3rd argument of flash_get_size() again
and sets "max_size" in the function itself instead of passing
it as a function argument.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-11-28 19:41:11 +01:00
Stefan Roese
c5d02825ae ppc4xx/NAND: Reduce size of NAND SPL image
This is needed for the canyonlands_nand build target. Without it
the resulting image won't fit into 4k.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:09 +01:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Reinhard Meyer
e0987e251f sf: ramtron: new spi fram driver
Supports most types that support Read-Id and the FM25H20.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-11-10 04:26:18 -05:00
Wolfgang Denk
17dd883c5b Merge branch 'master' of git://git.denx.de/u-boot-samsung 2010-10-29 21:47:48 +02:00
Wolfgang Denk
2e5167ccad Replace CONFIG_RELOC_FIXUP_WORKS by CONFIG_NEEDS_MANUAL_RELOC
By now, the majority of architectures have working relocation
support, so the few remaining architectures have become exceptions.
To make this more obvious, we make working relocation now the default
case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-29 21:32:07 +02:00
C Nauman
d9abba8254 Add generic support for samsung s3c2440
This patch adds generic support for the Samsung s3c2440 processor.

Global s3c24x0 changes to struct members converting from upper case to
lower case.

Signed-off-by: Craig Nauman <cnauman@diagraph.com>
Cc: kevin.morfitt@fearnside-systems.co.uk
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-10-28 15:35:56 +09:00
Ilya Yanok
ec50a8e389 cfi_flash: handle 'chip size exceeds address window' situation
On some boards we have flash mapped high in the address space with
considerably small window (say 0xFE000000 and 32MB). When we install
bigger chip (say 64MB) on such a board strange things happen
(flash_write() doesn't work at all, for ex). That's because cfi_flash
driver doesn't care about window size at all.
Of course, cleanest solution would probably be to just extend address
window to be able to map the whole flash but for legacy/compatibility
reasons some people prefer just truncate the flash size and never use
the upper part.
This patch adds an option for cfi_flash driver to handle this situation
properly. To achieve this we add the new function cfi_flash_bank_size()
which can be provided by the board code and weak-aliased to default
implementation that returns value from the CONFIG_SYS_FLASH_BANKS_SIZES
array if it's defined or 0 otherwise (the last case is added for
compatibility).
If non-zero flash bank size is provided and detected chip size is bigger
than provided address window size the warning will be displayed and
flash chip will be truncated.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>

Changed cfi_flash_bank_size() return type to unsigned long
to match caller function.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-23 21:04:49 +02:00
Ben Gardiner
10d6ac94e0 davinci_nand, trivial : use symbolic ECC start command
The ECC calculations were started by writing 1 << 13 to the nand FCR register;
that value is also defined as DAVINCI_NANDFCR_4BIT_CALC_START in emif_defs.h.

This patch substitutes the macro DAVINCI_NANDFCR_4BIT_CALC_START for the
magic number '1 << 13'.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:43 +02:00
Reinhard Meyer
0d3fe2b153 sf: turn probe switch into a lookup table
This allows for arbitrarily long manufacturer ids following the JEDEC
standard of 0x7f continuation bytes.  It also makes adding new entries
easier as it's just one element in an array.  The downside is that it
increases code size a bit, but we're talking ~50 bytes.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-12 21:08:25 -04:00
Wolfgang Denk
c0c3590bb2 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2010-10-12 20:49:27 +02:00
John Schmoller
0e3fa01a63 cfi_flash: Fix "Unknown FLASH" error message
When a CFI flash chip could not be detected an error message similar to
the following would be printed on bootup:

 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 0 MB

The printf incorrectly converted the flash size into megabytes.  This
patch fixes the printing of the flash size in megabytes:

 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 16 MB

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-12 08:59:15 +02:00
Enric Balletbo i Serra
456be17dbe mtd: OneNAND: add support for OneNAND manufactured by Numonyx
This patch adds the Numonyx manufacturer code (0x20) to
onenand manufacturers.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
2010-10-11 15:15:45 -05:00
Scott Wood
36650ca9f1 Followup fixes on the mtdparts spread patchset
Consolidate some code in mtd_get_len_incl_bad(), and fix a condition
where a valid partition could be reported as truncated if it has a
good block at the end of the device (unlikely, since the BBT is usually
there).

Fix mid-block declarations in net_part_size().

Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:11:01 -05:00
Ben Gardiner
4ba692fb1e mtd: add an mtd method for get_len_incl_bad()
The logic to 'spread' mtd partitions needs to calculate the length in
the mtd device, including bad blocks.

This patch introduces a new function, mtd_get_len_incl_bad that can
return both the length including bad blocks and whether that length
was truncated on the device. This new function will be used by the
mtdparts spread command later in this series. The definition of the
function is #ifdef'd out in configurations that do not use the new
'mtdparts spread' command.

Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
CC: Scott Wood <scottwood@freescale.com>
2010-10-11 15:11:00 -05:00
Scott Wood
5b8e6bb517 nand: remove dead code and suspend/resume
Get rid of the several "#if 0" sections that were keeping around Linux
code that isn't relevant to U-Boot.  Besides cluttering the code, these
sections make tracking upstream changes harder, rather than easier.
It's easy to discard obviously irrelevant diff hunks that patch rejects,
but it's not as easy to notice hunks that apply cleanly to the #if 0
section, but *are* relevant to U-Boot and require modification elsewhere.

Also remove suspend/resume, as this is not applicable to U-Boot.  Removal
saves 232 bytes on powerpc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:10:35 -05:00
Scott Wood
3048632251 nand erase: .spread, .part, .chip subcommands
A while back, in http://lists.denx.de/pipermail/u-boot/2009-June/054428.html,
Michele De Candia posted a patch to not count bad blocks toward the
requested size to be erased.  This is desireable when you're passing in
something like $filesize, but not when you're trying to erase a partition.

Thus, a .spread subcommand (named for consistency with
http://lists.denx.de/pipermail/u-boot/2010-August/075163.html) is introduced
to make explicit the user's desire to erase for a given amount of data,
rather than to erase a specific region of the chip.

While passing $filesize to "nand erase" is useful, accidentally passing
something like $fliesize currently produces quite unpleasant results, as the
variable evaluates to nothing and U-Boot assumes that you want to erase
the entire rest of the chip/partition.  To improve the safety of the
erase command, require the user to make explicit their intentions by
using a .part or .chip subcommand.  This is an incompatible user interface
change, but keeping compatibility would eliminate the safety gain, and IMHO
it's worth it.

While touching nand_erase_opts(), make it accept 64-bit offsets and sizes,
fix the percentage display when erase length is rounded up, eliminate
an inconsistent warning about rounding up the erase length which only
happened when the length was less than one block (rounding up for $filesize
is normal operation), and add a diagnostic if there's an attempt to erase
beginning at a non-block boundary.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:10:17 -05:00
Scott Wood
f9a5254111 nand util: read/write: accept unaligned length
The underlying code in nand_base.c already supports non-page-aligned reads
and writes, but the block-skipping wrapper code did not.

With block skipping, an unaligned start address is not useful since you
really want to be starting at the beginning of a partition -- or at least
that's where you want to start checking for blocks to skip, but we don't
(yet) support that.  So we still require the start address to be aligned.

An unaligned length, though, is useful for passing $filesize to the
read/write command, and handling it does not complicate block skipping.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:09:23 -05:00
David Jander
ff0dc2c433 sf: spansion: add support for S25FL032P parts
This patch introduces an extra mask-field in spansion_spi_flash_params
to support flash chips with 1-byte extended ID (like the S25FL032P).

Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 20:50:38 -04:00
Marc-André Hébert
c3cb09207f sf: spansion: fixing erasing when sector size >64KiB
The spansion_erase currently only works when the sector size is 64KB.
cmd[1] should contain the higher 8 bit of the 24 bit address of the
sector to be erased. Currently it is holding the sector index to be
erased which happens to be the same thing when the sector size is
64KB.

Signed-off-by: Marc-Andre Hebert <marc-andre.hebert@humanware.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 20:50:38 -04:00
Graeme Smecher
74f9e0d8a0 sf: winbond: add support W25Q64 parts
Adds support for Winbond's W25Q64 SPI flash. These devices are used on
(among others) Xilinx' SP601 and SP605 Spartan-6 evaluation boards.
Tested with "sf" commands.

Signed-off-by: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 03:34:10 -04:00
Wolfgang Denk
2e6e1772c0 Merge branch 'next' of /home/wd/git/u-boot/next
Conflicts:
	include/ppc4xx.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-28 23:30:47 +02:00
Karl Beldan
86af10cac4 Fix "ubi part" cmd re-entrancy
Commit 2ee951ba (UBI: Enable re-initializing of the "ubi part" command)
reset mtd_devs in ubi_exit() but missed ubi_init()'s failure path.

Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-27 15:06:00 +02:00
Stefan Roese
b36df56115 ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
3c29975e94 cfi_flash: Remove uneccessary #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Now that the defines are moved to header files we don't need this
conditional compilation any more. Remove it.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-20 15:09:00 +02:00
Stefan Roese
ca5def3f30 cfi_flash: Simplify dynamic flash bank number detection
This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board
specific code is minimized. Currently only the following board use
this feature:

APC405, IDS8247, TQM834x

And IDS8247 doesn't seem to really need this feature, since its not
updating the bank number variable at all. So this patch removes the
definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.

This new framework will be used by the upcoming lwmon5 update as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
2010-09-20 15:08:51 +02:00
Stefan Roese
b00e19cc6b cfi_flash: Add weak default for cfi_flash_bank_addr()
cfi_flash_bank_addr(int bank_nr) returns the base addresses of the
requested bank. Introducing this weak default enables boards to override
this functions with a board specific version when required.

This feature will be used in the lwmon5 board update, supporting runtime
detection of 2 board revisions with different flash layouts.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-20 15:08:43 +02:00
Stefan Roese
cba34aafde cfi_flash: Simplify flash_get_info()
This patch removes an unecessary check in the return statement. This is
not needed, since "info" is initializes to NULL. And "info" will not be
written to again, if the flash address is not found.

Additionally "info" is not initialized to "0" but to "NULL".

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-20 15:08:33 +02:00
Wolfram Sang
1075b07e2c nand/davinci: make sure ECC calculation has really started
Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.

See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-13 14:43:05 -05:00
Wolfgang Denk
a78ded1311 Merge branch 'master' of git://git.denx.de/u-boot-ti 2010-09-09 19:55:02 +02:00
Steve Sakoman
4c468397cf mtd: nand: supress 'unknown NAND' warning if no nand is found
This printk was added recently and results in ugly output on systems
with no NAND:

NAND:  nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB

instead of:

NAND:  0 MiB

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:29 -04:00
Wolfgang Denk
09b4a9cf40 Merge branch 'master' of git://git.denx.de/u-boot-samsung 2010-09-08 00:03:22 +02:00
Minkyu Kang
889a275d42 ARMV7: S5P: rename from CONFIG_S5PC1XX to CONFIG_S5P
Use the same configuration around S5P SoCs.
(s5pc100, s5pc110, s5pc210 and so on)

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-08-26 17:33:23 +09:00
Philippe De Muyter
54652991ca Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips.
I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30
256-Mbit 65nm flash chips.

After some time :( searching for bugs in our board or soft, we have
discovered that those chips have a small but annoying bug, documented in
"Numonyx Axcell P33/P30 256-Mbit Specification Update"

It states :
When customer uses [...] block unlock, the block lock status might be
altered inadvertently. Lock status might be set to either 01h or 03h
unexpectedly (00h as expected data), which leads to program/erase failure
on certain blocks.

A working workaround is given, which I have applied and tested with success :

Workaround:  If the interval between 60h and its subsequent command
	     can be guaranteed within 20us, Option I is recommended,
	     otherwise Option II (involves hardware) should be selected.
Option I: The table below lists the detail command sequences:
Command
	      Data bus           Address bus       Remarks
Sequence
  1              90h            Block Address
						   Read Lock Status
  2             Read         Block Address + 02h
 (2)(3)                                      (1)
3                60h           Block Address
 (2)(3)                                      (1)   Lock/Unlock/RCR Configuration
4           D0h/01h/03h        Block Address
Notes:
(1) Block Address refers to RCR configuration data only when the 60h
    command sequence is used to set RCR register combined with 03h
    subsequent command.
(2) For the third and fourth command sequences, the Block Address must
    be the same.
(3) The interval between 60h command and its subsequent D0h/01h/2Fh/03h
    commands should be less than 20us.

And here is a log comparison of a simple (destructive) flash test without
and with the workaround.

 diff without-numonyx-workaround.log with-numonyx-workaround.log
 -U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:07:47)
 +U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:25:19)

  CPU:   Freescale MCF5484
         CPU CLK 200 MHz BUS CLK 100 MHz
  Board: Macq Electronique ME2060
  I2C:   ready
  DRAM:  64 MiB
  FLASH: 32 MiB
  In:    serial
  Out:   serial
  Err:   serial
  Net:   FEC0, FEC1
  -> flinfo

  Bank # 1: CFI conformant FLASH (16 x 16)  Size: 32 MB in 259 Sectors
    Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8922
    Erase timeout: 4096 ms, write timeout: 1 ms
    Buffer write timeout: 5 ms, buffer size: 1024 bytes

    Sector Start Addresses:
    FE000000 RO   FE008000 RO   FE010000 RO   FE018000 RO   FE020000 RO
    FE040000 RO   FE060000 RO   FE080000 RO   FE0A0000 RO   FE0C0000 RO
    ...
    FFF80000 RO   FFFA0000 RO   FFFC0000 RO   FFFE0000 RO
  -> protect off all
  Un-Protect Flash Bank # 1
  ................... done
  -> erase all
  Erase Flash Bank # 1
  ................... done
  -> cp.b 1000000 fe000000 2000000
 -Copy to Flash... Flash not Erased
 +Copy to Flash... done
  ->

Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-18 09:09:00 +02:00
Stefan Roese
70084df712 cfi_flash: Cleanup flash_print_info()
This patch does the following:

- Extract code to detect if sector is erased into function
  sector_erased().
- Because of this, we don't have variable declarations inside the
  sector loop in flash_print_info()
- Change "return" to "break" in the "if (ctrlc()) statement:
  This fixes a problem with the resulting output. Before this
  patch the output was:

  Sector Start Addresses:
  FC000000        FC020000        FC040000   =>

  With this patch it is now:

  Sector Start Addresses:
  FC000000        FC020000        FC040000
  =>

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
2010-08-18 09:09:00 +02:00
Philippe De Muyter
d77c7ac47e Fix printing & reading of 16-bit CFI device identifiers
Fix reading and printing of CFI flashes 16-bit devices identifiers

Nowadays CFI flashes have a 16-bit device identifier.  U-boot still
print them and read them as if they were only 8-bit wide.  Fix that.
Before:
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B
After:
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x881B

Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-18 09:09:00 +02:00
Kim Phillips
2e97394a6d cfi_flash: flinfo: allow user interrupt in flash print info fn
flashes getting larger, users more impatient.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-18 09:09:00 +02:00
Wolfgang Denk
cdb749778a Rename getenv_r() into getenv_f()
While running from flash, i. e. before relocation, we have only a
limited C runtime environment without writable data segment. In this
phase, some configurations (for example with environment in EEPROM)
must not use the normal getenv(), but a special function.  This
function had been called getenv_r(), with the idea that the "_r"
suffix would mean the same as in the _r_eentrant versions of some of
the C library functions (for example getdate vs. getdate_r, getgrent
vs. getgrent_r, etc.).

Unfortunately this was a misleading name, as in U-Boot the "_r"
generally means "running from RAM", i. e. _after_ relocation.

To avoid confusion, rename into getenv_f() [as "running from flash"]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-08-04 00:45:36 +02:00
Becky Bruce
f51cdaf191 83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Wolfgang Denk
cb8f031729 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-07-14 21:54:45 +02:00
Mike Frysinger
253f47f3a7 Blackfin: bfin_nand: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
2010-07-13 17:50:49 -04:00
Mike Frysinger
bc1a884686 mtd: nand_plat: add simple GPIO framework DEV_READY option
Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
framework.  Also make the NAND_PLAT_INIT() define optional.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
2010-07-08 16:52:12 -05:00
Florian Fainelli
1445f6ffd5 NAND: add Toshiba TC58NVG0 identifier
The Toshiba TC58NVG0* parts are 128Mbytes x 8 bits 3.3V parts with the 0xD1
identifier. Add these to the list of known devices IDs.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2010-07-08 16:49:50 -05:00
Florian Fainelli
3e9b349c7f NAND: show manufacturer and device ID for unknown chips
When the NAND part is not supported, it is useful to show the manufacturer
and device ID to help debugging and reporting.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2010-07-08 16:49:50 -05:00
Mike Frysinger
b376bbb49f sf: move useful messages from debug to printf
At the moment, the default SPI flash subsystem is quite terse.  Errors and
successes both result in a generic message.  So move the useful errors and
useful successes to printf output by default.

While we're here, also convert the messages to use print_size().

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-06-30 23:47:08 -04:00
Thomas Chou
12c2e3bbbe spi_flash: support old STMicro parts with RES
Some old STMicro parts do not support JEDEC ID (0x9f). This patch
uses RES (0xab) to get Electronic ID and translates it to JEDEC ID.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-06-30 23:47:08 -04:00
Peter Horton
ceeba00308 UBI: initialise update marker
UBI: initialise update marker

The in kernel copy of a volume's update marker is not initialised from the
volume table. This means that volumes where an update was unfinnished will
not be treated as "forbidden to use". This is basically that the update
functionality was broken.

Signed-off-by: Peter Horton <zero@colonel-panic.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-06-23 00:00:05 +02:00
Andrew Caldwell
c941b77adc Blackfin: nand: drain the write buffer before returning
The current Blackfin nand write function fills up the write buffer but
returns before it has had a chance to drain.  On faster systems, this
isn't a problem as the operation finishes before the ECC registers are
read, but on slower systems the ECC may be incomplete when the core tries
to read it.

So wait for the buffer to drain once we're done writing to it.

Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-05-26 17:59:13 -05:00
Stefan Roese
1b1f9a9d00 UBI: Ensure that "background thread" operations are really executed
The current U-Boot UBI implementation is copied from Linux. In this
porting the UBI background thread was not handled correctly. Upon write
operations ubi_wl_flush() makes sure, that all queued operations, like
page-erase, are completed. But this is missing for read operations.

This patch now makes sure that such operations (like scrubbing upon
bit-flip errors) are not queued, but executed directly.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-05-19 10:57:19 +02:00
Albin Tonnerre
f852a0c3bf drivers/mtd/spi/eeprom_m95xxx.c: add missing error checking
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
2010-04-09 23:05:54 +02:00
Thomas Chou
22d6c8faac cfi_flash: reset timer in flash status check
This patch adds reset_timer() before the flash status check
waiting loop.

Since the timer is basically running asynchronous to the cfi
code, it is possible to call get_timer(0), then only a few
_SYSCLK_ cycles later an interrupt is generated. This causes
timeout even though much less time has elapsed. So the timer
period registers should be reset before get_timer(0) is
called.

There is similar usage in nand_base.c.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-07 11:33:16 +02:00
Wolfgang Denk
0020db3f0d Merge remote branch 'origin/master' into next 2010-03-29 12:33:43 +02:00
Wolfgang Denk
0d41ad7edc Merge branch 'next' of git://www.denx.de/git/u-boot-cfi-flash into next 2010-03-29 12:33:16 +02:00
Thomas Chou
e5720823f6 cfi flash: add status polling method for amd flash
This patch adds status polling method to offer an alternative to
data toggle method for amd flash chips.

This patch is needed for nios2 cfi flash interface, where the bus
controller performs 4 bytes read cycles for a single byte read
instruction. The data toggle method can not detect chip busy
status correctly. So we have to poll DQ7, which will be inverted
when the chip is busy.

This feature is enabled with the config def,
CONFIG_SYS_CFI_FLASH_STATUS_POLL

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-03-26 11:35:50 +01:00
Renato Andreola
c40c94a3d2 cfi_flash: precision and underflow problem in tout calculation
With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.

Signed-off-by: Renato Andreola <renato.andreola@imagos.it>
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-03-25 09:44:58 +01:00
Nikolay Petukhov
7c27b7b1ea at91: add hwecc method for nand
This is a patch to use the hardware ECC controller of
the AT91SAM9260 for the AT91 nand. Taken from the kernel 2.6.33.

Signed-off-by: Nikolay Petukhov <Nikolay.Petukhov@gmail.com>
2010-03-23 14:29:09 -05:00
Cyril Chemparathy
cc41a59a74 TI: Davinci: NAND Driver Cleanup
Modified to use IO accessor routines consistently.  Eliminated volatile usage
to keep checkpatch.pl happy.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
2010-03-23 14:29:09 -05:00
Thomas Weber
5647f78d04 mod change 755 => 644 for multiple files
I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'

Signed-off-by: Thomas Weber <swirl@gmx.li>
Add some more: neither Makefile nor config.mk need execute permissions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-21 22:22:53 +01:00
Wolfgang Denk
93910edb59 Prepare v2010.03-rc1
Coding style cleanup, update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 23:06:04 +01:00
Wolfgang Wegner
8f9a221045 ] fix monitor protection for CONFIG_MONITOR_IS_IN_RAM
For platforms with flash below ram addresses, the current check to
activate monitor protection is wrong/insufficient. This patch fixes
CONFIG_MONITOR_IS_IN_RAM for these systems by adding a check for
this configuration.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-03-04 10:07:12 +01:00
Wolfgang Denk
08254a1a97 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2010-02-03 20:15:46 +01:00
Ladislav Michl
f3dec798d9 CFI: fix eraseregions numblocks
eraseregions numblocks was sometimes one less than actual, possibly producing
erase regions with zero blocks. As MTD code touches eraseregions only if
numeraseregions is greater that zero, allocate eraseregions only for non
uniform erase size flash.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-02-02 08:22:00 +01:00
John Rigby
b081c2e9b9 Nand mxc_nand add v1.1 controller support
Add support for version 1.1 of the nfc nand flash
controller which is on the i.mx25 soc.

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Scott Wood <scottwood@freescale.com>
2010-01-27 14:22:41 -06:00
Vipin KUMAR
165fa406ad SPEAr : nand driver support for SPEAr SoCs
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Vipin KUMAR
a6e34f76c5 SPEAr : smi driver support for SPEAr SoCs
SPEAr SoCs contain a serial memory interface controller. This
controller is used to interface with spi based memories.
This patch adds the driver for this IP.

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Magnus Lilja
c4832dffff MXC: Add large page oob layout for i.MX31 NAND controller.
Import the large page oob layout from Linux mxc_nand.c driver.

The CONFIG_SYS_NAND_LARGEPAGE option is used to activate
the large page oob layout. Run time detection is not supported
as this moment.

This has been tested on the i.MX31 PDK board with a large
page NAND device.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:13 -06:00
Magnus Lilja
f6a9748e32 mxc_nand: Update driver to work with i.MX31.
Tested on i.MX31 Litekit.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:13 -06:00
Wolfgang Denk
2ff6922280 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-01-12 23:47:03 +01:00
Nick Thompson
20da6f4d93 Davinci: davinci_nand.c performance enhancments
Introduces various optimisations that approximately triple the
read data rate from NAND when run on da830evm.

Most of these optimisations depend on the endianess of the machine
and most of them are very similar to optimisations already present
in the Linux Kernel.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-06 16:11:16 -06:00
Nick Thompson
26be2c53d6 Davinci: NAND enable ECC even when not in NAND boot mode
Davinci: NAND enable ECC even when not in NAND boot mode

On Davinci platforms, the default NAND device is enabled (for ECC)
in low level boot code when NAND boot mode is used. If booting in
another mode, NAND ECC is not enabled. The driver should make
sure ECC is enabled regardless of boot mode if NAND is configured
in U-Boot.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-04 08:48:17 -06:00
Nick Thompson
97f4eb8cfb Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects

Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2010-01-04 08:48:17 -06:00
Wolfgang Denk
bb3bcfa242 Merge branch 'next' of ../next 2009-12-15 23:38:34 +01:00
Stefan Roese
f4cfe42758 nand: Fix access to last block in NAND devices
Currently, the last block of NAND devices can't be accessed. This patch
fixes this issue by correcting the boundary checking (off-by-one error).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
2009-12-11 13:11:57 -06:00
Heiko Schocher
4b142febff common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:14:07 +01:00
Wolfgang Denk
206c00f26f Merge branch 'master' into next
Conflicts:
	lib_generic/zlib.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-12-07 22:47:17 +01:00
Daniel Hobi
0ec81db202 Fix computation in nand_util.c:get_len_incl_bad
Depending on offset, flash size and the number of bad blocks,
get_len_incl_bad may return a too small value which may lead to:

1) If there are no bad blocks, nand_{read,write}_skip_bad chooses the
bad block aware read/write code. This may hurt performance, but does
not have any adverse effects.

2) If there are bad blocks, the nand_{read,write}_skip_bad may choose
the bad block unaware read/write code (if len_incl_bad == *length)
which leads to corrupted data.

Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
2009-12-07 22:38:16 +01:00
Wolfgang Denk
2a49bf3149 Merge branch 'master' into next
Conflicts:
	board/esd/plu405/plu405.c
	drivers/rtc/ftrtc010.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-12-05 02:11:59 +01:00
kevin.morfitt@fearnside-systems.co.uk
ac67804fbb Add a unified s3c24x0 header file
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
Minkyu Kang
47e801bec3 s3c64xx: move s3c64xx header files to asm-arm/arch-s3c64xx
This patch moves the s3c64xx header files from include/
to include/asm-arm/arch-s3c64xx

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
kevin.morfitt@fearnside-systems.co.uk
492fb1fdbc Move s3c24x0 header files to asm-arm/arch-s3c24x0/
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.

checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:

ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch

As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.

The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:

WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8	S3C24X0_REG8;
+typedef volatile u16	S3C24X0_REG16;
+typedef volatile u32	S3C24X0_REG32;

I'll fix these errors in another patch.

Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:12 -06:00
Mike Frysinger
fcffb680e7 sf: fix stmicro offset setup while erasing
Reported-by: Peter Gombos <gombos@protecta.hu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-22 23:56:36 +01:00
Jason McMullan
d394a77950 sf: new driver for Winbond W25X16/32/64 devices
Signed-off-by: Jason McMullan <jason.mcmullan@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-22 23:54:18 +01:00
Sandeep Paulraj
10a5a79912 NAND: Add Support for 4K page size in DaVinci NAND driver
This patch adds support for NAND devices with a page size of
4K in the DaVinci NAND driver. The layout matches the layout that TI uses
for 4K page size NAND devices in the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-20 13:15:38 -06:00
Hui.Tang
5e1ded558b S3C2410 NAND Flash Add Missing Function
This patch add nand_read_buf() for S3C2410 NAND SPL.
In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip,
so nand->select_chip should also be initialized.

Signed-off-by: Hui.Tang <zetalabs@gmail.com>
2009-11-18 14:30:13 -06:00
Sandeep Paulraj
6cd752f927 NAND: Update read_read_subpage API check
This patch updates a check condition in the NAND driver.
The check condition is similat to what is in linux/next.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-18 14:26:40 -06:00
Amul Kumar Saha
cacbe91958 Flex-OneNAND driver support
This patch adds support for Flex-OneNAND devices.

Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
2009-11-13 16:56:18 -06:00
Mingkai Hu
35209cbcee fsl_elbc_nand: remove the bbt descriptors relocation fixup
The commit 66372fe2 manually relocated the bbt pattern pointer,
which can be removed by using full relocation.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
2009-11-13 16:56:18 -06:00
David Brownell
7e86661cd7 NAND: fix "raw" reads with ECC syndrome layouts
The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data.  With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:

  data-0 OOB-0 data-1 OOB-1 data-2 OOB-2 data-3 OOB-3 OOB-leftover

Where OOBx is (prepad, ECC, postpad).  However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB.  Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.

The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.

Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-13 16:56:17 -06:00
Sandeep Paulraj
5df3c2b62c NAND: Don't walk past end of oobfree[]
When computing oobavail from the list of free areas in the OOB,
don't assume there will always be an unused slot at the end.
This syncs up with the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
18b5a4b43a NAND: Update check condition for nand_read_page_hwecc API
The patch updates the check condition for determining
whether the ECC corrections has failed.
This makes it similar to what is in the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
e25ee03962 NAND: Updating comments/explanations in the NAND driver
Patch updates the comments and explanations for
the arguments to various functions.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
aad4a28b25 NAND: Subpage shift for ecc_steps equal to 16
This was originally part of Thomas Gleixner's patch for
adding support for 4KiB pages.
This is not part of the U-Boot NAND driver so updating the
driver with this to sync up with the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
36e0b98ec8 NAND: Remove commented out code
Patch removes already commented out dead code

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
4f41e7ea1a NAND: Correct the "chip_shift" calculation
This patch updates the "chip_shift" calculation in the
NAND driver. This is being done to sync up the NAND driver with
the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
aaa8eec532 NAND: Update to support 64 bit device size
This patch adds support for NANDs greater than 2 GB.
Patch is based on the MTD NAND driver in the kernel.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-11-13 16:56:14 -06:00
Stefan Roese
fa36ae790e cfi: Add weak default function for flash_cmd_reset()
Currently the CFI driver issues both AMD and Intel reset commands.
This is because the driver doesn't know yet which chips are connected.
This dual reset seems to cause problems with the M29W128G chips as
reported by Richard Retanubun. This patch now introduces a weak default
function for the CFI reset command, still with both resets. This can
be overridden by a board specific version if necessary.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Richard Retanubun <RichardRetanubun@ruggedcom.com>
2009-10-28 11:34:14 +01:00
Mike Frysinger
4166ee58d3 sf: add GPL-2 license info
Some of the new spi flash files were missing explicit license lines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-10-24 22:44:18 +02:00
kevin.morfitt@fearnside-systems.co.uk
3d1988ab47 Clean-up of s3c24x0 nand driver
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
 - patches 1/4, 2/4 and 3/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-13 21:13:57 -05:00
Minkyu Kang
4678d674f0 s5pc1xx: support onenand driver
This patch includes the onenand driver for s5pc100

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-10-13 21:13:55 -05:00
Peter Tyser
521af04d85 Conditionally perform common relocation fixups
Add #ifdefs where necessary to not perform relocation fixups.  This
allows boards/architectures which support relocation to trim a decent
chunk of code.

Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:57 +02:00
Scott Wood
d44e9c1736 NAND: davinci: Fix warnings when 4-bit ECC not used
I accidentally left v2 of "NAND: DaVinci:Adding 4 BIT ECC support"
applied when I pushed the tree last merge window, and missed these fixes
which were in v3 of that patch.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-09-28 16:33:18 -05:00
Paul Gibson
d3f4941874 mpc512x. Micron nand flash needs a reset before a read command is issued.
Micron nand flash needs a reset before a read command is issued.
The current mpc5121_nfc driver ignores the reset command.
2009-09-22 22:59:42 +02:00
Stefan Roese
d1c3b27525 ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-11 10:35:58 +02:00
Scott Wood
cfcbf8c4cf mxc_nand: Remove Freescale's "All Rights Reserved."
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-09-04 23:03:10 +02:00
Sandeep Paulraj
77b351cd0f NAND: DaVinci: V2 Adding 4 BIT ECC support
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:03 -05:00
Sandeep Paulraj
f83b7f9e8a MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
chips.  This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.

This patch has been accepted by Andrew Morton and can be found at

http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:03 -05:00
Ilya Yanok
36fab997d8 mxc_nand: add nand driver for MX2/MX3
Driver for NFC NAND controller found on Freescale's MX2 and MX3
processors. Ported from Linux. Tested only with i.MX27 but should
works with other MX2 and MX3 processors too.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:03 -05:00
Sandeep Paulraj
a2c65b47ef NAND: ADD page Parameter to all read_page/read_page_raw API's
This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs.  The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.

This patch has been accepted by Andrew Morton and can be found at
http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch

WE would like this to become part of the u-boot GIT as well

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:02 -05:00
Heiko Schocher
de4250929f 83xx, kmeter1: added NAND support
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:02 -05:00
Kyungmin Park
ecad289fc6 OneNAND: Remove unused read_spareram
Remove unused read_spareram and add unlock_all as kernel does

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:02 -05:00
Matthias Kaehlcke
403ce1f759 KB9202: Add NAND support
Add KB9202 NAND driver

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:01 -05:00
Niklaus Giger
3a7b2c21fb Support up to 7 banks for ids as specified in JEDEC JEP106Z
see http://www.jedec.org/download/search/jep106Z.pdf
Add some second source legacy flash chips 256x8.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-26 08:58:27 +02:00
Feng Kan
68e74567cf ppc4xx: Fix ECC Correction bug with SMC ordering for NDFC driver
Fix ECC Correction bug where the byte offset location were double
flipped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
        /* The NDFC uses Smart Media (SMC) bytes order */
        ecc_code[0] = p[2];
        ecc_code[1] = p[1];
        ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the s1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
	byteoffs = (s1 << 0) & 0x80;
	.
	.
	byteoffs |= (s0 >> 4) & 0x08;
The order is change to read it in straight and let the correction
function to revert it to SMC order.

Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-25 17:41:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a3c5057a6c eeprom_m95xxx: remove unused variable i
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-08-21 23:36:19 +02:00
Giulio Benetti
1fc1d9aed0 add WATCHDOG_RESET() on nand write and read
Signed-off-by: giulio.benetti@micronovasrl.com
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-21 22:55:21 +02:00
John Schmoller
7dedefdf74 flash: Fix CFI buffer size bug
Fix bug introduced by 9c048b5234.

The cfi_flash.c driver cast the flash buffer size to a uchar in
flash_write_cfibuffer(). On some flash parts, (tested on Numonyx
part PC32F512M29EWH), the buffer size is 1KB. Remove the cast to
uchar to enable buffer sizes to be larger.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-13 09:28:20 +02:00
Albin Tonnerre
3ac374c0f0 Add driver for the ST M95xxx SPI EEPROM
This chip is used in a number of boards manufactured by Calao-Systems
which should be supported soon. This driver provides the necessary
spi_read and spi_write functions necessary to communicate with the chip.

Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
2009-08-09 23:45:14 +02:00
Dirk Behme
894113529e omap3: replace all instances of gpmc config struct by one global
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:34:11 +02:00
Dirk Behme
97a099eaa4 omap3: remove typedefs for configuration structs
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:33:23 +02:00
Matthias Ludwig
187af954cf omap3: embedd gpmc_cs into gpmc config struct
Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
http://lists.denx.de/pipermail/u-boot/2009-May/052247.html

Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
2009-08-07 23:31:51 +02:00
Scott Wood
be33b046b5 Remove legacy NAND and disk on chip code.
Legacy NAND had been scheduled for removal.  Any boards that use this
were already not building in the previous release due to an #error.

The disk on chip code in common/cmd_doc.c relies on legacy NAND,
and it has also been removed.  There is newer disk on chip code
in drivers/mtd/nand; someone with access to hardware and sufficient
time and motivation can try to get that working, but for now disk
on chip is not supported.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 19:07:47 -05:00
Stefan Roese
f2f376ab95 nand: ndfc: Remove unnecessary #ifdef's
Now that the 4xx NAND driver ndfc is moved to the common NAND driver
directory we don't need this #ifdef's anymore.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:03 -05:00
Stefan Roese
12582ac771 nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directory
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:02 -05:00
Valeriy Glushkov
3ebf70db54 nand: fixed failed reads on corrected ECC errors in nand_util.c
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Paulraj, Sandeep <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:01 -05:00
David Brownell
ed727d394c Typo fix: use CONFIG_SOC_DM644X, not CONFIG_SOC_DM646.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:01 -05:00
Kim Phillips
9578718c1b mtd: cfi - if defined, use MAX_FLASH_BANKS_DETECT for static declarations
a.k.a cfi_mtd.c does as cfi_flash.c does.  This also prevents
the TQM834x build from doing a:

cfi_mtd.c:36: error: variably modified 'cfi_mtd_info' at file scope
cfi_mtd.c:37: error: variably modified 'cfi_mtd_names' at file scope

using gcc 4.4.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-16 15:27:45 +02:00
Wolfgang Denk
c3ae126c2c Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-07-13 23:45:02 +02:00
Po-Yu Chuang
b4db4a7638 issue write command to base for JEDEC flash
For JEDEC flash, we should issue word programming command relative to
base address rather than sector base address. Original source makes
SST Flash fails to program sectors which are not on the 0x10000 boundaries.

e.g.
SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector
is 0x1000 bytes.

Thus, if we issue command to "sector base (0x41000) + offset(0x5555)",
it sends to 0x46555 and the chip fails to recognize that address.

This patch is tested with SST39LF040.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-13 11:01:31 +02:00
Prafulla Wadaskar
205a0988d8 nand: Add Marvell Kirkwood NAND driver
This patch adds a NAND driver for the Marvell Kirkwood SoC's

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2009-07-08 21:20:10 +02:00
Mingkai Hu
66372fe2ab fsl_elbc_nand: redirect the pointer of bbt pattern to RAM
The bbt descriptors contains the pointer to the bbt pattern which
are statically initialized memory struct. When relocated to RAM,
these pointers will continue point to NOR flash(or L2 SRAM, or
other boot device). If the contents of NOR flash changed or L2
SRAM disabled, it'll hang the system.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:10 -05:00
kevin.morfitt@fearnside-systems.co.uk
98713d2663 Bug-fix in drivers mtd nand Makefile
The S3C2410 NAND driver source file is included in the makefile instead of
the object file.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:09 -05:00
Jean-Christophe PLAGNIOL-VILLARD
378adfcdf4 mtd: nand: use loff_t for offset
nand_util currently uses size_t which is arch dependent and not always a
unsigned long.  Now use loff_t, as does the linux mtd layer.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:06 -05:00
Mike Frysinger
cd84423a09 mtd: nand: new base driver for memory mapped nand devices
The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped.  Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:04 -05:00
David Brownell
154b5484ac davinci_nand chipselect/init cleanup
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does:  as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:

  Device 0: 2x nand0, sector size 128 KiB

Switch to use the default chipselect function unless the board
really needs its own.  The logic for the Sonata board moves out
of the driver into board-specific code.  (Which doesn't affect
current build breakage if its NAND support is enabled...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:03 -05:00
David Brownell
6e29ed8e57 davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option.  It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).

DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC.  The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages.  Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.

Since this option itself seems broken, remove it.  Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:01 -05:00
David Brownell
fcb7747775 davinci_nand: cleanup I (minor)
Minor cleanup for DaVinci NAND code:

 - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
   be defined when there are multiple chipselect lines in use
   (as with common 2 GByte chips).

 - Cleanup handling of EMIF control registers
    * Only need one pointer pointing to them
    * Remove incorrect and unused struct supersetting them

 - Use the standard waitfunc; we don't need a custom version

 - Partial legacy cleanup:
    * Don't initialize every board like it's a DM6446 EVM
    * #ifdef a bit more code for BROKEN_ECC

Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:44:55 -05:00
Wolfgang Denk
a48ecc969f Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	drivers/spi/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-07 22:22:05 +02:00
Wolfgang Denk
37572cde7f Merge branch 'master' of git://git.denx.de/u-boot-ubi 2009-07-07 20:58:30 +02:00
Stefan Roese
d318d0c44d UBI: Fix build problem noticed on Apollon (arm/testing repo)
This patch fixes a build problem noticed on Apollon by using
mtd_dev_by_eb() instead of "/" as done in the Linux UBI version.
So this brings the U-Boot UBI version more in sync with the Linux
version again.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-07 16:33:44 +02:00
Prafulla Wadaskar
2efee52b09 sf: Macronix additional chips supported
new chips supported:-
MX25L1605D, MX25L3205D, MX25L6405D, MX25L12855E
out of which MX25L6405D and MX25L12855E tested on Kirkwood platforms

Modified the Macronix flash support to use 2 bytes of device id instead of 1
This was required to support MX25L12855E

Signed-off-by: Piyush Shah <spiyush@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-06 18:46:20 -04:00
Mike Frysinger
dd54126715 sf: sst: add sst25vf###b ids
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-06 18:46:20 -04:00
Mike Frysinger
7d907f0ea9 sf: sst: fix sector size
Looks like when I was encoding the sector sizes, I forgot to divide by 8
(due to the stupid marketing driven process that declares all sizes in
useless megabits and not megabytes).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-06 18:46:20 -04:00