Commit graph

84950 commits

Author SHA1 Message Date
Ilias Apalodimas
89f0f14fe2 arm64: zynqmp: Add an OP-TEE node to the device tree
Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
load OP-TEE.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20230216133921.866786-1-ilias.apalodimas@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Neal Frager
749cbcfeac fpga: zynqmppl: fix fpga loads command for unencrypted use case
When using the fpga loads command, the driver is passing the AES encryption
key address is all cases.  However, for the authenticated, but not encrypted
use case, there is no AES encryption key, and this value is 0.

When AES encryption is not used on the fpga bitstream, the pmufw assumes that
the AES key address is a bitstream size value like what is used by the
unsecure fpga load command.

To fix the problem, this patch checks to see if the AES key address is zero.
If the AES key address is zero, it means that AES is not being used on the
bitstream and the bitstream size should be passed instead.  Thus, matching
the fpga load functionality.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230214131959.40298-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Michal Simek
cfa39857de ARM: zynq: Comment interrupt names IRQs for pl330
pl330 DT yaml description doesn't define interrupt-names property that's
why comment it but keep it as comment.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8e5a921c16efe09030fda036340186c11dd990bf.1672908030.git.michal.simek@amd.com
2023-03-09 13:15:00 +01:00
Krzysztof Kozlowski
89c3a5151c ARM: dts: zynq-7000: drop useless 'dma-channels/requests' properties
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless.  Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.

Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
2023-03-09 13:15:00 +01:00
Krzysztof Kozlowski
4837ff416d ARM: dts: xilinx: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-31-krzysztof.kozlowski@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Michal Simek
5331845db4 ARM: zynq: Use recommended dma-controller name instead of dmac
Use standard name for dma controller. Issue is reported by dtbs_check as
dmac@f8003000: $nodename:0: 'dmac@f8003000' does not match
'^dma-controller(@.*)?$'

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5637d7e3464fbc1b2b269a7df35e24edc2c8d4ac.1672908080.git.michal.simek@amd.com
2023-03-09 13:15:00 +01:00
Michael Grzeschik
06ba3c252f arm64: zynqmp: Enable hs termination flag for USB dwc3 controller
Since we need to support legacy phys with the dwc3 controller,
we enable this quirk on the zynqmp platforms.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Link: https://lore.kernel.org/r/20221023215649.221726-1-m.grzeschik@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Krzysztof Kozlowski
b4b2f7bb5f arm64: dts: xilinx: align LED node names with dtschema
The node names should be generic and DT schema expects certain pattern:

  xilinx/zynqmp-zcu100-revC.dtb: leds: 'vbus-det' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221125144136.477171-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Michal Simek
a09d9278a5 xilinx: dts: Remove cdns,zynq-gem
cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also
U-Boot driver has been updated to support new compatible string that's why
it is time to remove it and deprecate it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:14:59 +01:00
Algapally Santosh Sagar
6d87b1572f arm64: zynqmp: Add missing ZYNQMP_FIRMWARE dependencies
There are missing Kconfig dependencies in the code which is using
firmware interface.
The commit 71efd45a5f ("arm64: zynqmp: Change firmware dependency")
add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig
dependencies were properly described and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230201095553.11219-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:14:59 +01:00
Tom Rini
70ed05ce6c - video console refactoring and optimization
- support for fonts wider than 1 byte
  - use named header for 8x16 font data
  - support multiple fonts configuration
  - move get_font_size() to truetype driver ops
  - support font size configuration at runtime
  - add 16x32 Terminus font from linux
  - add 12x22 Sun font from linux
  - add 12x22 console simple font test
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Merge tag 'next-20230307' of https://source.denx.de/u-boot/custodians/u-boot-video into next

 - video console refactoring and optimization
 - support for fonts wider than 1 byte
 - use named header for 8x16 font data
 - support multiple fonts configuration
 - move get_font_size() to truetype driver ops
 - support font size configuration at runtime
 - add 16x32 Terminus font from linux
 - add 12x22 Sun font from linux
 - add 12x22 console simple font test
2023-03-07 12:54:01 -05:00
Tom Rini
36bb622df5 Merge branch '2023-03-06-assorted-platform-updates' into next
- semihosting updates for arm and riscv, assorted arm64 core updates,
  assorted ast2600 updates, remove some more unused code, some TI K3
  defconfig and DTS updates, uniphier DTS updates, mpc83xx Kconfig
  cleanup, re-add fttmr010 driver with an update to use DM.
2023-03-07 10:42:22 -05:00
Dzmitry Sankouski
72471620e8 video console: add 12x22 console simple font test
Tests fonts wider than a byte.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 16:00:18 +01:00
Dzmitry Sankouski
0ed6ce2f04 video console: sandbox: add 12x22 font defconfigs
Add 12x22 font in order to write a test for it.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 16:00:11 +01:00
Dzmitry Sankouski
0d6c089f84 video console: add 16x32 Terminus font from linux
Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 15:59:58 +01:00
Dzmitry Sankouski
e24db8645f video console: add 12x22 Sun font from linux
Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 15:59:47 +01:00
Dzmitry Sankouski
e7ee1fd567 video console: allow font size configuration at runtime
Allow font size configuration at runtime for console_simple.c
driver. This needed for unit testing different fonts.

Configuring is done by `font` command, also used for font
selection in true type console.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 15:59:35 +01:00
Dzmitry Sankouski
4f6e34811d video console: move vidconsole_get_font_size() logic to driver ops
Since multiple vidconsole drivers exists, vidconsole_get_font_size()
implementation cannot longer live in vidconsole_uclass.c file.

Move current vidconsole_get_font_size logic to truetype driver ops.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 15:59:21 +01:00
Dzmitry Sankouski
39c1fa2c21 video console: implement multiple fonts configuration
This needed for unit testing different fonts.

Configured fonts are placed in an array of fonts.
First font is selected by default upon console probe.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[agust: fixed build error when bmp logo disabled]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2023-03-07 15:57:19 +01:00
Dzmitry Sankouski
0e177d5a95 video console: move 8x16 font data in named header
Consistent font data header names needed to add new
fonts.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 13:26:08 +01:00
Dzmitry Sankouski
02db4ec902 video console: add support for fonts wider than 1 byte
Devices with high ppi may benefit from wider fonts.

Current width implementation is limited by 1 byte, i.e. 8 bits.
New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all
width bytes, thus allowing fonts wider than 1 byte.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 13:26:08 +01:00
Dzmitry Sankouski
3154725949 video console: refactoring and optimization
- move common code to vidconsole_internal.h and console_core.c
- unite probe functions
- get rid of code duplications in switch across bpp values
- extract common pixel fill logic in two functions one per
horizontal and vertical filling
- rearrange statements in put_xy* methods in unified way
- replace types - uint*_t to u*

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07 13:26:08 +01:00
Andre Przywara
7400d34ba9 riscv: semihosting: replace inline assembly with assembly file
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about a few instructions, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
  to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
  we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
  those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
  pointer land in the right registers.

This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembler.
This is much more readable and robust.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-03-06 19:24:34 -05:00
Andre Przywara
29c579a249 arm: semihosting: replace inline assembly with assembly file
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about one instruction, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
  to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
  we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
  those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
  pointer land in the right registers.

This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembly file.
This is much more readable and robust.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-03-06 17:06:17 -05:00
Devarsh Thakkar
885198536d am62a7: dts: Enable full 4GB LPDDR4
AM62A7-SK board has 4GB LPDDR4 Micron MT53E2G32D4DE-046 AUT:B part
but only 2GB was enabled early.

Enable full 4GB memory by updating the latter 2GB memory region
which gets mapped to 0x0880000000 i.e. DDR16SS0_SDRAM as referred in
Table 2-1. AM62A Common SoC Memory of AM62Ax TRM [1].

[1] : https://www.ti.com/lit/zip/spruj16
Logs: https://gist.github.com/devarsht/e85b6af89c01ddadb3a62f3e5f196af8

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
2023-03-06 17:06:17 -05:00
Kunihiko Hayashi
051451ad83 ARM: dts: uniphier: Sync DT with Linux v6.2
Synchronize devicetree sources with Linux v6.2.

- Use GIC interrupt definitions
- Add reg properties in USB-glue and SoC-glue node
- Fix node names to follow the generic names list in DT specification
- Add L2 cache and AHCI nodes
- Update nand and pcie nodes
- And some trivial fixes

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
2023-03-06 17:05:40 -05:00
Kunihiko Hayashi
e800263d56 ARM: dts: uniphier: Switch USB node to the original
UniPhier DT applies its own USB node for U-Boot due to the USB driver
constrains. After solving this issue, u-boot allows the original USB node.

After switching USB node, synchronization of USB node with Linux becomes
possible.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
2023-03-06 17:05:40 -05:00
Christophe Leroy
6782b81588 powerpc, mpc83xx: Remove CONFIG_ELBC_BRx_ORx
Commit fe7d654d04 ("mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to
Kconfig") converted CONFIG_SYS_{BRx/ORx}_PRELIM to Kconfig by
implementing a fine-grained selection of every bit in Kconfig.

But commit c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to
Kconfig") reworked it so that you now just have to provide the raw
value of each register in Kconfig. However, all fine-grained
Kconfig items remained allthough they are not used anymore.

Remove them all.

Fixes: c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-03-06 17:05:40 -05:00
Manorit Chawdhry
e352e1061f configs: j7200: Merge HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
2023-03-06 17:05:40 -05:00
Manorit Chawdhry
c714045cc3 configs: j721s2: merge HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
2023-03-06 17:04:33 -05:00
Patrick Delaunay
e67b1f4dde mmc: remove SDHCI SPEAR
As the file spear_sdhci.c file is already removed, delete the associated
configuration CONFIG_MMC_SDHCI_SPEAR.

Fixes: c942fc925e ("mmc: spear: remove the entire spear_sdhci.c file")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-03-06 17:03:56 -05:00
Patrick Delaunay
c6c2fe9936 ARM: remove SPEAR entry in makefile
As the lastest spear directories are removed, delete the associated entry
in Makefile.

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-03-06 17:03:56 -05:00
Dylan Hung
95f7955384 clk: ast2600: Keep PLL power on
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
2023-03-06 17:03:56 -05:00
Dylan Hung
45443f6089 ram: ast2600: Keep MPLL power on
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
2023-03-06 17:03:56 -05:00
Marc Zyngier
94d30f476f arm64: Reduce PT size estimation complexity
count_required_pts()'s complexity is high if mappings are not using the
largest possible block size (due to some other requirement such as tracking
dirty pages, for example).

Let's switch to a method that follows the pattern established with
the add_map() helper, and make it almost instantaneous instead of
taking a large amount of time if 2MB mappings are in use instead of
1GB.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
  upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 5d756d147e
Link: 6be9330601
2023-03-06 17:03:56 -05:00
Marc Zyngier
41e2787f5e arm64: Reduce add_map() complexity
In the add_map() function, for each level it populates, it iterates from
the root of the PT tree, making it ineficient if a mapping needs to occur
past level 1.

Instead, replace it with a recursive (and much simpler) algorithm
that keeps the complexity as low as possible. With this, mapping
512GB at level 2 goes from several seconds down to not measurable
on an A55 machine.

We keep the block mappings at level 1 for now though.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
  upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 96ad729cf4
Link: 6be9330601
2023-03-06 17:03:56 -05:00
Sergei Antonov
2c0bdcacf3 timer: fttmr010: return a previously deleted driver now ported to DM
The fttmr010 timer driver was deleted by
commit 29fc6f2492 ("ARM: remove a320evb board support")
The original source file was: arch/arm/cpu/arm920t/a320/timer.c

Return the driver to the codebase in a DM compatible form.
A platform using fttmr010 will be submitted later.

This hardware is described in the datasheet [1], starting from page 348.
According to the datasheet, there is a Revision Register at offset 0x3C,
which is not present in 'struct fttmr010'. Add it and debug() print
revision in probe function.

[1]
https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf

Signed-off-by: Sergei Antonov <saproj@gmail.com>
2023-03-06 17:03:56 -05:00
Ryan Chen
48d7e58945 configs: evb-ast2600: Enable configs to store env in SPI
Enable defconfigs relevant for storing env on SPI flash.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2023-03-06 17:03:56 -05:00
Pierre-Clément Tosi
c55c2a8565 arm64: Initialize TLB memory if CMO_BY_VA_ONLY
Memory used to hold the page tables is allocated from the top of RAM
with no prior initialization and could therefore hold invalid data. As
invalidate_dcache_all() will be called before the MMU has been
initialized and as that function relies indirectly on the page tables
when using CMO_BY_VA_ONLY, these must be in a valid state from their
allocation.

Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fix checkpatch warnings, and rebased
  to the upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: e3ceef4230
2023-03-06 17:03:55 -05:00
Marc Zyngier
46dc542870 arm: cpu: Add optional CMOs by VA
Exposing set/way cache maintenance to a virtual machine is unsafe, not
least because the instructions are not permission-checked but also
because they are not broadcast between CPUs. Consequently, KVM traps and
emulates such maintenance in the host kernel using by-VA operations and
looping over the stage-2 page-tables. However, when running under
protected KVM, these instructions are not able to be emulated and will
instead result in an exception being delivered to the guest.

Introduce CONFIG_CMO_BY_VA_ONLY so that virtual platforms can select
this option and perform by-VA cache maintenance instead of using the
set/way instructions.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <willdeacon@google.com>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. And fix some
  checkpatch warnings. Rebased to upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: db5507f47f
Link: 2baf54e743
2023-03-06 17:03:55 -05:00
Tom Rini
d1653548d2 Merge branch '2023-03-02-kconfig-and-CONFIG-cleanups' into next
- Partial merge of a series of mine to select some framework options
  that shouldn't be prompted for (and remove some unused code related to
  that), and a partial merge of a series from Simon to remove some dead
  code and address various CONFIG_IS_ENABLED/IS_ENABLED issues in code.
2023-03-03 12:48:23 -05:00
Tom Rini
f3384c6dda Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-usb into next
- MediaTek updates, correct logic on PHY selection for amlogic
2023-03-03 12:42:58 -05:00
Simon Glass
d99e6f78de command: Don't allow commands in SPL
At present we compile commands into U-Boot SPL even though they cannot
be used. This wastes space. Adjust the condition to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:03 -05:00
Simon Glass
9c097f8139 venice: Simplify conditions for network init
The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.

Of course a better solution would be to refactor all of this to avoid
using #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Simon Glass
d36d5b0c1f power: wandboard: Add a missing CONFIG
We should enable pmic in SPL since it is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Simon Glass
a118449814 x86: coral: Add missing TPL options
Some options should be enabled which are missing. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Simon Glass
fd3753593a dm: Add a TPL symbol for simple-bus
This is used in some x86 code, so add a symbol for it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Simon Glass
e6c5205d64 net: Add an SPL config for atheros
Add a new SPL_PHY_ATHEROS to avoid a build error on am335x_evm with split
config.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-03-03 09:49:02 -05:00
Simon Glass
847fca6d47 imx: Use SATA instead of CMD_SATA
This causes a build failure on mx6cuboxi with split config, since CMD_SATA
shows up as enabled in SPl (because there is no SPL_CMD_SATA).

The condition is wrong anyway, so change it to use SATA instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Simon Glass
06a1edda6c freescale: Drop old pre-DM_ETH code
This is used by ls1021atwr_sdcard_ifc_SECURE_BOOT with split config, but
is not needed anymore, since Ethernet migration is complete. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00