Commit graph

82026 commits

Author SHA1 Message Date
Simon Glass
8909066199 dm: core: Drop ofnode_is_available()
This function is also available as ofnode_is_enabled(), so use that
instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:31 -04:00
Simon Glass
52ad21aa2c dm: core: Add a macro to iterate through properties
Add a 'for_each' macro like we have for nodes.

Fix the comment for struct ofprop while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:15 -04:00
Simon Glass
f46ec93ed5 dm: core: Avoid creating a name property when unflattening
The current implementation creates a 'name' value for every node. This
is not needed for the latest device tree format, which includes a name in
the node header.

Adjust the code to point the name at the node header instead.

Also simplify ofnode_get_name(), now that we can rely on it to set the
name correctly. Update the comment to make it clear what name the root
node has.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:14 -04:00
Simon Glass
9243224687 dm: core: Rename ofnode_get_property_by_prop()
The current name is quite unwieldy. Change it to use an ofprop_ prefix
and shorten it. Fix the return-value comment while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:14 -04:00
Simon Glass
4b1f571465 dm: core: Rename ofnode_get_first/next_property()
Drop the 'get' in these names since it does not fit with the rest of
the API.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:14 -04:00
Simon Glass
1701359f75 dm: core: Reduce code size with dev_of_offset()
Update the function to mark it with the const attribute. Also avoid
calling it multiple times in the devfdt_get_addr_index() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:14 -04:00
Simon Glass
8d468a188f sandbox: test: Provide an easy way to use the other FDT
Add a test flag which indicates that the 'other' FDT should be set up
ready for use. Handle this by copying in the FDT, unflattening it for
livetree tests. Free the structures when the tests have run.

We cannot use the other FDT unless we are using live tree or
OFNODE_MULTI_TREE is enabled, since only one tree is supported by the
ofnode interface in that case. Add this condition into
ut_run_test_live_flat() and update the comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:14 -04:00
Simon Glass
756c01422d sandbox: Support setting up the other FDT for testing
Provide a way to copy over the 'other' FDT when running tests. This loads
it and allocates memory for the copy, if not done already, then does the
copy.

Avoid using U-Boot's malloc() pool for these copies, at least for now,
since they are part of the test system.

Tidy up the cpu.c header files while here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:10:43 -04:00
Simon Glass
9859d89b6e sandbox: Support loading the other FDT
We need an 'other' FDT which is different from the control FDT, so we can
check that the ofnode tests correctly handle them both.

Add this to the build along with a way to read it into the sandbox state.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:09:56 -04:00
Simon Glass
73c5cb9dac sandbox: Add a function to load a relative file path
At present this implementation is specific to loading the test FDT. We
plan to load others, so create a generic function to handle this.

The path is now limited to 256 characters, to simplify the code.

When there is an empty argv[0] (which should not happen), the function now
just uses the path as is, with no prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:09:56 -04:00
Simon Glass
2b90e0d54e test: Drop the UT_TESTF_LIVE_OR_FLAT flag
This was a workaround for a rare situation. Now that it will be more
common and we have a proper fix, drop the flag. We can run both types of
tests in the same sandbox executable, even if the flat device tree is
modified.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:09:56 -04:00
Simon Glass
eb6e903a56 test: Detect a change in the device tree
If the device tree changes during a test and we cannot restore it, mark
it as such so that future tests which need the live tree are skipped.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:09:56 -04:00
Simon Glass
0e4b697f88 test: Make a copy of the device tree before running a test
When the flat device tree changes it can mess up the live tree since that
uses the flat tree for its strings. This affects only a few sandbox tests
which modify the device tree, but the number will grow as ofnode support
for writing improves.

While the control FDT is not intended to change while U-Boot is running,
some tests do so. For example, the ofnode interface only supports
modifying properties in the control FDT, so tests must use that.

To solve this problem, keep a copy of the FDT and restore it as needed
when the test is finished. The copy only happens on sandbox (except SPL
builds), to reduce memory usage and because these tests are not useful on
other boards. For other boards, a checksum is taken to ensure that nothing
changes.

It would be possible to always checksum the FDT on sandbox and only
restore it if needed, but this is slightly slower than restoring it every
time, at least with crc8.

Move the code which checks for success to the very end, for clarity.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:09:56 -04:00
Simon Glass
9830698765 dm: core: Drop the const from ofnode
Now that we support writing to ofnodes, the const is not accurate. Drop
it to avoid undesirable casting.

Also drop the ofnode_to_npw() which is now the same as ofnode_to_np().

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:58 -04:00
Simon Glass
c3a194dec9 dm: core: Support writing a property to an empty node
At present this does not work with livetree. Fix it and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:58 -04:00
Simon Glass
ffe9039249 dm: core: Allow adding ofnode subnodes
Add this feature to the ofnode interface, supporting both livetree and
flattree. If the node exists it is returned, along with a -EEXIST error.
Update the functions it calls to handle this too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:58 -04:00
Simon Glass
5ecba3ba40 dm: core: Document the livetree structures properly
Clarify the data structure so it is easier for people to understand,
particularly the corner cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:58 -04:00
Simon Glass
62d638386c test: Support testing malloc() failures
It is helpful to test that out-of-memory checks work correctly in code
that calls malloc().

Add a simple way to force failure after a given number of malloc() calls.

Fix a header guard to avoid a build error on sandbox_vpl.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-09-29 16:07:58 -04:00
Simon Glass
7c14dc7f77 test: Fix missing livetree test runs
At present the live tree tests are not run on sandbox. This bug is in two
parts, with a duplicate flag value and incorrect logic in the test runner.
This was not noticed because the bug was fixed in a later commit and does
not cause test failures.

Fix this.

Fixes: 7b1dfc9fd7 ("dm: core: Prepare for updating the device tree with ofnode")

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:58 -04:00
Simon Glass
b215b6034c event: Pass the images to EVT_FT_FIXUP
Pass the boot images along as well, in case the fixups need to look at
them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:58 -04:00
Simon Glass
829d51246f dm: core: Pass a root node to of_find_node_by_phandle()
This function currently assumes that the control FDT is used. Update it
to allow a root node to be passed, so it can work with any tree.

Also add a comment to ofnode_get_by_phandle() so that its purpose is
clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:58 -04:00
Simon Glass
b5001cb4bd event: Allow multiple spy declarations for each event
At present only one spy is allowed per event. Update the naming to allow
more than one, since some need this flexibility, e.g. the EVT_FT_FIXUP
event.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Simon Glass
f39e5b802a event: Fix a typo in the EVENT help
Fix the help message.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Simon Glass
96d0c4514f sandbox: power: Update PMIC driver to use log
Use the log functions instead of pr_...() so we can avoid using __func__.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-09-29 16:07:57 -04:00
Simon Glass
b7f134eece log: update the comment for log_msg_ret()
Add some advice on string size here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Simon Glass
f3543e6944 treewide: Drop image_header_t typedef
This is not needed and we should avoid typedefs. Use the struct instead
and rename it to indicate that it really is a legacy struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Simon Glass
da79b2f25e treewide: Drop image_info_t typedef
This is not needed and we should avoid typedefs. Use the struct instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Simon Glass
d9d7c20b73 treewide: Drop bootm_headers_t typedef
This is not needed and we should avoid typedefs. Use the struct instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Simon Glass
c56b2bb9b9 image: Fix BOOTM_STATE values
Tidy up the code style for these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Tom Rini
01c88e3dcd - Increase SYS_MALLOC_F_LEN for STM32 MCU's board
- SPL fixes for STM32F7 MCUs
 - Device tree alignement with kernelv6.0-rc4 for MCU's board
 - Device tree alignement with kernelv6.0-rc3 for MPU's board
 - Update DDR node for STM32MP15
 - Cleanup config file for STM32MP1
 - Update for cmd_stm32key command
 - Fix compatible string to add partitions for STM32MP1
 - Update for stm32programmer tool
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmMy5KMcHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/phGoEACO/DdR5qrZcWYZhK8t
 4ZhCYW3+anI7hx/aOx2k36JIw8V7kTCivBszTXtvEFLoPARKSt2RCGKRrSciyPw8
 e5HaX85fvOum1+p555LzGBerleezz3dMIE6PgjuWHQgznVh5jaJPvu5SacOoU2yt
 RCQbrBUqMxZ9HPFWOWsmqBo5rIskgn0fhkSDaqj+v0yqnj/HLZk5NtAy4q3KYxA1
 yL4rHB5+SM7ENh1KsPJm+8M5FTjBmVBZKp17mcu/3z3RwNNCjEVG0aXw8Im7pzb8
 b0pwnOqxRMBsBNOqnZ6kmNdKeOBZVfh35dBXplUxfMG6VYWwrNUTAgLnwPIFbFWX
 qaMiyRdAK5KArOCWFzbJN8oqCrM7hrTnlpmK9ilILJ81VuN/JDvFmLle31DrOxm6
 XzVh8GOp+cjEmJckcm8ChAUGB/Q1ToTZd6TMXN69IzcmE0t0rW/j+muILVeq+rT5
 JmWz+5av9W1nKRVP9WzfjOVASNdNgNRQMYAn8jJwUU/oiEw6QIZUP4m5rngSNMzQ
 f3Jzl+zO7QfFtT4NHir1HNguJRnZxuzxBc3Ok639UwzMJQwHuy6LPJnAlKLUoYuE
 LYkplLn7UA8aSbiWJq04fws0xrTYMvK1VWZp5CFgsnsc2usLy4Sks9JIwyqmAxme
 dF0ut2NYT3o8Ctn9ppezA+sx2w==
 =iA80
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20220927' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

- Increase SYS_MALLOC_F_LEN for STM32 MCU's board
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
2022-09-27 08:53:51 -04:00
Patrice Chotard
762d410e0d configs: increase SYS_MALLOC_F_LEN for STM32 MCU's board
Some STM32 MCU's board need their SYS_MALLOC_F_LEN value enlarged
to avoid the "alloc space exhausted" error message during their boot
process.
Use the default SYS_MALLOC_F_LEN value which is set to 0x2000 in
Kconfig.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-27 10:41:02 +02:00
Tom Rini
55ccdee315 Xilinx changes for v2023.01-rc1 (round 2)
xilinx:
 - Add support for new Versal NET SOC
 
 zynqmp:
 - Use mdio bus for ethernet phy description
 - Wire ethernet phy reset via i2c-gpio
 
 versal:
 - Config cleanup
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYzGwogAKCRDKSWXLKUoM
 Ial4AJ9+4WHn0MV2X7gK1fyh4lUW7ggPhQCggsYlSoACgMgdji17SAPhCv/W3IA=
 =BmA9
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2023.01-rc1-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.01-rc1 (round 2)

xilinx:
- Add support for new Versal NET SOC

zynqmp:
- Use mdio bus for ethernet phy description
- Wire ethernet phy reset via i2c-gpio

versal:
- Config cleanup
2022-09-26 11:28:14 -04:00
Tom Rini
ffa2c88bcf Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next 2022-09-26 11:27:30 -04:00
Patrice Chotard
2b5dee9485 configs: stm32f746-disco: Remove CONFIG_SYS_UBOOT_START flag
By pressing "c" key during SPL execution, we force U-boot execution
instead of a kernel XIP image.

This fixes a hard fault when booting stm32f746-disco in SPL with "c"
key pressed during SPL execution.

U-Boot SPL 2022.10-rc5-00009-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200)
Trying to boot from XIP
Hard fault
pc : 080083fc    lr : 08000d1b    xPSR : 21000000
r12 : 2004f108   r3 : 080083fd    r2 : 00000028
r1 : 2004f0c8    r0 : 2004f0e4
Resetting CPU ...

This is due to SYS_UBOOT_START flag set to 0x080083FD which is not correct.
If unset, SYS_UBOOT_START is set by default to CONFIG_SYS_TEXT_BASE
which match with our requirement.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:21:09 +02:00
Patrice Chotard
3cc471d30a configs: stm32f769-disco: Fix internal flash size
arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
STM32F746. The flash layout is quite similar between the 2 SoCs :

	STM32F746 			STM32F769
4 *  32KB sectors 			4 *  32KB sectors
1 * 128KB sector 			1 * 128KB sector
3 * 256KB sectors			7 * 256KB sectors

Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:21:02 +02:00
Patrice Chotard
ab5c4e5b0f configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
4b2bcca5c3 configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
4f174e6ffa configs: stm32746g-eval: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.

Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
c8b577ce82 configs: stm32f769-disco: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.

Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
6ee64732b1 configs: stm32f746-disco: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.

Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
9f603e2fff ARM: dts: stm32: DT sync with kernel v6.0-rc4 for MCU's boards
Device tree alignment with kernel v6.0-rc4.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-26 15:19:57 +02:00
Michal Simek
f2641f066b arm64: versal-net: Add support for mini configuration
Versal NET mini configuration is designed for running memory test. Current
output is on DCC but changing serial0 alias to pl011 will move console to
serial port.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aec3f41a4cc48c45b8f07dd6e423d5838dbcc9d7.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:30 +02:00
Michal Simek
ce40cbdf1f arm64: versal-net: Add defconfig for Versal NET
Use one defconfig for supporting multiple different platforms. DTB
reselection is enabled to choose DT based on SOC detection.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/82cc7c1ca8850270cc2ebc992d835a37aa3d236f.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
a41c33992a reset: zynqmp: Enable reset driver for Versal NET
Enable zynqmp reset driver for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8c26618f87d8451c6ffa9487809a24718bff6a7.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
b6b2ad1cea mailbox: zynqmp: Enable ipi mailbox driver for Versal NET
Enable mailbox configs for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b3a9a6a58b74d17e2ec5f60617fa42062fbab951.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
2a00cef820 firmware: zynqmp: Add Versal NET compatible string
Add compatible string for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ec73f786e1c89094752ff3693f6f0fb4536c85c5.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
ff33227819 clk: versal: Enable clock driver for Versal NET
Add support for Versal NET compatible string in clock driver.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20a35d0c1ffcc222fbe93dd406cdd0aff92f5223.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Michal Simek
2389647225 spi: zynqmp_gqspi: Add support for Versal NET
Add support for Versal NET platform.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f374e9a81f2d85de1240029f3ba5f6423cfa0680.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Michal Simek
1e681448a3 spi: cadence_qspi: Add support for Versal NET platform
Trivial changes to support cadence ospi driver for Versal NET platform.
Also avoid ospi flash reset for now.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0789141f432189aab69bc496fe33e0218d1d7510.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Michal Simek
f6aebdf676 arm64: versal-net: Add support for Versal NET platform
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00