Commit graph

453 commits

Author SHA1 Message Date
Neil Armstrong
5ccd5d2cc9 pinctrl: meson: fix bit manipulation of pin bias configuration
This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument.

Fixes: c4c726c26b ("pinctrl: meson: add pinconf support")
Reported-by: Anton Arapov <arapov@gmail.com>
Reported-by: Otto Meier <gf435@gmx.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-12-14 19:58:54 +01:00
Patrice Chotard
0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Patrick Delaunay
e27e96aa80 pinctrl: stmfx: update pin name
Update pin name to avoid duplicated name with SOC GPIO
gpio0...gpio15 / agpio0....agpio7: add a stmfx prefix.

This pin name can be used in pinmux command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 12:01:53 +01:00
Patrick Delaunay
c2a8181d45 pinctrl: stmfx: update pincontrol and gpio device name
The device name is used in pinmux command and in log trace
so it is better to use the parent parent name ("stmfx@42" for
example) than a generic name ("pinctrl" or "stmfx-gpio")
to identify the device instance.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 12:01:53 +01:00
Patrick Delaunay
b305dbc08b pinctrl: stm32: display bias information for all pins
Display the bias information for input gpios or AF configuration,
and not only for output pin, as described in Reference manual
(Table 81. Port bit configuration table).

Fixes: da7a0bb1f2 ("pinctrl: stm32: add information on pin configuration")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 12:01:46 +01:00
Lad Prabhakar
46f3282b28 pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrl
Drop unused members from struct sh_pfc_pinctrl.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
2a589b7c51 pinctrl: renesas: r8a7795: Optimize pinctrl image size for R8A774E1
This driver supports both RZ/G2H and R-Car H3 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3
(R8A7795) is not enabled

Based on the similar patch on Linux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
8b00761c06 pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1
This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.

Based on the simialr patch on Linux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
fee13ae8cb pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.

Based on the similar patch on Linux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
975154bc2c pinctrl: renesas: r8a77951: Add R8A774E1 PFC support
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
c5f3762588 pinctrl: renesas: r8a77965: Add R8A774B1 PFC support
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Sean Anderson
6e35c1cb12 pinctrl: k210: Rename power domains to match datasheet
This renames power domains to match the names on the k210 datasheet.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-17 15:09:28 +08:00
Sean Anderson
82b838f8dd pinctrl: k210: Fix inverted IE and OE for I2C
I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and
IE_INV set, but I2C cannot have those bits set. This adds a separate
default for SCCB.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
2020-11-17 15:09:28 +08:00
Simon Glass
dd27cd6dab x86: pinctrl: Silence the warning when a pin is not found
This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-06 09:51:33 +08:00
Simon Glass
9d20db0483 x86: Fix up driver names to avoid dtoc warnings
At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:

   WARNING: the driver intel_apl_lpc was not found in the driver list

Correct these by using driver names that matches their compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Lad Prabhakar
b2d7a163ab pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.9
Sync the R8A77990 SoC PFC tables with Linux 5.9 , commit bbf5c979011a.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-10-20 12:56:52 +02:00
Sean Anderson
7224d5ccf8 pinctrl: Add support for Kendryte K210 FPIOA
The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08 11:42:36 -04:00
Sean Anderson
7f0f1806e3 test: pinmux: Add test for pin muxing
This extends the pinctrl-sandbox driver to support pin muxing, and adds a
test for that behaviour. The test is done in C and not python (like the
existing tests for the pinctrl uclass) because it needs to call
pinctrl_select_state.  Another option could be to add a command that
invokes pinctrl_select_state and then test everything in
test/py/tests/test_pinmux.py.

The pinctrl-sandbox driver now mimics the way that many pinmux devices
work.  There are two groups of pins which are muxed together, as well as
four pins which are muxed individually. I have tried to test all normal
paths. However, very few error cases are explicitly checked for.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08 11:42:36 -04:00
Sean Anderson
9c08fbfc95 pinctrl: Add pinmux property support to pinctrl-generic
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.

Support for the pinmux property is done differently than in Linux.  As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.

This commit increases the size of the sandbox build by approximately 48
bytes.  However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.

The documentation has been updated from the last Linux commit before it was
split off into yaml files.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08 11:42:36 -04:00
Tom Rini
987ab49366 - generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
 - Update Gadget code to use the new GXL and AXG USB glue driver
 - Add a VIM3 board support to add dynamic PCIe enable in OS DT
 - Fix AXG pinmux with requesting GPIOs
 - Add missing GPIOA_18 for AXG pinctrl
 - Add Amlogic PWM driver
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Merge tag 'u-boot-amlogic-20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
2020-10-06 08:36:10 -04:00
Tom Rini
b7e7831e5d Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 14:10:59 -04:00
Neil Armstrong
38c1c6f816 pinctrl: meson-axg: add missing GPIOA_18
Add the missing GPIOA_18 from the missing EE gpio list.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 18:01:40 +02:00
Neil Armstrong
0f6bef4a95 pinctrl: meson-axg-pmx: fix gpio request
The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2020-10-05 18:01:39 +02:00
Tom Rini
caebff09ef First set of u-boot-atmel features for 2021.01 cycle
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Merge tag 'u-boot-atmel-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next

First set of u-boot-atmel features for 2021.01 cycle:

This feature set includes a new CPU driver for at91 family, new driver
for PIT64B hardware timer, support for new at91 family SoC named sama7g5
which adds: clock support, including conversion of the clock tree to
CCF; SoC support in mach-at91, pinctrl and mmc drivers update.  The
feature set also includes updates for mmc driver and some other minor
fixes and features regarding building without the old Atmel PIT and the
possibility to read a secondary MAC address from a second i2c EEPROM.
2020-10-05 10:54:27 -04:00
Tom Rini
17e76b33cc - stm32mp: DT alignment with Linux 5.9-rc4
- stm32mp: convert drivers to APIs which support live DT
 - stm32mp: gpio: minor fixes
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Merge tag 'u-boot-stm32-20201003' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next

- stm32mp: DT alignment with Linux 5.9-rc4
- stm32mp: convert drivers to APIs which support live DT
- stm32mp: gpio: minor fixes
2020-10-05 10:54:10 -04:00
Ovidiu Panait
0db912de15 pinctrl: bcm283x: Store the return value of dev_read_u32_default to int
Currently, the return value of dev_read_u32_default is stored in an u32,
causing the subsequent "if (function < 0)" to always be false:

u32 function;
...
function = dev_read_u32_default(config, "brcm,function", -1);
if (function < 0) {
        debug("Failed reading function for pinconfig %s (%d)\n",
                      config->name, function);
        return -EINVAL;
}

Make "function" variable an int to fix this.

Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-10-02 17:32:28 +02:00
Ovidiu Panait
e020c07a02 pinctrl: bcm283x: Read address from DT in ofdata_to_platdata
Factor out reading IP base address to ofdata_to_platdata function, which
is designed for this purpose. Also, drop the dev->priv NULL check, since
this is already done by the dm core when allocating space using
priv_auto_alloc_size feature. (in drivers/core/device.c ->
device_ofdata_to_platdata).

Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-10-02 17:32:28 +02:00
Ovidiu Panait
bab9be9e0d pinctrl: bcm283x: DM_FLAG_PRE_RELOC: Remove OF_CONTROL check
Remove CONFIG_IS_ENABLED(OF_CONTROL) check from DM_FLAG_PRE_RELOC, since
this driver only supports OF_CONTROL.

drivers/pinctrl/broadcom/Kconfig:
config PINCTRL_BCM283X
    depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL

Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-10-02 17:32:28 +02:00
Patrick Delaunay
10bccd0dd3 pinctrl: stm32: Add header with SPDX licence
Cosmetics: Add header with SPDX licence

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-02 15:05:14 +02:00
Patrick Delaunay
d3bfad266c pinctrl: stm32: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-02 15:05:14 +02:00
Biju Das
953a3be768 pinctrl: renesas: Fix PINCTRL_PFC_R8A774A1 help description
R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same
for PINCTRL_PFC_R8A774A1 help description

Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing
number of the SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26 17:25:43 +02:00
Eugen Hristev
63ef81625e pinctrl: at91-pio4: add compatible for sama7g5 pinctrl block
Add new compatible to microchip,sama7g5 new SoC.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-25 10:39:22 +03:00
John Robertson
10d65bf00b pinmux: pic32: add SDHCI pin config
The GPIO pins used by the SDHCI controller need to be configured to
allow the interface to work.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
Heiko Schocher
5990b05951 powerpc, qe: add DTS support for parallel I/O ports
add DM support for parallel I/O ports on QUICC Engine Block

Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>

Series-changes: 2
- remove RFC
- fixed Codingstyle errors, therefore new patch
  powerpc, mpc83xx: fix codingstyle issues for qe_io.c
- moved DM part to drivers/pinctrl

Commit-notes:
Open questions / discussion:

- I let the old none DM based implementation in code
  so boards should work with old implementation.

  This should be removed if all boards are converted to
  DM/DTS.

- Unfortunately linux DTS does not use "pinctrl-"
  properties, instead "pio-handle" properties.

  Even worser old U-Boot code initializes all pins
  defined in "const qe_iop_conf_t qe_iop_conf_tab[]"
  table in board code. As linux does the same I decided
  to also scan through all subnodes containing "pio-map"
  property and initialize them too.

  The proper solution would be to check for "pio-handle"
  when a device is probed.

END
2020-09-17 06:09:53 +02:00
Simon Glass
0a0cdeceec x86: pinctrl: Fix 'relatove' typo
Fix this typo in the Kconfig help.

Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:27 +08:00
Masahiro Yamada
702e57e113 treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.

To generate this commit, I ran the following semantic patch
excluding include/dm/.

  <smpl>
  @@
  type T;
  expression dev;
  @@
  -(T *)devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  @@
  expression dev;
  @@
  -devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:37 -06:00
Ovidiu Panait
3fe69d3764 dm: core: Fix devfdt_get_addr_ptr return value
According to the description of devfdt_get_addr_ptr, this function should
return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.

Fix this by making devfdt_get_addr_ptr return NULL on failure, as
described in the function comments. Also, update the drivers currently
checking (void *)FDT_ADDR_T_NONE to check for NULL.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:59:14 -06:00
Chunfeng Yun
324220da63 pinctrl: mediatek: mt8512: fix the wrong start address of ranges
The start address of dout, pullen and pullsel ragnes are wrong,
so fix up them.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-19 17:37:37 -04:00
Michal Simek
171fd224ae pinctrl: aspeed: Fix Kconfig entry indentation
Fix Kconfig entry indentation for Aspeed ast2500 pin control driver.

Fixes: 4f0e44e466 ("aspeed: AST2500 Pinctrl Driver")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-04 23:30:02 -04:00
Tom Rini
f1c0b7cd4b For 2020.10
-----------
 
 - fixes for Toradex board
 - fix warnings from previous PR
 - HAB: reset instead of panic after failure
 - new board:  MYiR Tech MYS-6ULX
 - mx6cuboxi: use OF_PLATDATA
 - further changes for DM
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163
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Merge tag 'u-boot-imx-20200804' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

For 2020.10
-----------

- fixes for Toradex board
- fix warnings from previous PR
- HAB: reset instead of panic after failure
- new board:  MYiR Tech MYS-6ULX
- mx6cuboxi: use OF_PLATDATA
- further changes for DM

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163
2020-08-04 11:11:02 -04:00
Walter Lozano
24968d9e5f drivers: rename more drivers to match compatible string
Continuing with the approach in commit <addf358bac1d2bd0> rename
additional drivers to allow the OF_PLATDATA support.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:51:08 +02:00
Stefan Bosch
8d393b2c22 pinctrl: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
- doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
David Woodhouse
e05fdd9364 pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
The pins for the MMC controller weren't being set up correctly because the
pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
handle the special cases with PUPD/R0/R1 control.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-07-29 08:43:40 -04:00
Tom Rini
4e05c167a7 binman support for FIT
new UCLASS_SOC
 patman switch 'test' command
 minor fdt fixes
 patman usability improvements
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Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
2020-07-27 11:15:37 -04:00
Masahiro Yamada
2548493ab4 treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Masahiro Yamada
8613c8d897 treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.

One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:

    priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
    if (!priv->regs)
            return -EINVAL;

devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.

dev_read_addr_ptr() returns NULL on error, so this error check
will work.

I generated this commit by the following command:

 $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
   xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'

I manually fixed drivers/usb/host/ehci-mx6.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Adam Ford
43ef80325b pinctrl: renesas: Enable R8A774A1 PFC tables
The PFC tables for the R8A774A1 are already available, but they
not enabled.

This patch adds the Kconfig option and builds the corresponding file
when PINCTRL_PFC_R8A774A1 is enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 11:16:39 +02:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Masahiro Yamada
60e7fa8b3b treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
3c12c62ba5 treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.

One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:

    priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
    if (!priv->regs)
            return -EINVAL;

devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.

dev_read_addr_ptr() returns NULL on error, so this error check
will work.

I generated this commit by the following command:

 $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
   xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'

I manually fixed drivers/usb/host/ehci-mx6.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00