Commit graph

78098 commits

Author SHA1 Message Date
Janne Grunau
d15e1926ff iommu: Add M1 Pro/Max support to Apple DART driver
For the purpose of this driver (activating bypass mode) t6000-dart
and t8103-dart are fully compatible.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-21 08:35:40 -05:00
Mark Kettenis
0ae3c79b7c doc: board: apple: Update Apple M1 documentation
U-Boot now supports NVMe storage and on the laptop models, the
SPI keyboard.  Since we now disable the debug console by default
provide instructions on how the enable the debug console including
a table listing the appropriate UART base address for each of the
supported SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-21 08:35:40 -05:00
Mark Kettenis
5a0973f013 arm: apple: Disable debug UART
The address of the debug UART varies differs between the M1 and
the M1 Pro/Max SoCs.  So we have to disable it to make a single
U-Boot binary that works on all SoC generations.  Leave the
settings for the base address and clock rate of the M1 in place
to make it easier to re-enable the debug UART when needed.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-21 08:35:40 -05:00
Mark Kettenis
a89fea7fd1 arm: apple: Add M1 Pro/Max support
Choose the memory map based on the compatible property from the
device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max
starts at a different address avoid hardcoding the top of usable
memory. Also make sure that the addresses entered into the memory
map are page aligned such that we don't crash in dcache_enable().

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tested on: Macbook M1 Max
Tested-by: Janne Grunau <j@jannau.net>
2022-02-21 08:35:12 -05:00
Tom Rini
24b628a8f8 Xilinx changes for v2022.04-rc3
microblaze:
 - Fix exception handler
 
 zynqmp:
 - Show information about secure images
 - DT changes (som u-boot file removal)
 - Fix zynqmp_pm_cfg_obj_convert.py
 - Fix platform boot
 
 xilinx:
 - Fix bootm_size calculation
 - Remove GPIO_EXTRA_HEADER selection
 
 power:
 - Add zynqmp power management driver
 
 scsi:
 - Add phy support to ceva driver
 
 zynq qspi:
 - Fix unaligned accesses and check baudrate setup
 - Add support for spi memory operations
 
 net:
 - Fix 64bit calculation in axi_emac
 
 video:
 - Add missing gpio dependency for seps driver
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Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
2022-02-21 08:32:02 -05:00
Michal Simek
9bd4232f95 arm64: zynqmp: Remove additional gpio header from dlc21
This header shouldn't be in this file and there is already pointer to
dt-bindings/gpio/gpio.h.

Fixes: d2d14383ba ("arm64: zynqmp: Add support for DLC21 (Smartlynq+) board")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/266bc91073f1149f3f60b1c9c0ba509c48470e2e.1644911870.git.michal.simek@xilinx.com
2022-02-21 13:21:22 +01:00
Michal Simek
11381fba99 arm64: zynqmp: Fix debug uart initialization
The commit 0dba45864b ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
psu_init() via new psu_uboot_init() earlier before the first access to UART
in SPL. In full U-Boot call psu_uboot_init() only when
CONFIG_ZYNQMP_PSU_INIT_ENABLED is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/878dc2daaa8685346f889989fbfb98b2e44da7fb.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:29 +01:00
Michal Simek
05f0f269b7 ARM: zynq: Fix debug uart initialization
The commit 0dba45864b ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
ps7_init() earlier before the first access to UART.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18e67e02a0c7190839a1ef3a11f3fd6babcf34cc.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:24 +01:00
Michal Simek
83d2941fe9 arm64: zynqmp: Fix dependencies around ZYNQMP_PSU_INIT_ENABLED
ZYNQMP_PSU_INIT_ENABLED is called only when BOARD_EARLY_INIT_F is defined
that's why cover this dependency in Kconfig.
 board_early_init_f() is only part related to
CONFIG_ZYNQMP_PSU_INIT_ENABLED which is disabled now that's why disable
BOARD_EARLY_INIT_F and also build board_early_init_f() only when
CONFIG_BOARD_EARLY_INIT_F is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d89253ec1590cd513dcd4bfbedebae618bd6d605.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:19 +01:00
Michal Simek
27703ba06d arm64: zynqmp: Build psu_spl_init for SPL all the time
ZYNQMP_PSU_INIT_ENABLED specifically saying that has connection to full
U-Boot not SPL that's why build psu_spl_init for SPL all the time.

Also disable ZYNQMP_PSU_INIT_ENABLED because it ends up in situation that
psu_init() is called twice which is wrong. By default only SPL should call
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/bf1e5d9a163f8853c7d951ad42965114ab0b1f50.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:06 +01:00
Michal Simek
f063100593 xilinx: Enable OF_BOARD for zynq and zynqmp boards
The commit 9855034397 ("fdt: Don't call board_fdt_blob_setup() without
OF_BOARD") forced to enable OF_BOARD for platforms which provide DT
externally. Zynq/ZynqMP boards are using this feature for a long time
that's why there is a need to enable it by default.

Also code expects to return error in case of error that's why also fill it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:14:02 +01:00
Tom Rini
55e9cef143 u-boot-imx-20220220
-------------------
 
 CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11037
 
 - ESDHC fixes
 - imx8mq : MNT Reform 2 board
 - imx8m: add support for Advantech RSB-3720
 - fixes for imx8mn-ddr4-evk
 - fixes gateworks boards
 - doc : fix build for imx8mn_beacon
 - fuses: compare and read functions
 - imx8mn-ddr4-evk: boot from SD and Ethernet support
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Merge tag 'u-boot-imx-20220220' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220220
-------------------

CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11037

- ESDHC fixes
- imx8mq : MNT Reform 2 board
- imx8m: add support for Advantech RSB-3720
- fixes for imx8mn-ddr4-evk
- fixes gateworks boards
- doc : fix build for imx8mn_beacon
- fuses: compare and read functions
- imx8mn-ddr4-evk: boot from SD and Ethernet support
2022-02-20 12:07:20 -05:00
Marek Vasut
fea6607317 ARM: imx: imx8mn-ddr4-evk: Add ethernet support
Add support for ethernet on the imx8mn-ddr4-evk.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-02-19 23:32:23 +01:00
Heiko Thiery
3240d011ae kontron-pitx-imx8m: fix board_mmc_getcd()
The function wrongly will return the card detection status of the SD card
(USDHC2) for the eMMC (USDHC1). Thus booting from eMMC without an inserted
SD card will fail.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-02-19 23:32:23 +01:00
Heiko Thiery
891a32465d kontron-sl-mx8mm: change environment address variables
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.

The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".

The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-19 23:32:23 +01:00
Francesco Dolcini
a1128944a1 colibri-imx6ull: improve env badblock management
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module to
have a working environment even if 3 blocks are bad.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-02-19 23:32:22 +01:00
Michael Trimarchi
9da828c207 imx8m: Drop unused function env_get_offset
This function is used in nxp u-boot tree.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-19 14:46:54 +01:00
Lukasz Majewski
c4c3fa98ac xea: defconfig: Update defconfig to support mtd partitions r/w by name
After this change it would be possible to use 'mtd' command to get access
to XEA's SPI-NOR partitions by name (e.g. SPL), not by offsets.

To enable this feature the CONFIG_SPI_FLASH_MTD needs to be defined in the
Kconfig, not in xea.h.

=> mtd list
=> mtd read spl-boot-data1 ${loadaddr} 0x0 4
=> md.l ${loadaddr} 1

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-02-19 14:46:54 +01:00
Marek Vasut
6e3cef06da ARM: imx: imx8mn-ddr4-evk: Fix boot from SD card
Enable missing config options to make the board boot from SD card.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-02-19 14:46:54 +01:00
Tim Harvey
10673ebb1f board: gateworks: venice: config file cleanups
Clean up config file:
 - remove unnecessary IMX_FEC_BASE
 - remove unnecessary comment
 - remove ipaddr/serverip from env

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-19 14:46:54 +01:00
Tim Harvey
2cb156e126 board: gateworks: venice: add imx8mn-gw7902 support
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller
 - LTE CAT M1 modem
 - USB 2.0 HUB
 - M.2 Socket with USB2.0, PCIe, and dual-SIM
 - IMX8M FEC
 - PCIe based GbE
 - RS232/RS485/RS422 serial transceiver
 - GPS
 - CAN bus
 - WiFi / Bluetooth
 - MIPI header (DSI/CSI/GPIO/PWM/I2S)
 - PMIC

To add support for the i.MX8M Nano GW7902:
 - Add imx8mn-venice dts/defconfig/include
 - Add imx8mn-gw7902 dts
 - Add imx8mn-2gb lpddr4 dram configs
 - Add misc support for IMX8M Nano SoC
 - rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
 - update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-19 14:46:54 +01:00
Haibo Chen
d7d042e8b6 mmc: fsl_esdhc_imx: correct the actual card clock
The original code logic can not show the correct card clock, and also
has one risk when the div is 0. Because there is div -=1 before.

So move the operation before div -=1, and also involve ddr_pre_div
to get the correct value.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-02-19 14:46:54 +01:00
Haibo Chen
45254edd94 mmc: fsl_esdhc_imx: remove redundant ARCH_MXC
Now original fsl_esdhc.c are split as fsl_esdhc.c and fsl_esdhc_imx.c.
fsl_esdhc_imx.c only cover i.MX SoC. So ARCH_MXC is redundant.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-02-19 14:46:54 +01:00
Ying-Chun Liu (PaulLiu)
ddb56f371a arm: imx8m: add support for Advantech RSB-3720
Add initial support for Advantech RSB-3720 board.
The initial support includes:
 - MMC
 - eMMC
 - I2C
 - FEC
 - Serial console

Signed-off-by: Darren Huang <darren.huang@advantech.com.tw>
Signed-off-by: Kevin12.Chen <Kevin12.Chen@advantech.com.tw>
Signed-off-by: Phill.Liu <Phill.Liu@advantech.com.tw>
Signed-off-by: Tim Liang <tim.liang@advantech.com.tw>
Signed-off-by: wei.zeng <wei.zeng@advantech.com.cn>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
Cc: Peng Fan (OSS) <peng.fan@oss.nxp.com>
2022-02-19 14:46:54 +01:00
Heiko Thiery
b345f177b9 configs/*imx8mn*: remove [SPL_]CLK_COMPOSITE_CCF
This option is selected implicitly when [SPL_]CLK_IMX8MN is selected.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-02-19 14:46:54 +01:00
Heiko Thiery
e7c5a6383b clk: imx: select [SPL_]CLK_COMPOSITE_CCF for imx8mn
The clock composite is required when using the clock framework. So
select it automatically.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-02-19 14:46:54 +01:00
Adam Ford
e426a3a3dc imx8mm_beacon/imx8mn_beacon: Update build instructions
With binman generating flash.bin, it's not longer necessary to
specify either the location of ATF nor is it necessary to
specify building flash.bin, so let's update the build instructions
to remove those.  While in here, update the revision of ATF and
DDR firmware so both Mini and Nano reference the same revision.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-19 14:46:54 +01:00
Adam Ford
1a7904fdfa mmc: fsl_esdhc_imx: Use esdhc_soc_data flags to set host caps
The Linux driver automatically can detect and enable UHS, HS200, HS400
and HS400_ES automatically without extra flags being placed into the
device tree.

Right now, for U-Boot to use UHS, HS200 or HS400, the extra flags are
needed in the device tree.  Instead, go through the esdhc_soc_data
flags and enable the host caps where applicable to automatically
enable higher speeds.

Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-19 14:46:54 +01:00
Patrick Wildt
e72cb770d4 arm: dts: imx8mq: add MNT Reform 2
Device tree taken from Linux v5.16-rc5.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-18 18:12:23 +01:00
Tommaso Merciai
22636ca23b freescale: imx8mm_evk: Use IS_ENABLED instead of #ifdef
Use IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) to make the code
more readable and fix checkpatch.pl warning

Signed-off-by: Tommaso Merciai <tomm.merciai@gmail.com>
2022-02-18 18:12:23 +01:00
Oleh Kravchenko
310d6655a1 Enable Fastboot(UUU) for O4-iMX6ULL-NANO boards
Make O4-iMX6ULL-NANO-based board compatible with Yocto layer meta-out4 and
fix device flashing by UUU (aka MFG Tools).

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
2022-02-18 18:12:23 +01:00
Harald Seiler
f62611a9ed imx: spl: Fix typo BMODE_EMI -> BMODE_EIM
The interface for NOR/OneNAND is called "EIM" not "EMI".  Fix this.

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-18 18:12:23 +01:00
Angus Ainslie
b4f0c7f613 cmd: fuse: Add a command to read fuses to memory
With the fuse values in memory we can use some of the other u-boot shell
conditonal operators to do tests.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-02-18 18:12:23 +01:00
Angus Ainslie
c2a4af5ca8 cmd: fuse: add a fuse comparison function
Compare a hexval to the fuse value and return pass or fail.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-02-18 18:12:23 +01:00
Tom Rini
8ad1c9c26f Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- a37xx: pci: Cleanup and minor fix for root port check (Pali)
- pci: mvebu: Ensure that root port is always on root zero bus (Pali)
- kwbimage: Fix dumping DATA registers for v0 images (Pali)
- kwbimage: Support for parsing extended v0 format (Pali)
- a37xx: Fix code and update DTS files to upstream version (Pali)
- a37xx: Fix and extend building memory map (Pali)
- ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision (Marek)
- mvebu: Optionally reset board on DDR training failure (Marek)
2022-02-17 11:03:50 -05:00
Marek Behún
4b7db75616 arm: mvebu: turris_omnia: Reset the board immediately on DDR training failure
The state of the current DDR training code for Armada 38x is such that
we cannot be sure it will always train successfully - although after the
last change we were yet unable to find a board that failed DDR training,
from experience in the last 2 years we know that it is possible.

The experience also tells us that in many cases the board fails training
only sometimes, and after a reset the training is successful.

Enable the new option that makes the board reset itself on DDR training
failure immediately. Until now we called hang() in such a case, which
meant that the board was reset by the MCU after 120 seconds.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-02-17 14:17:07 +01:00
Marek Behún
871ee6634d arm: mvebu: spl: Add option to reset the board on DDR training failure
Some boards may occacionally fail DDR training. Currently we hang() in
this case. Add an option that makes the board do an immediate reset in
such a case, so that a new training is tried as soon as possible,
instead of hanging and possibly waiting for watchdog to reset the board.

(If the DDR training fails while booting the image via UART, we will
 still hang - it doesn't make sense to reset in such a case, because
 after reset the board will try booting from another medium, and the
 UART booting utility does not expect that.)

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
43558a0288 tools: kwbimage: Add me as an author of kwbimage
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
107d587fe2 tools: kwbimage: Fix help how to extract DDR3 training code
First binary executable header is extracted by '-p 1' argument.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
a6661a0ea2 tools: kwbimage: Add support for NAND_BLKSZ and NAND_BADBLK_LOCATION for v0 images
These two commands are currently not processed when generating v0 images.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
e65ea147e2 tools: kwbimage: Do not show mkimage error message in dumpimage
When pflag is set then kwbimage was invoked by dumpimage and not mkimage.
So do not show mkimage error message in this case.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
f76ae2571f tools: kwbimage: Add support for dumping extended and binary v0 headers
dumpimage is now able to successfully parse and dump content of the Dove
bootloader image.

Note that support for generating these extended parts of v0 images is not
included yet.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
9a9a2c1acf tools: kwbimage: Fix calculating size of kwbimage v0 header
Extended and binary headers are optional and are part of the image header.

Fixes kwboot to determinate correct length of Dove images.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
3917ec57f7 tools: kwbimage: Define structures for extended kwbimage v0 headers
They are used by Marvell Dove 88AP510 BootROM.

After the main header is a list of optional extended headers and after that
is a list of optional binary executable headers. Between each two extended
headers is additional 0x20 byte long padding.

Original Kirkwood SoCs support only one extended header and no binary
executable header.

Extension of struct ext_hdr_v0 is backward compatible with the old
definition. Only reserved[] fields are changed.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Marek Behún
a163db9fba ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision
In commit 3fc92a215b ("ddr: marvell: a38x: fix SPLIT_OUT_MIX state
decision") I ported a cleaned up and changed version of patch
  mv_ddr: a380: fix SPLIT_OUT_MIX state decision

In the port we removed checking for BYTE_HOMOGENEOUS_SPLIT_OUT bit,
because:
- the fix seemed to work without it
- the bit was checked for only at one place out of two, while the second
  bit, BYTE_SPLIT_OUT_MIX, was checked for in both cases
- without the removal it didn't work on Allied Telesis' x530 board

We recently had a chance to test on more boards, and it seems that the
change needs to be opposite: instead of removing the check for
BYTE_HOMOGENEOUS_SPLIT_OUT from the first if() statement, the check
needs to be added also to the second one - it needs to be at both
places.

With this change all the Turris Omnia boards I have had available to
test seem to work, I didn't encounter not even one failed DDR training.

As last time, I am noting that I do not understand what this code is
actually doing, I haven't studied the DDR training algorithm and
I suspect that no one will be able to explain it to U-Boot contributors,
so we are left with this blind poking in the code with testing whether
it works on several boards and hoping it doesn't break anything for
anyone :-(.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
18ab060288 arm: mvebu: a37xx: Fix comment with name of the function
Function is named build_mem_map, not a3700_build_mem_map.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-02-17 14:17:07 +01:00
Pali Rohár
65375d026a arm: mvebu: a37xx: Map CCI-400 and AP BootROM address space
In function build_mem_map() prepare also mapping for CCI-400 and
BootROM windows.

BootROM window is 1 MB long and by default starts at address 0xfff00000.
A53 AP BootROM is 16 kB long and repeats in this BootROM window 64 times.
RVBAR_EL3 register is set to value 0xffff0000, so by default A53 AP BootROM
is accessed via range 0xffff0000-0xffff3fff.

CCI-400 window when new TF-A version is used, starts at address 0xfe000000
and when old TF-A version is used, starts at address 0xd8000000.

Physical addresses are read directly from mvebu registers, so if TF-A
remaps it in future (again) then it would not cause any issue for U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
2fb7426cf0 arm: mvebu: a37xx: Fix calling build_mem_map()
Function build_mem_map() modifies global variable mem_map. This variable is
used by the get_page_table_size() function which is called by function
arm_reserve_mmu() (as aliased macro PGTABLE_SIZE). Function
arm_reserve_mmu() is called earlier than enable_caches() which calls
build_mem_map(). So arm_reserve_mmu() does not calculate reserved memory
correctly.

Fix this issue by calling build_mem_map() from a3700_dram_init() which is
called before arm_reserve_mmu().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-02-17 14:17:07 +01:00
Pali Rohár
0eebc3dbe5 pci: mvebu: Ensure that root port is always on root zero bus
Writing to the PCI_PRIMARY_BUS register of the root port should not change
bus number on which is root port present.

Same change and exactly same fix as was done in commit for pci-aardvark.c.

Fixes: a7b61ab58d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
682bad8cec arm: a37xx: pci: Update comment about Command/Direct mode
Code is changing PCIe controller from Command mode to Direct mode.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00