Commit graph

595 commits

Author SHA1 Message Date
Masahiro Yamada
2548493ab4 treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Masahiro Yamada
60e7fa8b3b treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Tom Rini
7c3cc6f106 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86: A few fixes to FSP2 with ApolloLake
- x86: Drop setup_pcat_compatibility()
- x86: Primary-to-Sideband Bus minor fixes
2020-07-17 08:04:48 -04:00
Simon Glass
b95611f67e x86: apl: Fix save/restore of ITSS priorities
The FSP-S changes the ITSS priorities. The code that tries to save it
before running FSP-S and restore it afterwards does not work as U-Boot
relocates in between the save and restore. This means that the driver
data saved before relocation is lost and the new driver just sees zeroes.

Fix this by allocating space in the relocated memory for the ITSS data.
Save it there and access it from the driver after relocation.

This fixes interrupt handling on coral.

Also drop the log_msg_ret() in irq_first_device_type() since this function
can be called speculatively in places where we are not sure if there is
an interrupt controller of that type. The resulting log errors are
confusing when there is no error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
6d349e2e43 p2sb: Add a method to hide the bus
The P2SB bus needs to be hidden in some cases so that it does not get
auto-configured by Linux. Add a method for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
4916f4586e x86: pinctrl: Add a way to get the pinctrl reg address
At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
Simon Glass
f4955137f5 irq: Add a method to convert an interrupt to ACPI
When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new IRQ method to do the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Wolfgang Wallner
d872e7da7a drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge
In Intel's documentation the term P2SB stands for "Primary to Sideband
Bridge".

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Ye Li
dfbdaa66b7 misc: scu_api: Add SCFW API to get the index of boot container set
Add SCFW API sc_misc_get_boot_container to get current boot container
set index.
The index value returns 1 for primary container set, 2 for secondary
container set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-16 11:19:50 +02:00
Peng Fan
c2eaa6eb09 imx8: fuse: use arm_smccc_smc
Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Walter Lozano
51f1263d89 dtoc: extend dtoc to use struct driver_info when linking nodes
In the current implementation, when dtoc parses a dtb to generate a struct
platdata it converts the information related to linked nodes as pointers
to struct platdata of destination nodes. By doing this, it makes
difficult to get pointer to udevices created based on these
information.

This patch extends dtoc to use struct driver_info when populating
information about linked nodes, which makes it easier to later get
the devices created. In this context, reimplement functions like
clk_get_by_index_platdata() which made use of the previous approach.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 22:00:29 -06:00
Walter Lozano
e3e2470fdd drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.

In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Pragnesh Patel
05307213c6 misc: add driver for the SiFive otp controller
Added a misc driver to handle OTP memory in SiFive SoCs.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Eugen Hristev
b24dc83f15 misc: i2c_eeprom: implement different probe test eeprom offset
Because of this commit :
5ae84860b0 ("misc: i2c_eeprom: verify that the chip is functional at probe()")
at probe time, each eeprom is tested for read at offset 0.

The Atmel AT24MAC402 eeprom has different mapping. One i2c slave address is
used for the lower 0x80 bytes and another i2c slave address is used for the
upper 0x80 bytes. Because of this basically the i2c master sees 2 different
slaves. We need the upper bytes because we read the unique MAC address from
this EEPROM area.

However this implies that our slave address will return error on reads
from address 0x0 to 0x80.

To solve this, implemented an offset field inside platform data that is by
default 0 (as it is used now), but can be changed in the compatible table.

The probe function will now read at this offset and use it, instead of blindly
checking offset 0.

This will fix the regression noticed on these EEPROMs since the commit
abovementioned that introduces the probe failed issue.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-05-28 06:51:06 +02:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
e6f6f9e648 common: Drop part.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
b79fdc7697 common: Drop flash.h from common header
Move this uncommon header out of the common header.

Fix up some style problems in flash.h while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:53:28 -04:00
Trevor Woerner
71f6354b0e rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Ye Li
77ed80c9ec misc: scu: Increase the timeout for MU communication
When power on some sources in Video system, current timeout 10ms is
too short and returns before SCU response. So increase the timeout
to 1s.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
e5e95ecf1e misc: fuse: Update imx8 fuse driver for 8QM
Add the second ECC fuse area for 8QM which is different with 8QXP

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Franck LENORMAND
242d1cd69b imx8: Configure SNVS
Add a module to configure the tamper and secure violation of
the SNVS using the SCU API.

The module also adds some commands:
 - snvs_cfg: Configure the SNVS HP and LP registers
 - snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP)
 - tamper_pin_cfg: Change the configuration of the tamper pins
 - snvs_clear_status: Allow to write to LPSR and LPTDSR to clear
   status bits

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
73d769d8af imx8: Update SCFW API to version 1.5
Sync the latest SCFW API with below commit
6dcd0242ae7a53ac ("SCF-105: Revert accidental change") to add
interfaces for PM resource reset and read/write SNVS security
violation and tamper DGO registers.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Breno Lima
f959594db2 imx8: scu api: Add support for SECO manufacturing protection APIs
SECO provides APIs to support CAAM manufacturing protection:

- sc_seco_get_mp_key()
- sc_seco_get_mp_sign()
- sc_seco_update_mpmr()

Add SCFW APIs support.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Simon Glass
8a770f9eb7 sandbox: p2sb: Silence compiler warning
Some compilers produce a warning about 'child' being used before init.
Silence this by setting to NULL at the start.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 08:07:57 -06:00
Tom Rini
2738f0edea Merge tag 'ti-v2020.07-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
K3 J721E:
* OSPI boot support
* Support for loading remote cores in R5 SPL
* PMIC ESM Support
* Minor fixes for R5F and C7x remoteproc drivers

K3 AM654:
* Update AVS class 0 voltages.
* Add I2C nodes

DRA7xx/AM57xx:
* Fixed Android boot on AM57xx

AM33/AM43/Davinci:
* switch to driver model for the net and mdio driver for baltos
* Add DM/DTS support for omap video driver
* Enable fastboot on am335x-evm
2020-03-17 11:59:58 -04:00
Masahiro Yamada
0c17bb1cbe misc: i2c_eeprom: store pagesize instead of pagewidth in i2c_eeprom_drv_data
Associate the pagesize with compatible strings, and copy it to
priv->pagesize. This is more straight-forward.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16 08:03:29 +01:00
Masahiro Yamada
ed6dd4e460 misc: i2c_eeprom: remove pagewidth field from i2c_eeprom
This struct member is not used in any effective way. Remove it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16 08:03:05 +01:00
Tero Kristo
3e7b0aa1fd power: mfd: k3_avs: update am65xx MPU_VDD voltage values
The latest data manual SPRSP08I –NOVEMBER 2017–REVISED DECEMBER 2019[1]
for am65xx SoC states the new MPU nominal voltages to be 1.1V (OPP_NOM),
1.2V (OPP_OD) and 1.24V (OPP_TURBO). Update the nominal voltages in the
K3 AVS driver to reflect this.

[1] http://www.ti.com/lit/gpn/am6528

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
3b36b38f50 misc: pmic_esm: Add support for PMIC ESM driver
The ESM (Error Signal Monitor) is used on certain PMIC versions to
handle error signals propagating from rest of the system. If these
reach the PMIC, it is typically a last resort fatal error which
requires a system reset. The ESM driver does the proper configuration
for the ESM module to reach this end goal. Initially, only TPS65941
PMIC is supported for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
344eb6d572 misc: k3_esm: Add support for Texas Instruments K3 ESM driver
The ESM (Error Signaling Module) is used to route error signals within
the K3 SoCs somewhat similar to interrupts. The handling for these is
different though, and can be routed for hardware error handling, to
be handled by safety processor or just as error interrupts handled
by the main processor. The u-boot level ESM driver is just used to
configure the ESM signals so that they get routed to proper destination.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Vignesh Raghavendra
7a8d03f88e misc: k3_avs: Fix possible NULL pointer deference
Its possible that k3_avs_priv is NULL because the driver may not have
been probed yet. Therefore check if pointer is valid before
dereferencing it.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-02-26 18:35:29 +05:30
Tom Rini
9a8942b53d sandbox conversion to SDL2
TPM TEE driver
 Various minor sandbox video enhancements
 New driver model core utility functions
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl48iogACgkQfxc6PpAI
 reaVzAf/an3/yKe6r3CVWlcRV6H/dVg1ApnnLpX7jS0p0b++oCVvOiy7z1WPXj3k
 b1SSgENDeeZ/8EHio+Gf7ZidH/TGEj7L6YEFwd1t60GMkZiWEkNf4Z53tw482YG+
 96hoPD+ySTW+ddIdVHWAFG2I4aEiKHANJAp/ItNdD+rLbrEwNQy+eiK5JTOk80B6
 /X8AJCLZeAC1s7vs+2+WolgjT78QGzA9HHalMiublcqh0ivKKk0QeQiOKKPe8JYJ
 om5YY1TxayQ60Xmo5f39/SBfzEEklxw83sU9o1tBeYzyVUpu7fQdkxiDbWdsij77
 DgwLdeYQJGbN+hdSWE0gjTqyhW+lWA==
 =KRoA
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
2020-02-11 10:58:41 -05:00
Tom Rini
4e5c4683b7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Move P2SB from Apollo Lake to a more generic location
- Add a function to find a device by drvdata in DM core
- Enhancement of DM IRQ uclass driver
- Add a clock driver for Intel devices
- Add support for ACPI general-purpose events
- Add a TPM driver for H1/Cr50
- Enable TPM on Google Chromebook Coral
2020-02-10 12:27:31 -05:00
Robert Beckett
821c982e35 misc: i2c_eeprom: set offset len and chip addr offset mask
Set the correct offset length and chip address offset mask for each
device to allow correct access to total capacity of the devices.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09 21:47:20 +01:00
Simon Glass
025543554c dm: irq: Add support for requesting interrupts
At present driver model supports the IRQ uclass but there is no way to
request a particular interrupt for a driver.

Add a mechanism, similar to clock and reset, to read the interrupts
required by a device from the device tree and to request those interrupts.

U-Boot itself does not have interrupt-driven handlers, so just provide a
means to read and clear an interrupt. This can be useful to handle
peripherals which must use an interrupt to determine when data is
available, for example.

Bring over the basic binding file as well, from Linux v5.4. Note that the
older binding is not supported in U-Boot; the newer 'special form' must be
used.

Add a simple test of the new functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:46:32 +08:00
Simon Glass
ba87607971 dm: irq: Add support for interrupt controller types
There can be different types of interrupt controllers in a system and some
drivers may need to distinguish between these. In general this can be
handled using the device tree by adding the interrupt information to
device nodes.

However on x86 devices we have interrupt controllers which are not tied
to any particular device and not really used in U-Boot. These still need
to be inited, so a convenient method is to give each controller a type
and allow a particular controller type to be probed.

Add support for this in sandbox along with a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove the new bland line at EOF of test/dm/irq.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:44:59 +08:00
Simon Glass
21d651fb29 sandbox: Complete migration away from os_malloc()
Now that we can use direct access to the system malloc() in sandbox, drop
the remaining uses of os_malloc().

The only one remaining now is for the RAM buffer, which we do want to be
at a known address, so this is intended.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 21:48:23 -07:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
c4e72c4ad8 dm: pci: Update the PCI read_config() method to const dev *
At present this method uses a non-const udevice pointer, but the call
should not modify the device. Use a const pointer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:45 -07:00
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00
Simon Glass
015e3348fc common: Drop floppy disk support
This seems pretty old now. It has not been converted to driver model and
is not used by any boards.

Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:26:50 -05:00
Tom Rini
deb287b561 ---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
 Update README for i.MX8MN EVK and fix mmc env
 Add pca9450 driver
 --------------------------------------------------------------------
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl4WDPkPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et30w0L/RGSJLeO460ULkMQMGEkbMLODzWinIuVSUUe
 wEGikQZwI4AiDWX1NA57Dpx7uVF/ADa/NT2x9YLZL8VPHgzuU7RDp57pdBymU0Wk
 k/kDqSPVkIA0CX8iF/l092vOOIKecIpxpEXblRYs+Az7Vusrwm6SxQ3hjSn6KgpY
 gtu/VB+XizejiYmE5hJhu8cvMpAeCrJ0a+qPJC+hVsvFC2wV3NoqJspMOIUt+rPm
 UCv4uSisSWf2MgR2rEYbX9IDgu7S3hcj/8Ml4f9aqQQBciS4X/Af+iUjZL/mXY2K
 ZerDGQhC92TRmTj9Ir6mf8CEAdt0scsNgTVvteN/evP85K25s2l7yrYWjyp5H/vm
 tao0H/Lr8gKlLKgMSgdLixoV8eaMHPE4I/BD+DGVIK1rOQ35zzYTJRd2PIxg7GiP
 7orW29rJrPMAMDBbeEi657u/zUS7ZUzkrLWnIIoFurUfZ83pjlqlxcT1zfZ0juJk
 z8iQKU4oKdN4gL5zQPbyqCHcCdlDJw==
 =YoPF
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
Update README for i.MX8MN EVK and fix mmc env
Add pca9450 driver
--------------------------------------------------------------------

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
2020-01-08 15:24:50 -05:00
Peng Fan
67f3f32c6a mxc_ocotp: support i.MX8MP
i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks
and ctrl register bit definitions, so update to reflect that.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Tom Rini
c0912f9bbf Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next
- Various x86 common codes updated for TPL/SPL
- I2C designware driver updated for PCI
- ICH SPI driver updated to support Apollo Lake
- Add Intel FSP2 base support
- Intel Apollo Lake platform specific drivers support
- Add a new board Google Chromebook Coral
2019-12-18 07:20:19 -05:00
Robert Beckett
033e18b47b misc: i2c_eeprom: add size query
Add ability to query size of eeprom device and partitions

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-12-17 06:58:19 +01:00
Robert Beckett
1a59cb426d misc: i2c_eeprom: add fixed partitions support
Add ability to partition eeprom via devicetree bindings

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-12-17 06:58:16 +01:00
Robert Beckett
951674ac7e dm: i2c: EEPROM simulator add tests for addr offset mask
Add support for setting the chip address offset mask to EEPROM sumulator
and add tests to test it.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-12-17 06:57:31 +01:00
Robert Beckett
22e93511be dm: i2c: EEPROM simulator allow tests visibility of addr and offset
Improve i2c EEPROM simulator testing by providing access functions to
check the previous chip addr and offset.

Given that we can now directly test the offsets, also simplified the
offset mapping and allow for wrapping acceses.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-12-17 06:57:22 +01:00
Simon Glass
fbb0efdd27 sandbox: Add a test for IRQ
Add a simple sandbox test for this uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:12 +08:00
Simon Glass
79d66a6ac1 x86: Move UCLASS_IRQ into a separate file
Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:12 +08:00
Simon Glass
3e17ffbb44 sandbox: Add PCI driver and test for p2sb
Add a sandbox driver and PCI-device emulator for p2sb. Also add a test
which uses a simple 'adder' driver to test the p2sb functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:11 +08:00
Simon Glass
5bee27aa41 pci: Add support for p2sb uclass
The Primary-to-Sideband bus (P2SB) is used to access various peripherals
through memory-mapped I/O in a large chunk of PCI space. The space is
segmented into different channels and peripherals are accessed by
device-specific means within those channels. Devices should be added in
the device tree as subnodes of the p2sb.

This adds a uclass and enables it for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:11 +08:00
Michael Auchter
b4f98b3b16 cros_ec: use uint instead of uint8_t for cmd param
Chromium EC commands can be up to 16-bits, so using a uint8_t here can
cause truncation. Update to use a uint instead.

It looks like this should likely have been done as a part of
9fea76f5d3, but this function was skipped
for some reason.

Signed-off-by: Michael Auchter <michael.auchter@ni.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-12-10 21:11:31 -07:00
Simon Glass
cb3ef6810a common: Move old EEPROM functions into a new header
These functions do not use driver model but are still used. Move them to a
new eeprom.h header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:25 -05:00
Simon Glass
1045315df0 common: Move get_ticks() function out of common.h
This function belongs in time.h so move it over and add a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:13 -05:00
Simon Glass
3db7110857 crc32: Use the crc.h header for crc functions
Drop inclusion of crc.h in common.h and use the correct header directly
instead.

With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Simon Glass
c076e5c9b3 status_led: Tidy up the code style
There are a few whitespace problems with this code. Tidy them up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:06 -05:00
Simon Glass
c3e4430ef3 common: Drop global inclusion of status_led.h
This is only used by a few files so it should not be in the common header.
Move it out.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:06 -05:00
Finley Xiao
a907dc3f25 misc: add driver for the Rockchip otp controller
Newer Rockchip socs like the px30 use a different ip block to handle
one-time-programmable memory, so add a misc driver for it as well.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17 17:23:15 +08:00
Tom Rini
5f7ff6d63e u-boot-imx-20191105
-------------------
 i.MX8MN SoC support
 ROM API image download support
 i.MX8MM enet enabling
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl3BmLkPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3oVwL/2Z7kCMCjudXNjXqJFSVsCizuzaxkYvUDQCK
 g8+P7pdci/xZz8pVvVD5zmpZGRM2hu+7hFQwIlSu7anlRqdW+9cZCAJoeq/4A29c
 TkI3w99R0xTDGFlip0zM4vKlQXmC0I0LYbJPVDLjN+zNkhL6QNS3QptONw/3xPzr
 Vj5+eztasl5JOnkTFE8yZkfbkekgPbO4h43oje5XwRdRQcwzo4qEFZcxZzvucz39
 0RXyvu5qtXvSeVYApXeYcnBD3Mn4rjq26rfn2EEntkO0FbhYBHBjwx3/ozmUaOFR
 7AtNyZZSAZFe03egfX6+ODx7tuOTA0PK1LLdogMjLDrOd70px+P7wxY9QZV6hKw9
 TC4YlboZK2bjsPyOwIraTWVUvU9YjQzlPT0SYjyIono33Av1Um7RDvp+XeyG7VPC
 AYE6luZwhauYNUaGegFPexDxOSRqeAiTLx3kOOeHb4Vb4KkJu4Np7Pma2uiqI00V
 4TpWJwhqQPn7lo/N1X9ymBx6iNvt2Q==
 =sgCz
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191105
-------------------
i.MX8MN SoC support
ROM API image download support
i.MX8MM enet enabling
2019-11-12 07:18:23 -05:00
Keerthy
9a03e50c5f misc: k3_avs: Add j721e support
j721e SoCs have different OPP tables. Add support for the same.

Note: DM Still has lot of voltages TBD hence the correct
values need to be programmed once they are published.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
Tero Kristo
9d233b4e3e misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
Peng Fan
816d093c1a misc: imx8: scu: simplify code to make it extendable
clk and pinctrl will be get(probed) during each device probe,
we don't need to probe them in scu driver. Only need to bind the sub-nodes
(clk and iomuxc) of MU node with their drivers.

So drop the code to probe the clk/pinctrl, and this patch will make it
easy to add more subnodes.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Ye Li
264977d1c2 mach-imx: Adding new argument for SIP call interface
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ,
so update the interface to add new argument.

Signed-off-by: Ye Li <ye.li@nxp.com>
[agust: fixed imx8m-power-domain build]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Eugen Hristev
f81649586d misc: microchip_flexcom: introduce microchip_flexcom driver
The Microchip Flexcom is just a wrapper which embeds a SPI controller,
an I2C controller and an USART.
Only one function can be used at a time and is chosen at boot time according
to the device tree.
The bindings are kept as in Linux.
The driver registers to MISC_UCLASS.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-24 13:01:57 +03:00
Tom Rini
eaa0bde051 u-boot-imx-20191009
-------------------
 
 Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532
 
 - MX6UL / ULZ
 - Toradex board
 - Allow to set OCRAM for MX6Q/D
 - MX7ULP
 - MX8: (container image, imx8mq_mek), SCU API
 - fix several board booting from SD/EMMC (cubox-i for example)
 - pico boards
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl2dlTAPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3yfgL/1b4pKCwxswK42XkPpdHN1u/v2W/PVDanl/H
 EYxlluHVFH23bLTjLvrrgQjAnZD1VQhxWq3bwCMoJ8vb9tYQ3d9vq7XADQ0WVQV+
 EfhE33fVRPRT3rEdhDKWm+y1mL8YPvYEBnr9li7qU9n1VxiwONPXxMXMqoo9/lbM
 b6lJaG5KkuK8Ofx3cYFVQeAEdsFYIJ2aXtTqsqrV9o2sjruOuG3Ux+6Ov+9O0crY
 q8MXvW6kwWkVVNriVV7Yal0pomPZfMTqft007En9Mv2FtXqMeCWZ4Xh2LtRylR7n
 ruIbo94jkPuwuZ0p/6SeiyopoG/hU/skrkJv1s8W70DOsyaunP2BsveYXEjMV2Rb
 DomotcJit9Ws6P7rOP1oI8OvxSxVN8n6mo23UviZd8MjNAmOm49BtSxVGGB+pwmr
 ufGFG4MGQ5VpCxmzh6KrJCLXpI/mhKrkBkZy58cUbus7aPv3es/jBmmtGlU3m6ka
 NlEzHOX1hpJV/lhLvxjqRhVxuXvXOA==
 =+e3p
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191009
-------------------

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532

- MX6UL / ULZ
- Toradex board
- Allow to set OCRAM for MX6Q/D
- MX7ULP
- MX8: (container image, imx8mq_mek), SCU API
- fix several board booting from SD/EMMC (cubox-i for example)
- pico boards

[trini: display5 merged manually]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-09 11:44:45 -04:00
Peng Fan
4d81755272 misc: imx8: add more scfw api
Add more scfw api for clk/partition/seco usage
The api will be used by ccf/partition/secure boot.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
8cacd788b4 imx: scu_api: add sc_pm_is_partition_started
Add sc_pm_is_partition_started to check whether a partition
has been started. This will be used to detect M4 partition booted up or
not, then we could choose which dtb to use. If M4 is up, we need
use dtb, such as imx8qm-mek-rpmsg.dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
268644735b imx: scu_api: add sc_rm_set_master_sid
Add sc_rm_set_master_sid to set stream sid of masters to make
sure they could use smmu.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
994ab731b3 misc: Kconfig: make i.MX7ULP could use MXC_OCOTP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Simon Glass
75d8f49481 sandbox: pci: Create a new sandbox_pci_read_bar() function
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:48 +08:00
Simon Glass
37a1cf9c9c sandbox: pci: Move pci_offset_to_barnum() to pci.h
This function is useful in PCI emulators. More it into the header file to
avoid duplicating it in other drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:40 +08:00
Simon Glass
fae2c16ede sandbox: pci: Drop the get_devfn() method
This method is not used anymore since the bus/device/function of PCI
devices can be obtained from their (parent's per-child) platform data.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:40 +08:00
Simon Glass
cea7c0956a sandbox: swap_case: Use statics where possible
Some functions and a struct should be marked static since they are not
used outside this file. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:40 +08:00
Simon Glass
3414581380 sandbox: Rename PCI ID for swap_case to be more specific
Rename this ID to SANDBOX_PCI_SWAP_CASE_EMUL_ID since it is more
descriptive and allows us to add new PCI emulators without any conflict or
confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Tom Rini
8c56ea5c1e Merge branch 'u-boot-stm32_20190827' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fixes and update related to STM32MP1 platforms
2019-08-27 13:19:47 -04:00
Patrick Delaunay
1323470b74 misc: change RCC form MISC to NOP uclass
The RCC driver have no operation so the new NOP uclass
is more appropriate. It only used as parent for clock and reset driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
234a60244c pmu: stpmic1: change specific NVM api to MISC
Use MISC u-class to export the NVM register (starting at 0xF8 offset)
and avoid specific API.
- SHADOW have offset < 0.
- NVM have register > 0

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
0c8620d2ff bsec: update after MISC u-class update
Since the commit 8729b1ae2c ("misc: Update read() and
write() methods to return bytes xfered"); The misc bsec driver
need to be adapted to reflect the number of transferred bytes.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Baruch Siach
5ae84860b0 misc: i2c_eeprom: verify that the chip is functional at probe()
Read a single byte from EEPROM to verify that it is actually there.

This is equivalent to Linux kernel commit 00f0ea70d2b8 ("eeprom: at24:
check if the chip is functional in probe()").

Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>

hs: fixed style check prefer kernel type 'u8' over 'uint8_t'
2019-08-27 06:26:49 +02:00
Adam Ford
a074667d52 Kconfig: Varios: Fix more SPL, TPL dependencies
Several options are presenting themselves on a various boards
where the options are clearly not used.  (ie, SPL/TPL options
when SPL or TPL are not defined)

This patch is not attempting to be a complete list of items, but
more like low hanging fruit.  In some instances, I wasn't sure
of DM was required, so I simply made them SPL or TPL.

This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-26 11:46:29 -04:00
Simon Glass
7b51b576d6 env: Move env_get() to env.h
Move env_get() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Peng Fan
7752a0fef7 misc: imx8: add sc_misc_get_temp
Add sc_misc_get_temp to support get temperature

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-19 15:16:54 +02:00
Tom Rini
a9a3a37f92 - syscon: add support for power off
- stm32mp1: add op-tee config
 - stm32mp1: add specific commands: stboard and stm32key
 - add stm32 mailbox driver
 - solve many stm32 warnings when building with W=1
 - update stm32 gpio driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdKK2iAAoJEOKyvdngqpN1TvcH/jj1ujNdRKn994R3DqULzFtc
 Y0WGjAciTUuV0d9gZLxPZJwlWfqxLgbmUEBlPJQJe79gaM7kNN0PgAe6GNedFhGk
 UhRR7GgbA7wogorpRo8aLe3XYEqHtgPFkf1nSiNz/AHLBg8SB20VhWcY90Kha9lh
 IJ0GK+lSdCxiyaLBC2nswnI2PS/fl4NfC7KWvujtKZduIDIOHqh5q+39llpejyuw
 WOzL/bEa4ald6JKpxOii2KXNwD1gUDQGmPzADYcIdwzJtx9hft7DBSLC5Nr+ndBz
 72TjpbtfJ/qIurv8HeXYs9mtwnCO3WP+015fog0T0zjZ48BrT1A8C96ezwLOfz0=
 =W3ny
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20190712' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- syscon: add support for power off
- stm32mp1: add op-tee config
- stm32mp1: add specific commands: stboard and stm32key
- add stm32 mailbox driver
- solve many stm32 warnings when building with W=1
- update stm32 gpio driver
2019-07-14 09:09:49 -04:00
Patrick Delaunay
be56ab1b8f misc: stm32_fuse: Fix warnings when compiling with W=1
This patch solves the following warnings:

warning: no previous prototype for 'fuse_read' [-Wmissing-prototypes]
 int fuse_read(u32 bank, u32 word, u32 *val)
     ^~~~~~~~~
  CC      cmd/sf.o
warning: no previous prototype for 'fuse_prog' [-Wmissing-prototypes]
 int fuse_prog(u32 bank, u32 word, u32 val)
     ^~~~~~~~~
warning: no previous prototype for 'fuse_sense' [-Wmissing-prototypes]
 int fuse_sense(u32 bank, u32 word, u32 *val)
     ^~~~~~~~~~
warning: no previous prototype for 'fuse_override' [-Wmissing-prototypes]
 int fuse_override(u32 bank, u32 word, u32 val)
     ^~~~~~~~~~~~~

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:56 +02:00
Alex Marginean
21ebbafde8 test: dm: Add a test for PCI Enhanced Allocation
This test is built on top of the existing swap_case driver.  It adds EA
capability structure support to swap_case and uses that to map BARs.
BAR1 works as it used to, swapping upper/lower case.  BARs 2,4 map to a
couple of magic values.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Marcel Ziswiler
74c0f5cd7c imx8: fuse: fix fuse driver
This fixes the i.MX 8 fuse driver to actually build for i.MX 8QM as
well.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11 10:42:48 +02:00
Simon Glass
aaba703fd0 spl: misc: Allow misc drivers in SPL and TPL
In some cases it is necessary to read the keyboard in early phases of
U-Boot. The cros_ec keyboard is kept in the misc directory. Update the
config to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-05-21 17:33:23 -06:00
Mario Six
935a89241c gdsys_rxaui_ctrl: Use new regmap interface
For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:34 +02:00
Mario Six
ca0eab2dcf gdsys_rxaui_ctrl: Return old state
Make the gdsys_rxaui_ctrl polarity setting function return the old
state to comply with the API requirements.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:34 +02:00
Simon Glass
16f4d05164 cros_ec: Use a hyphen in the uclass name
Device-tree rules require that aliases use a hyphen rather than a
underscore. Update the uclass name to fit with this.

This allows device-tree aliases to be used to refer to cros-ec devices,
for example:

	aliases {
	    cros-ec0 = &ec;
	    cros-ec1 = &pd;
	};

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Ye Li
b3cf86c86b mxc_ocotp: Disable fuse sense for imx8mq B1
On iMX8MQ Rev B1, reading from fuse box is not allowed. The
OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa
for chip rev. So u-boot has to disable the fuse sense function for it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 19:16:24 +02:00
Ye Li
112ad60058 mxc_ocotp: Update redundancy banks for mx7ulp B0
On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to
Redundancy mode not ECC, so they can support to program different bits of
a word in multiple times.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 19:16:24 +02:00
Peng Fan
894e02b7b0 misc: imx8: scu: add i.MX8QM support
According to IMX8QXP/8QM config option, choose the clk/iomuxc
compatible.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Peng Fan
90c98a5ad0 imx8: fuse: add fuse driver
Add fuse write for i.MX8

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 09:03:15 +02:00
Tien Fong Chee
c1ef736e3d misc: fs_loader: Replace label with DT phandle
In previously label which will be expanded to the node's full path was
used, and now replacing label with most commonly used DT phandle. The
codes were changed accordingly to the use of DT phandle and supporting
multiple instances.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-04-22 18:13:22 -04:00
Tien Fong Chee
db32a446f9 misc: fs_loader: Add support for initializing block device
Firmware loader would encounter problem if the block device is accessed
before initializing it. This patch would adding the support of probing
block device and initializing block before the block device is accessed by
firmware loader.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-22 18:12:58 -04:00
Marcel Ziswiler
0a6f625d65 configs: move CONFIG_MXC_OCOTP to Kconfig
While commit 3e020f03e9 ("driver: misc: add MXC_OCOTP Kconfig entry")
introduced a Kconfig entry it did not actually migrate all
configurations to using it.

As CONFIG_MXC_OCOTP was in mx{6/7}_common.h enable it by default on
those architectures. Additionally, also enable it on ARCH_IMX8M and
ARCH_VF610 where all current members enabled it through their legacy
configuration header files.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-13 20:30:09 +02:00
Tom Rini
015289580f stm32 patches for v2019.07-rc1
- Add trusted boot with TF-A for stm32mp1
 - stm32mp1 dts files sync'ed with Linux version
 - add STM32MP1 Discovery boards (DK1 and DK2)
 - add STMFX gpio expander driver
 - misc improvement for stm3mp1 supports
 - rename stpmu1 to stpmic1 (official name)
 - stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu)
 - add STM32 FMC2 NAND flash controller driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJcsLHKAAoJEOKyvdngqpN1iwsH/3HtFxWsIcmT8TfHgIi2USKx
 /Rpj5Mdl0Q0584LAxZXkR2m9YvzBU6n2tR/n9wQfRyiazoEps1LXMmYcZVy35mQg
 AjTNV7xWfC1EZFP0+Gvn5PFquMPoZoIeqbDy1Jk91Qr4CHIqqS64DBwlTmQfjLzf
 6vfoyBcheL5Rf/AGM5AaHMjwh1GZs89cBCeVjGVMUAPgbfFUAKBWwi2fqdgEbDD7
 b9owLl2IykLTHOhvfnZi5NeRoA39deuNB0vSfU4WcMcONhekFCfOPi3Hch5aM/os
 xXlAXkTqps8rVfYHvUUmHm/wJhk+HH69wMThAWNFev/3g94MWR5zen5rjIOBVGg=
 =9M63
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot

stm32 patches for v2019.07-rc1
- Add trusted boot with TF-A for stm32mp1
- stm32mp1 dts files sync'ed with Linux version
- add STM32MP1 Discovery boards (DK1 and DK2)
- add STMFX gpio expander driver
- misc improvement for stm3mp1 supports
- rename stpmu1 to stpmic1 (official name)
- stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu)
- add STM32 FMC2 NAND flash controller driver
2019-04-12 15:43:19 -04:00
Patrick Delaunay
31e45a1a9e stpmic1: add NVM update support in fuse command
Add functions to read/update the non volatile memory of STPMIC1
(8 bytes-register at 0xF8 address) and allow access
with fuse command (bank=1, word > 0xF8).

For example:

STM32MP> fuse read 1 0xf8 8
Reading bank 1:

Word 0x000000f8: 000000ee 00000092 000000c0 00000002
Word 0x000000fc: 000000f2 00000080 00000002 00000033

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12 16:09:13 +02:00
Baruch Siach
84c80c63d5 misc: i2c_eeprom: add eeprom write support
Write up to page size in each i2c transfer.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-11 15:21:33 +02:00
Baruch Siach
a29034d1e6 misc: i2c_eeprom: support DT pagesize property
Read the page size from DT when available.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-11 15:21:33 +02:00
Michal Simek
027b1134b2 xilinx: common: Remove !DM_i2C code for reading mac from eeprom
All platforms are converted to DM_I2C that's why there is no reason to
keep this code here.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-14 14:31:10 +01:00
Simon Glass
e5d611671d misc: Allow child devices
Allow misc devices to have children, so that we can use this uclass for
cases where a child device (e.g. I2S) needs to access a misc driver for
transferring data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-02-09 12:50:22 -07:00
Tom Rini
748ad078ee For 2019.04
-----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlxQnKQPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3Mm8L/0P99AB62Pu0NbAaVI9PnqaeR9/kUIvHlaPT
 RMuUIz931/1GDnugGsEEquSMUt69lfBCKYbF4sKiWObytHfYKvB/u638gqG2IoEt
 KcnWU5dagaTOyoyPOtr8EyKxThJtG2j1uN+fA5BCZ6A6CLnEW0biJXYLwN5P/DIE
 bsn9R+XfOV/ppaFh3p65SZfzzwKh6eUQLHqEphBbbAHCPz74QSeZMHkumbKplGOk
 1cjuFi8bekFnPGDDPW8jRvUNlhRD0kTjXoBj1eF2Q1g8lUj6La8yOsq1DAeGJjd1
 ywUDi8GPNYQ7HuHNzfZETWAYspNflARnPQwMemmNSKmmu6CO8aB6lt3JZWEUrnjL
 1D8LzMrRpyq1jEA0a57qsvTc8i3KA7X3FHTszP0flhiLKgBgE+5t1w8dc0wxC7HZ
 eF9TE3tGAmVzRVZwBh8HIDuKhe+y3uGKtvxl80DF8vQQWrXHq0GSC+pmdEXk7DGU
 OGYvdvVoThglZwM4vqeKlT/+1KLPCQ==
 =dOOt
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20190129' of git://git.denx.de/u-boot-imx

For 2019.04
2019-01-30 07:22:12 -05:00
Peng Fan
04b249656e imx8: scu: use dedicated MU for SPL
SPL runs in EL3 mode, except MU0_A, others are not powered on,
and could not be used. However normal U-Boot use MU1_A, so we
could not reuse the one in dts. And we could not replace the one
in dts with MU0_A, because MU0_A is reserved in secure world.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Michal Simek
e38cef9f6e misc: i2c_eeprom: Add atmel,24c08 to the list
Linux kernel binding is using atmel,24c08 compatible string. On the
other hand there is atmel,24c08a which is not listed in the kernel.
Add compatible string without "a" suffix to be compatible with Linux
kernel binding.

These eeproms are available on several ZynqMP development boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-26 08:13:57 -05:00
Tom Rini
77c07e7ed3 Add TFA boot flow for more boards
Add TFA boot defconfig for ls1088a and ls2088a.
 Add dts fixup for PCIe endpoint and root complex.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEorkTmaQ1QAtDiYw67UVZlNoLnbQFAlxCFVMACgkQ7UVZlNoL
 nbQJaA/9GQ+FpUj8AzsWmLd1JYMdjQeoltlYSicqV1oPkzjX3BsPncAYsr6cW2rm
 SMkriCw+xrlTgC8ge1dyzKxWqMovGzUFEGxpDJqIKCc16s8A/Ro+R0y8saNq1Y89
 MI2axPoaPDT4ZRCSWMzzFVv3lfdvFgGyygZljNlmiKqWp1//fE0OJD4ggE8SqgVo
 +5cMmufuhQhuFuFulQw6YwAOdrJ0eN8wb1SB9wJ8zwdwKn6Oy4CgkRGjJEjKRNoK
 Posw8FUPxQybXmsXW2vie9oomQqmI2A1ILzl1KvdRHSbW0N6P7MbAgsGH1vDPW0u
 dDAsutmkjYR7Ihq/4/5jcTdjkPd7LRJU/SSJzRSnZSD1uLDt5Z4jerQBq0BN9nMR
 peUS/nQ5LTT+rGBRevFT1I0hGNVHhArKGpumV8VRxlq7a30lUPSKhd3jOsadqVLU
 TchCZPjFIVaTrlz9NoX0Wa8bz+m5v1MygRiPkxERc8ft3cudn3rI83neeK1WVKSy
 uwSttQ+Q2uPXBvPq80fIKNToxkEBihPCbEHXZUUs3iE3r+jnRLAZ8CelAn1qK7n6
 fw1oduqOqupPVtYaLHZa6fAWj7lX0FCSge7z4oYu4ezCtoCutzUb6rgwHCpSLEA0
 OF/3fzb+Gn68GpcP23P0pPx+0UplEcmOT+f2/fUXgarUyxd5H/Y=
 =vNy2
 -----END PGP SIGNATURE-----

Merge tag 'fsl-qoriq-for-v2019.04-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for more boards

Add TFA boot defconfig for ls1088a and ls2088a.
Add dts fixup for PCIe endpoint and root complex.
2019-01-18 23:11:51 -05:00
Rajesh Bhagat
bf0f791087 drivers: ifc: restore the legacy flow for IFC config
Restore the legacy flow along with TFABOOT flow for
IFC configuration.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:15:53 -08:00
Tien Fong Chee
31a2cf1ca4 misc: fs_loader: Switching private data allocation to DM auto allocation
Switching private data manual allocation to driver model auto allocation
so users no longer need to deallocate themself because this would be
deallocated by driver model when the device is no longer required.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-15 15:28:54 -05:00
Peng Fan
026381fc5a misc: imx8: scu: use platdata instead of priv data
priv data has not been allocated when doing bind, so it is
wrong to use dev_get_priv in bind call back.

Let's switch to use platdata in the driver to fix the issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-09 17:04:03 +01:00
Peng Fan
ecab65e4cd misc: imx: scu: avoid write null pointer
When boot_dev is true, fill boot device. However the original logic is when
boot_dev is false, fill boot device, this will trigger data abort.

Also fix sc_misc_get_control when using pointer val.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-09 17:03:45 +01:00
Tom Rini
522e035441 imx for 2019.01
- introduce support for i.MX8M
 - fix size limit for Vhybrid / pico boards
 - several board fixes
 - w1 driver for MX2x / MX5x
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlwrbc8PHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3oCwL/RCqesqQaLKkUQDiYQJzoa6Ia7TeSTD1HoHl
 lYXarE9FloD7lHp4Lz1elU8Y+yTtjvixKS9UJGRc0pMcJJ/CEavjK+oBOVNbEnvH
 vm/oXQfZqj60tLc2Z7RfRe1gHHCcaGiBXJePea5WhP89cUZW1YBs4TVY2AIEQeRV
 V8vcxbBprqqBWyFRgH+ORsWrmkfcYEfiMr97Y8v07RRPX/C80e98PTc16fh9o7S1
 +i8Pcs0SIMnA8PqXVgrpa4DT7OS/ZtLADG/ODpvJ25nHoKvdhlXMc8o8L5dyaO1f
 66UD0A8D3PXkXkFodZujSjtKl5ygeA/4YkEnY6PRqd2W6kZsq6R7XCu/3e3eQSwK
 GFnWQnzLkDOCKMZlxR8l3sJdhY3Ee3oAQ+EX3PEy1MvKKrGA8PSOIKHq3tVNrPYB
 tBnJP32G+2Ya0SG169ROoUMZQQXfTt+9kdqsxx5xL2Pfpt9d+YinCM8uQdhqBGPa
 COqegLaD0ZkADsodZp876u3Irbo6bw==
 =mEcH
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx

imx for 2019.01

- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
2019-01-01 10:01:00 -05:00
Peng Fan
cd357ad112 imx: rename mx8m,MX8M to imx8m,IMX8M
Rename mx8m,MX8M to imx8m,IMX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
2019-01-01 14:12:18 +01:00
Paul Burton
b5392c50bd misc: Add JZ47xx efuse driver
Add driver for the efuse block in the JZ47xx SOC.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19 15:23:01 +01:00
Tom Rini
d94604d558 Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEorkTmaQ1QAtDiYw67UVZlNoLnbQFAlwOzFoACgkQ7UVZlNoL
 nbQUdQ//SRRBfjUe8RYTbojvTGQav0GTxnMkz4GFSrqu0nvGMW2YSlheOMqq72sg
 rK5mQqDvdkItCn+G8AZ5NV2ijkQ7NQWCfqL3EtApzTpv6qjfgv7xvopz8q4NZvzB
 Wp+4cFf9YQjNwhJ7kLvWHB7SBiz9AfMYRAj9cscH9xsGL3HxPj62WDfwyK/QXana
 KIxRKQ26/1AdOZy272yv70vlFj4IwForxV3ACimsWRuYcb8yre3pE0tD7XpMCSNv
 9GOfL7r4LS7U0+QnJoVeYLMhttRvOGJNUYtO2+ImO5NC3u9v8ehYEQ3FjGmM69CB
 vuPDQBDQc+Ap+Iu3k18PYSstp+mc9fbe9SQdlx6ARAecQqWTN4EOhf8s3m2bQq3S
 B58I0Zvowcdm8V2JKdXw94UqZX862U8PWH0BmcuX+4k+kRDwwU4XQY2nLp+Htz1w
 2q6vEdKGj7YUOaomx9fmKRL+9BFGoD+M9mTiHOwzqwxy6Pa9VkruSvMErM7p2l/z
 xI/Q+xPJhyk5TXgZRsz4Nat59WpifWruibKEd4PArQ446heHWmzLWjw/MWiFyd/H
 agCdpDZVJ8R7h1Krs+Ez8XjR1Qcg0gs+CdNBuvqxzOpMQGGonXA1nwi8YfHykhII
 urfoC8pew1yxiLGw7J2JSX808HV/09WCSEsrOOhE3T78rXTDlS4=
 =aT7d
 -----END PGP SIGNATURE-----

Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC

[trini: Add a bunch of missing MAINTAINERS entries]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-10 17:19:59 -05:00
Pankit Garg
9bd5fe7027 drivers: ifc: dynamic chipselect mapping support
IFC driver changes to implement the chipselect mappings at run time.

Defines init_early_memctl_regs and init_final_memctl_regs with
chipselect dynamic mapping for nor and nand boot.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Simon Glass
eafb4a59db cros_ec: Adjust to use v1 vboot context only
At present there are no users of the 64-byte v2 context. The v1 context is
only 16 bytes long and currently an error is raised if too much data is
returned from the EC.

Update the code to limit the size to 16 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
a749c09a1e cros: Correct a printf() string and comment
Correct a warning that occurs on sandbox. Also fix the comment style in
cros_ec_set_lid_shutdown_mask().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
8729b1ae2c misc: Update read() and write() methods to return bytes xfered
At present these functions return 0 on success. For some devices we want
to know how many bytes were transferred. It seems useful to adjust the API
to be more like the POSIX read() and write() functions.

Update these two methods, a test and all users.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-20 19:14:22 -07:00
Simon Glass
72ef8bfd6d cros_ec: Add new features for events and power
This adds new commands to the EC related to setting and clearing events
as well as controlling power-related settings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
4bf6f2ad47 cros_ec: Align uclass data to a cache boundary
The LPC driver expects its buffer to be word-aligned. Add the required
flag to the uclass driver to ensure this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
dc05ac0f2f cros_ec: Fail if we cannot determine the flash burst size
This value is required for flashing to work correctly. Add a check for
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
ac80652342 cros_ec: Add error logging on a few commands
Add some more logging to provide more information on failures.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
9fea76f5d3 cros_ec: Use uint instead of u8 for parameters
There is no advantage to using a u8 for function parameters. It forces
the compiler to mask values and can increase code size. Also the command
enum has been extended to 16 bits. Update the functions to use uint
instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Keerthy
907837d659 misc: fs_loader: Fix compiler warning
Fix compiler warning

drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects
argument of type ‘int’, but argument 5 has type ‘size_t
{aka long unsigned int}’ [-Wformat=]

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:52:01 -05:00
Keerthy
7c096ea4ee misc: fs_loader: Use device_get_global_by_ofnode to get to node
Instead of two staged ofnode_to_offset followed by
device_get_global_by_of_offset approach, direcly use the
device_get_global_by_ofnode to fetch the device.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16 16:52:00 -05:00
Bin Meng
7a20614eb2 test: dm: pci: Add cases for finding next PCI capability APIs
Add test cases to cover the two newly added PCI APIs:
dm_pci_find_next_capability() & dm_pci_find_next_ext_capability().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:28 -08:00
Mario Six
ab88bd2b6a misc: Add IHS FPGA driver
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-11-14 09:16:27 -08:00
Mario Six
c0a2b086b2 misc: Add gdsys_soc driver
This patch adds a driver for the bus associated with a IHS FPGA.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-11-14 09:16:27 -08:00
Mario Six
313d4cc3e9 misc: Sort Makefile entries
Makefile entries should be sorted.

Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-11-14 09:16:27 -08:00
Bin Meng
8d773c4ab3 dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()
Currently the comments of several APIs (eg: dm_init_and_scan()) say:

@pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
flag. If false bind all drivers.

The 'Pre-Relocation Support' chapter in doc/driver-model/README.txt
documents the same that both device tree properties and driver flag
are supported.

However the implementation only checks these special device tree
properties without checking the driver flag at all. This updates
lists_bind_fdt() to consider both scenarios.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in http://patchwork.ozlabs.org/patch/996473/ :
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:27 -08:00
Patrick Delaunay
22929e1266 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Complete in the drivers directory the work started with
commit 83d290c56f ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-28 09:26:39 -04:00
Tom Rini
cf033e04da Merged imx8 architecture, fix build for imx8 + warnings
-----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlvRk0gPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3IuAL/0jfCqEIzKbPXIz81zJ+43ZNPsyu4LluUFsP
 2s5+yKN4zPnxDaHmVyxKynREqCNCcbfz7biStEPRzIjQYPBWUWrqz1yceqvOTqWQ
 eh51ItNeow28IlnVEr40e5cNL28KPsAdO8Tx6yNiXdPndPOgm3DuFlT+Xbnv2/+P
 X9GYBoCD7EQ3aUJBDUKcN/AFSAl8YCQ43FKhowM18/ExeURiKk8YDRXVFgTDDd4J
 HIlzUbyeIG24xfmxc0MsUMEufMjqQE7k/tMfFvQJiwLBLkzuO+1WmbPlWd7XHqco
 t68mheBcm8m2G/CZJoxCy8ymUi5PKDJBhw3qQz646h+JiXP1lg7Yw8hf4nREV56k
 v/bMiDU1exIflI9Qf8CibxRAYv3bjKJD6p/uua2CIvsLO4emLPbi7DHFBdaQq+WB
 r32O0Xc6LiRBIhr/qeL/5HmxFT2o4lo+O9ybo10uhK8RA1LTPlQ0UNMwmSPLl4zR
 7e5YwnRCcHV492+/Fn31LWXUUVVxVw==
 =kkpS
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx

Merged imx8 architecture, fix build for imx8 + warnings
2018-10-25 10:16:21 -04:00
Peng Fan
ad9d40acb4 misc: imx8: add scfw api impementation
Add clk/misc/pad/pm/rm scfw api implementaion for different
drivers to invoke. The low level code is using misc_call
to invoke imx8_scu driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Peng Fan
ef64e782ec misc: add i.MX8 misc driver
Add i.MX8 MISC driver to handle the communication between
A35 Core and SCU.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Simon Glass
d07b6e145e cros_ec: Add support for v3 messages on LPC
At present version 3 messages are only supported on SPI. Add support for
using LPC as well, as used on samus.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
a12ef7e26a cros_ec: Update cros_ec_read_hash() to specify the image
Allow selection of which EC image to hash.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
6f1c0430e8 cros: Update ec_commands to latest version
This file has changed quite a bit in the last 5 years as the capabilities
of the ECs have grown. Sync it up with the copy in coreboot commit
b9141f2215.

The only change is the addition of EC_VBNV_BLOCK_SIZE_V2. This is needed
because U-Boot uses the new v2 vboot API and this is not currently fully
supported by Chromium OS firmware.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
6322a7b63f cros: Update cros_ec code to use struct udevice
At present we pass around a private pointer to specify the cros_ec device.
With driver model it makes more sense to pass the device. Update the code
to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
e6c5c94a79 dm: core: Update ofnode to read binman-style flash entry
At present ofnode_read_fmap_entry() reads a flash map entry in a format
which is not supported by binman. To allow use to use binman-format
descriptions, update this function.

Also add a simple test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Liviu Dudau
0fabfeb2c7 misc: Add support for the Arm Versatile Express config bus
Add support for the Arm Versatile Express config bus that is
being used for exposing various subsystems via a generic
configuration bus. This driver adds support for generating
transactions on this configuration bus and can be used by
other drivers to abstract the communication with the actual
function providers.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-10-06 09:04:18 -04:00
Tom Rini
27f622d568 Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
 Switch to driver model for SATA on LS1021A and LS1043A.
 Add support for LS1012AFRWY rev C board.
 Enable SMMU for LS1043A.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJbrkHRAAoJEO1FWZTaC520r3UQAIBntTglI1QK7YizVxZ1x9DL
 42oSEIwkuN0wbndR7Jzx4EPPFJ8yX4v3stoxC3qS5DQ9kHMzuqRQcIDYbcn5Qy7Z
 vd0mBUmpkRjr988pSaSHVQ8kPasncb545fCUumrXrCmhuG5Ea2Itw1zLdsTf7X5n
 39KxFUOAR63BDCT0ZlR4VyMo01GxxHWCzRQH/rOWVzOcJsWF7R52hWIBBzVDxKPv
 HF9SYaAB0PTFgSjJx5wYQ4xPdHVUp+svtYSJE8JYzEr/BvOVtL2iEi4t2rk19CrX
 IaVMFydlv2iDgWdoSZFCCN/6lGDWSv1LWPDglWhLQhOYvrJOjZfgzzeAGU7wqoz4
 JVjSLf6dHeOma55dbP/epDmyDFqWIfNOQ3uP4RM57xJ0PXQuT7ACVJctr6kHVTGL
 1ZZxPdKSSf9lvtzoogPTTYRD5Ry7ud3sYZ0v3OHN1sbVcaHaVoHPeXeSz1sLg3Q+
 zhUo1lXx4FcTz9R1fafdcqqAk/YGMZ7sBE+uYJPgExnApxrZID9IiOdGIBxo8jiK
 ozLmaCIDqRyu/qhQW9WMri1tvYdKwq/739gBvvcIcrLR5RzfNUdwWjhtBokPQQnS
 WZNqd3/0N8ZFGz7V0GOxCDnAo4nwQeZVFGMtTpoCtjPvr6DWBHsEUlQHTT3dQKz/
 TXygMYUYGA+/vux0Dt4I
 =XRFI
 -----END PGP SIGNATURE-----

Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
2018-09-29 11:47:32 -04:00
Tien Fong Chee
620300043c common: Generic loader for file system
This is file system generic loader which can be used to load
the file image from the storage into target such as memory.
The consumer driver would then use this loader to program whatever,
ie. the FPGA device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-09-28 20:22:33 -04:00
Laurentiu Tudor
0c2255b5c7 armv8: ls1043a: enable icid setup for qman portals
Enable support for ICID setup of qman portals and the required device
tree fixups.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:33 -07:00
Mario Six
d2166319df misc: Add MPC83xx serdes driver
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Adam Ford
cc3fedb204 Convert CONFIG_TWL4030_LED et al to Kconfig
This converts the following to Kconfig:
   CONFIG_TWL4030_LED
   CONFIG_TWL4030_INPUT

This also removes dead references to:
   CONFIG_TWL4030_KEYPAD

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17 13:04:00 -04:00
Tom Rini
b8a1f47be3 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-08-13 12:34:55 -04:00
Mario Six
7e86242b2b misc: Add gdsys_ioep driver
Add driver for the IHS IO endpoint on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 16:00:50 +02:00
Mario Six
004e67c216 test: Add tests for misc uclass
Add a set of tests for the misc uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-11 16:00:38 +02:00
Mario Six
440bc11f2e misc: uclass: Add enable/disable function
Add generic enable/disable function to the misc uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11 16:00:19 +02:00
Laurentiu Tudor
599a97d49c armv8: ls1046a: add icid setup for qman portals
Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:36 -07:00
Laurentiu Tudor
92d2e89c8c misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10 10:35:22 -07:00
Bin Meng
95e11069b5 test: dm: pci: Add cases for finding PCI capability APIs
Add several PCI capability and extended capability ID registers
in the swap_case driver, so that we can add test case for
dm_pci_find_capability() and dm_pci_find_ext_capability().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
59a160e8b9 pci: sandbox: swap_case: Declare dynamic driver matching
This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Bin Meng
76330ae67d pci: sandbox: swap_case: Preserve space indicator bit in BAR registers
With the newly added testing of more than one device, we get:

  => ut dm pci_swapcase
  Test: dm_test_pci_swapcase: pci.c
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Test: dm_test_pci_swapcase: pci.c (flat tree)
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Failures: 2

The failure only happens on the 2nd swap_case device on the PCI bus.
The case passes on the 1st device.

It turns out the swap_case driver does not emulate bit#0 in BAR
registers as a read-only bit. This corrects the implementation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08 12:49:31 +01:00
Patrick Delaunay
d090cbab64 misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.

We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-20 15:55:05 -04:00
Simon Glass
5e0a7341cd dm: core: Update of_read_fmap_entry() for livetree
Update this function to take an ofnode so that it can work with livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Simon Glass
fe996ec066 sandbox: swap_case: Increase number of base address regs
At present the code overruns the bar[] array. Fix this.

At the same time, drop the leading / from the "/spl" path so that we can
run U-Boot SPL with:

   spl/u-boot-spl

rather than requiring:

   /path/to/spl/u-boot-spl

Reported-by: Coverity (CID: 131199)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-06-19 07:31:44 -04:00
Patrice Chotard
6b6255cd8a mach-stm32: Enable SPL_RESET_SUPPORT flag
Since commit 0e373c0ade ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.

This allows to remove a specific case in RCC mfd driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-06-05 20:19:09 -04:00
Patrick Delaunay
c3600e1f92 stm32mp1: add FUSE command support
Add support of fuse command (read/write/program/sense)
on bank 0 to access to BSEC SAFMEM (4096 OTP bits).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Mario Six
86da8c12ef gdsys: drivers: Add gdsys_rxaui_ctrl driver
Add a driver for RXAUI control on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 18:50:23 -04:00
Patrice Chotard
8b41464547 clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
On all STM32F4 and F7 SoCs  family (except STM32F429), PLLSAI
output P can be used as 48MHz clock source for USB and SDMMC.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested By: Bruno Herrera <bruherrera@gmail.com>
2018-05-08 09:07:34 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Vipul Kumar
5c32de202b i2c: Added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
This patch added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Peng Fan
8a099b6860 misc: ocotp: add i.MX8M support
i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Bin Meng
2d1c661915 x86: qemu: qfw: Implement acpi_get_rsdp_addr()
U-Boot on QEMU does not build ACPI table by ourself, instead it uses
the prebuilt ACPI table via the qfw interface. This implements the
qfw version of acpi_get_rsdp_addr() for setup_zimage().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-01-30 22:34:37 +08:00
Peng Fan
8df42bee0e misc: mxc_ocotp: check fuse word before programming on i.MX7ULP
On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to
write once, because they use ECC mode. Multiple writes may damage
the ECC value and cause a wrong fuse value decoded when reading.
This patch adds a checking before the fuse word programming, only
can write when the word value is 0.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Ahmed Mansour
44262327aa drivers/misc: Share qbman init between archs
This patch adds changes necessary to move functionality present in
PowerPC folders with ARM architectures that have DPAA1 QBMan hardware

- Create new board/freescale/common/fsl_portals.c to house shared
  device tree fixups for DPAA1 devices with ARM and PowerPC cores
- Add new header file to top includes directory to allow files in
  both architectures to grab the function prototypes
- Port inhibit_portals() from PowerPC to ARM. This function is used in
  setup to disable interrupts on all QMan and BMan portals. It is
  needed because the interrupts are enabled by default for all portals
  including unused/uninitialised portals. When the kernel attempts to
  go to deep sleep the unused portals prevent it from doing so

Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:28:47 -08:00
Patrice Chotard
928954fe58 dm: misc: bind STM32F4/F7 clock from rcc MFD driver
Like STM32H7, now STM32F4/F7 clock drivers are binded by
MFD stm32_rcc driver.
This also allows to add reset support to STM32F4/F7 SoCs family.
As Reset driver is not part of SPL supported drivers, don't bind it
in case of SPL to avoid that stm32_rcc_bind() returns an error.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-11-29 22:30:50 -05:00
Patrice Chotard
3bc599c956 stm32: fix STMicroelectronics copyright
Uniformize STMicroelectronics copyrights headers for STM32
related code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06 09:51:01 -05:00
Masahiro Yamada
9b643e312d treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 11:59:44 -04:00
Christophe Kerello
4e280b91a1 dm: misc: add stm32 rcc driver
This patch adds the support of reset and clock control
block (rcc) found on STM32 SoCs.
This driver is similar to a MFD linux driver.

This driver supports currently STM32H7 only.
STM32F4 and STM32F7 will be migrated to this rcc MFD driver
in the future to uniformize all STM32 SoCs already upstreamed.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:40:02 -04:00
Philipp Tomsich
f6230a0057 rockchip: efuse: change to use dev_read_addr_ptr
With the dev_read_addr_ptr function available, we can change the
efuse driver to use it (and eliminate the explicit type-cast).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:37 +02:00
Wenyou Yang
de6567522e misc: i2c_eeprom: Add compatible for AT24MAC402
Add the new compatible "atmel,24mac402" to accommodate AT24MAC402.
The AT24MAC402 is a 2K Serial EEPROM and the 2-Kbit memory array
is internally organized as 16 pages of 16 bytes of EEPROM each.
The 48-bit EUI address in the AT24MAC402 are located in the extended
memory block.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-09-12 17:58:54 -04:00
Wenyou Yang
7264066707 misc: i2c_eeprom: Add compatible for 24AA02E48
Add the new compatible "microchip,24aa02e48" to accommodate 24AA02E48,
the 24AA02E48 is a 2K I2C Serial EEPROM with pre-programmed globally
unique, 48-bit node address, and 8-byte page size.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-09-12 17:58:53 -04:00
Tom Rini
de2ad2c40d Merge git://git.denx.de/u-boot-dm 2017-09-12 09:32:51 -04:00
Simon Glass
3991f42ed2 dm: core: Add ofnode_for_each_subnode()
Add a convenience macro to iterate over subnodes of a node. Make use of
this where appropriate in the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-09-11 21:43:58 -06:00
Wenyou Yang
d81a1de96e misc: Kconfig: Add SPL_I2C_EEPROM option
This option is an SPL-variant of the I2C_EEPROM option to enable
the driver for generic I2C-attached EEPROMs for SPL.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-11 22:44:30 -04:00
Adam Ford
e3f24d4f2c Kconfig: Add EEPROM options to Kconfig when I2C_EEPROM is set
Add the following options to drivers/misc/Kconfig:
	SYS_I2C_EEPROM_ADDR
	SYS_I2C_EEPROM_BUS
	SYS_EEPROM_SIZE
	SYS_EEPROM_PAGE_WRITE_BITS
	SYS_EEPROM_PAGE_WRITE_DELAY_MS
	SYS_I2C_EEPROM_ADDR_LEN
	SYS_I2C_EEPROM_ADDR_OVERFLOW

This does not migrate any boards, but provides a foundations for
those who want/need these options

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Migrate uniphier]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-02 15:50:30 -04:00
Philipp Tomsich
928979cb2b rockchip: efuse: dm: change to use dev_read_addr
This changes the rockchip-efuse driver to use dev_read_addr instead of
devfdt_get_addr.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27 14:59:00 +02:00
Tom Rini
39632b4a01 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-07-18 08:42:48 -04:00
Stefano Babic
552a848e4f imx: reorganize IMX code as other SOCs
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic <sbabic@denx.de>

CC: Fabio Estevam <fabio.estevam@nxp.com>
CC: Akshay Bhat <akshaybhat@timesys.com>
CC: Ken Lin <Ken.Lin@advantech.com.tw>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Heiko Schocher <hs@denx.de>
CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Patrick Bruenn <p.bruenn@beckhoff.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Nikita Kiryanov <nikita@compulab.co.il>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: "Eric Bénard" <eric@eukrea.com>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Ye Li <ye.li@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Adrian Alonso <adrian.alonso@nxp.com>
CC: Alison Wang <b18965@freescale.com>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Martin Donnelly <martin.donnelly@ge.com>
CC: Marcin Niestroj <m.niestroj@grinn-global.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Adam Ford <aford173@gmail.com>
CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
CC: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Soeren Moch <smoch@web.de>
CC: Richard Hu <richard.hu@technexion.com>
CC: Wig Cheng <wig.cheng@technexion.com>
CC: Vanessa Maegima <vanessa.maegima@nxp.com>
CC: Max Krummenacher <max.krummenacher@toradex.com>
CC: Stefan Agner <stefan.agner@toradex.com>
CC: Markus Niebel <Markus.Niebel@tq-group.com>
CC: Breno Lima <breno.lima@nxp.com>
CC: Francesco Montefoschi <francesco.montefoschi@udoo.org>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Scott Wood <oss@buserror.net>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Simon Glass <sjg@chromium.org>
CC: "Andrew F. Davis" <afd@ti.com>
CC: "Łukasz Majewski" <l.majewski@samsung.com>
CC: Patrice Chotard <patrice.chotard@st.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Hans de Goede <hdegoede@redhat.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stephen Warren <swarren@nvidia.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: "Álvaro Fernández Rojas" <noltari@gmail.com>
CC: York Sun <york.sun@nxp.com>
CC: Xiaoliang Yang <xiaoliang.yang@nxp.com>
CC: Chen-Yu Tsai <wens@csie.org>
CC: George McCollister <george.mccollister@gmail.com>
CC: Sven Ebenfeld <sven.ebenfeld@gmail.com>
CC: Filip Brozovic <fbrozovic@gmail.com>
CC: Petr Kulhavy <brain@jikos.cz>
CC: Eric Nelson <eric@nelint.com>
CC: Bai Ping <ping.bai@nxp.com>
CC: Anson Huang <Anson.Huang@nxp.com>
CC: Sanchayan Maity <maitysanchayan@gmail.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Patrick Delaunay <patrick.delaunay@st.com>
CC: Gary Bisson <gary.bisson@boundarydevices.com>
CC: Alexander Graf <agraf@suse.de>
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12 10:17:44 +02:00
Marek Behún
aa5eb9a3ac drivers/misc: Add basic support for ATSHA204A Crypto module
This module can be found on the Turris Omnia board connected
via the I2C interface.

Among some cryptographic functions, the chip has a 512 bit
One Time Programmable memory, 88 byte configuration memory
and 512 byte general purpose memory.

The Turris Omnia stores serial number and device MAC address in
the OTP memory.

This commit adds basic support for reading the EEPROM and also
exposes the chips Random Number Generator.

The driver is based on code by
  Josh Datko, Cryptotronix, jbd@cryptotronix.com
and also
  Tomas Hlavacek, CZ.NIC, tomas.hlavacek@nic.cz

Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Signed-off-by: Marek Behun <marek.behun@nic.cz>

 create mode 100644 drivers/misc/atsha204a-i2c.c
 create mode 100644 include/atsha204a-i2c.h
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:38 +02:00
Masahiro Yamada
61e51babdb dm: ofnode: rename ofnode_read_prop() to ofnode_get_property()
This function returns the pointer to the value of a node property.
The current name ofnode_read_prop() is confusing.  Follow the naming
of_get_property() from Linux.

The return type (const u32 *) is wrong.  DT property values can be
strings as well as integers.  This is why of_get_property/fdt_getprop
returns an opaque pointer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-07-11 10:08:20 -06:00
Masahiro Yamada
5e75ea1506 i2c_eeprom: add static to i2c_eeprom_std_ops/probe
These are only used in drivers/mis/i2c_eeprom.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-06-26 07:12:47 +02:00
Heiko Schocher
064b55cfcb powerpc, 5xxx, 512x: remove support for mpc5xxx and mpc512x
There was for long time no activity in the mpx5xxx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in mpc5xxx,
so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-16 10:14:55 -04:00
Philipp Tomsich
49cd8e85eb rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block
This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.

Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).

The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.

Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
      include a SoC-name (together with a comment in the function) to
      remind whoever adds support for additional SoCs that this
      function currently makes assumptions regarding the size of the
      fuse-box based on the RK3399. The hope is that the function is
      adjusted to reflect any changes resulting from generalising the
      driver for multiple SoCs and is then renamed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:17 -06:00
Simon Glass
2dd57f5e47 dm: Update the I2C eeprom driver for livetree
Update this driver so that it works with livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:15 -06:00
Simon Glass
2ec9d171bc cros_ec: Convert to support live tree
Convert this driver to support the live device tree and remove the old
fdtdec support.

The keyboard is not yet converted.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:11 -06:00
Simon Glass
e907bf2dfb cros_ec: Fix debug() statement in ec_command_inptr()
This prints out the wrong pointers. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:11 -06:00
Simon Glass
45a26867e8 dm: core: Update device_bind_driver_to_node() to use ofnode
Adjust this function to us an ofnode instead of an offset, so it can be
used with livetree. This involves updating all callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:08 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00