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50402 commits

Author SHA1 Message Date
Paul Gortmaker
0452352df1 tsec: report when there is no vendor specific PHY support
Commit af1c2b84 added a generic phy support, with an ID of zero
and a 32 bit mask; meaning that it will match on any PHY ID.

The problem is that there is a test that checked if a matching
PHY was found, and if not, it printed the non-matching ID.
But since there will always be a match (on the generic PHY,
worst case), this test will never trip.

In the case of a misconfigured PHY address, or of a PHY that
isn't explicitly supported outside of the generic support,
you will never see the ID of 0xffffffff, or the ID of the
real (but unsupported) chip.  It will silently fall through
onto the generic support.

This change makes that test useful again, and ensures that
the selection of generic PHY support doesn't happen without
some sort of notice.  It also makes it explicitly clear that
the generic PHY must be last in the PHY table.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-03-09 18:08:04 -05:00
Wolfgang Denk
c279dfc101 SIMPC8313 board: fix out of tree building.
Fix typo in makefile which broke out of tree builds.

Also use expolicit "rm" instead of "ln -sf" which is known to be
unreliable.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-09 18:08:01 -05:00
ksi@koi8.net
49b5aff491 Add eTSEC 1/2 IO override control (corrected)
This adds tsec12ioovcr to include/asm-ppc/immap_85xx.h (was reserved.)

Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
2009-03-09 17:46:11 -05:00
Andy Fleming
48c2b7bb43 fsl: Remove unnecessary debug printfs
These were left in accidentally, and are not really useful unless the
code is as broken as it was when it was being developed.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-03-09 17:46:10 -05:00
Ed Swarthout
0ee84b88b7 Fix mpc85xx ddr-gen3 ddr_sdram_cfg.
Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2009-03-09 17:46:09 -05:00
Jean-Christophe PLAGNIOL-VILLARD
a922fdb87a PXA: timer use do_div and simplify it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-09 12:01:32 +01:00
Wolfgang Denk
4b00d1aa82 SIMPC8313 board: fix out of tree building.
Fix typo in makefile which broke out of tree builds.

Also use expolicit "rm" instead of "ln -sf" which is known to be
unreliable.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-03-09 10:51:39 +01:00
Wolfgang Denk
014c595f12 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Conflicts:
	lib_ppc/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-03-09 00:41:48 +01:00
Heiko Schocher
f70fd13e2f 8360, kmeter1: added bootcount feature.
add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU.

The bootcounter uses 8 bytes from the muram,
because no other memory was found on this
CPU for the bootcount feature. So we must
correct the muram size in DTS before booting
Linux.

This feature is actual only implemented for
MPC8360, because not all 83xx CPU have qe,
and therefore no muram, which this feature
uses.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:30 -06:00
Heiko Schocher
1e7ed25650 83xx, kmeter: QE_ENET10 errata for Silicon Revision 2.1
old code implemented the QE_ENET10 errata only for Silicon
Revision 2.0. New code reads now the Silicon Revision
register and sets dependend on the Silicon Revision the
values as advised in the QE_ENET10 errata.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:29 -06:00
Heiko Schocher
605f78e34a 83xx, kmeter1: updates for 2009.03
- HRCW update
  HRCWH_BOOTSEQ_DISABLE not HRCWH_BOOTSEQ_NORMAL
  HRCWH_LALE_EARLY added
- DDR-SDRAM settings modified. This solves sporadically
  problems with this memory.
- CS1 now 128 MB window size
- CS3 now 512 MB window size
- PRAM activated
- MTDPARTS_DEFAULT defined
- CONFIG_HOSTNAME added
- MONITOR_LEN now 384 KB

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:18 -06:00
Heiko Schocher
118cbe3c35 83xx, kmeter1: autodetect size of DDR II RAM
it is possible that some board variants have different DDR II
RAM sizes. So we autodetect the size of the assembled RAM.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:17 -06:00
Heiko Schocher
c1bce4fff7 83xx, i2c: add mux support for fsl_i2c
This patch adds I2C mux support for the fsl_i2c driver. This
allows you to add "new" i2c busses, which are reached over
i2c muxes. For more infos, please look in the README and
search for CONFIG_I2C_MUX.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:17 -06:00
Heiko Schocher
19f0e93041 83xx, kmeter1: add I2C, dtt, eeprom support
This patch adds I2C support for the Keymile kmeter1 board.
It uses the First I2C Controller from the CPU, for
accessing 4 temperature sensors, an eeprom with IVM data
and the booteeprom over a pca9547 mux.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:17 -06:00
Heiko Schocher
db1d72afd7 i2c, dtt: move dtt_init () to board_init_r ()
In case where a board not uses CONFIG_POST, it is not
necessary to init the DTTs when running from flash.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:06 -06:00
Dave Liu
5b0055547f 83xx: Fix some bugs in spd sdram code
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
  tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.

The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.

items 1, 2 and 5:
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>

Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:20:37 -06:00
Valeriy Glushkov
b7be63abec MPC8349ITX: several config issues fixed
The previous version rebooted forever with DDR bigger than 256MB.
Access the DS1339 RTC chip is on I2C1 bus.
Allow DHCP.

Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:13:45 -06:00
Anton Vorontsov
7e2ec1de1d mpc83xx: MPC837XEMDS: Initialize SerDes before negating PCIE reset signal
The SerDes initialization should be finished before negating the reset
signal according to the reference manual. This isn't an issue on real
hardware, but we'd better stick to the specifications anyway.

Suggested-by: Liu Dave <DaveLiu@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:13:11 -06:00
Heiko Schocher
9c2d63ec0e i2c, dtt: move dtt_init () to board_init_r ()
it is not necessary to init the DTTs so early,
so move this init to board_init_r ().

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-02 09:21:20 +01:00
Anatolij Gustschin
00cc5595a7 lcd: Fix compilation warning in common/lcd.c
Fix following warning while compilation for mcc200 board:

lcd.c: In function 'lcd_display_bitmap':
lcd.c:625: warning: unused variable 'cmap'

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-02-25 20:28:13 +01:00
Graeme Russ
f5a77a09c9 Moved SC520 Files (fix commit 407976185e)
Fixes commit 407976185e

Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
2009-02-25 11:59:22 +01:00
Mike Frysinger
75ba6d693b smc911x: split out useful defines/functions into local header
The smc911x driver has a lot of useful defines/functions which can be used
by pieces of code (such as example eeprom programmers).  Rather than
forcing each place to duplicate these defines/functions, split them out
of the smdc911x driver into a local header.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>
2009-02-25 09:00:32 +01:00
Wolfgang Denk
7fe2a98394 Merge branch 'master' of git://git.denx.de/u-boot-video 2009-02-24 22:56:00 +01:00
Wolfgang Denk
89e372cd3d Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-02-24 22:52:16 +01:00
Guennadi Liakhovetski
a2bb7105a7 ARM: add an "eet" variant of the imx31_phycore board
The "eet" variant of the imx31_phycore board has an OLED display, using a
s6e63d6 display controller on the first SPI interface, using GPIO57 as a
chip-select for it. With this configuration you can display 256 colour BMP
images in 16-bit RGB (RGB565) LCD mode.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-24 10:44:02 +01:00
Guennadi Liakhovetski
0c99f6ab31 video: add an i.MX31 framebuffer driver
Add a driver for the Synchronous Display Controller and the Display
Interface on i.MX31, using IPU for DMA channel setup. So far only
displaying of bitmaps is supported, no text output.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2009-02-24 10:22:59 +01:00
Guennadi Liakhovetski
b245e65ee3 LCD: support 8bpp BMPs on 16bpp displays
This patch also simplifies some ifdefs in lcd.c, introduces a generic
vidinfo_t, which new drivers are encouraged to use and old drivers to switch
over to.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2009-02-24 10:19:00 +01:00
Mark Jackson
a303dfb0e9 Add 16bpp BMP support
This patch adds 16bpp BMP support to the common lcd code.

Use CONFIG_BMP_16BPP and set LCD_BPP to LCD_COLOR16 to enable the code.

At the moment it's only been tested on the MIMC200 AVR32 board, but extending
this to other platforms should be a simple task !!

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2009-02-24 10:05:14 +01:00
Guennadi Liakhovetski
689551c5ff A driver for the S6E63D6 SPI display controller from Samsung
This is a driver for the S6E63D6 SPI OLED display controller from Samsung.
It only provides access to controller's registers so the client can freely
configure it.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2009-02-24 10:00:28 +01:00
Guennadi Liakhovetski
fc7a93c84f i.MX31: support GPIO as a chip-select in the mxc_spi driver
Some SPI devices have special requirements on chip-select handling.
With this patch we can use a GPIO as a chip-select and strictly follow
the SPI_XFER_BEGIN and SPI_XFER_END flags.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-24 09:48:33 +01:00
Guennadi Liakhovetski
b30de3cccf i.MX31: add a simple gpio driver
This is a minimal driver, so far only managing output. It will
be used by the mxc_spi.c driver.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-24 09:43:10 +01:00
Guennadi Liakhovetski
f9b6a1575d i.MX31: fix SPI driver for shorter than 32 bit
Fix setting the SPI Control register, 8 and 16-bit transfers
and a wrong pointer in the free routine in the mxc_spi driver.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-24 09:39:44 +01:00
Anton Vorontsov
7e91558032 mpc83xx: MPC837XERDB: Add PCIe support
On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe
slots. Let's support them.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:52:35 -06:00
Anton Vorontsov
50a4d08e8f mpc83xx: PCI: Fix hard-coded first_busno value
We should use pci_last_busno() in pci_init_bus(), otherwise we'll
erroneously re-use PCI0's first_busno for PCI1 hoses.

NOTE: The patch is untested. All MPC83xx FSL boards I have have
PCI1 in miniPCI form, for which I don't have any cards handy.

But looking in cpu/mpc85xx/pci.c:
...
#ifdef CONFIG_MPC85XX_PCI2
        hose = &pci_hose[1];

        hose->first_busno = pci_hose[0].last_busno + 1;

And considering that we do the same for MPC83xx PCI-E support,
I think this patch is correct.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:52:23 -06:00
Anton Vorontsov
a5878d4271 mpc83xx: PCI: Fix bus-range fdt fixups for PCI1 controllers
This patch fixes copy-paste issue: pci_hose[0]'s first and last
busnos were used to fixup pci1's nodes.

We don't see this bug triggering only because Linux reenumerate
buses anyway.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:52:12 -06:00
Anton Vorontsov
b24a99f666 mpc83xx: PCIe: Fix CONFIG_PCI_SCAN_SHOW reporting bogus values
This patch fixes an issue in config space read accessors: we should
fill-in the value even if we fail (e.g. skipping devices), otherwise
CONFIG_PCI_SCAN_SHOW reports bogus values during boot up.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:51:59 -06:00
Anton Vorontsov
e2d72ba543 mpc83xx: PCIe: Don't start bus enumeration at 0
Currently we assign first_busno = 0 for the first PCIe hose, but this
scheme won't work if we have ordinary PCI hose already registered (its
first_busno value is 0 too).

The old code worked fine only because we have PCI disabled on
MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae92
"mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards").
But on MPC837XERDB boards we have PCI and PCIe, so the bug actually
triggers.

So, to fix the issue, we should use pci_last_busno() + 1 for the
first_busno (i.e. last available busno).

Reported-by: Huang Changming <Chang-Ming.Huang@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:51:35 -06:00
Anton Vorontsov
cc2a8c7751 PCI: Add pci_last_busno() helper
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.

Will be used by PCI/PCIe initialization code.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:51:10 -06:00
Becky Bruce
bd76729bcb MPC86xx: set CONFIG_MAX_MEM_MAPPED to 2G by default
Currently, we get 256MB as the default, but since all the 86xx
board configs define a 2G BAT mapping for RAM, raise default
to 2G.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2009-02-23 22:50:05 +01:00
Becky Bruce
2331e18b9d mpc8641hpcn: Indicate 36-bit addr map in boot messages
If 36-bit addressing is enabled, print a message on the console
when we boot.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-23 22:48:17 +01:00
Kim Phillips
741a1ea973 Merge branch 'master' of git://git.denx.de/u-boot 2009-02-23 15:42:44 -06:00
Mark Jackson
58a518c3d8 Setup extra MIMC200 chip selects
Added code to setup the extra Flash and FRAM chip selects as used on the
MIMC200 board.

V2 moves the init code from the common "cpu.c" file into the board specific
setup file.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-02-23 11:16:14 +01:00
Mark Jackson
80534886a7 MIMC200: tidy GCLK init code
Change the MIMC200 startup code to use the built-in (rather than
hard-coded) funtions for setting up gclk outputs.

We'll also move the code to the new, more-appropriate
board_postclk_init() routine.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-02-23 11:13:55 +01:00
Haavard Skinnemoen
7d3921bffb Merge branch 'evk1100-prep' into next 2009-02-23 10:34:46 +01:00
Haavard Skinnemoen
156feb90d2 Merge branch 'mimc200' into next
Conflicts:

	board/mimc/mimc200/mimc200.c
	include/configs/mimc200.h
2009-02-23 10:34:39 +01:00
Olav Morken
b423f94063 AVR32: Must add NOPs after disabling interrupts for AT32UC3A0512ES
The AT32UC3A0512ES chip has a bug when disabling interrupts. As a
workaround, two NOPs can be inserted.

Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-02-23 10:34:24 +01:00
Gunnar Rangoy
f5f652fa91 AVR32: Make GPIO implmentation cpu dependent
There are some differences in the implementation of GPIO in the
at32uc chip compared to the ap700x series.

Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-02-23 10:34:24 +01:00
Olav Morken
a38de083d2 AVR32: Move addrspace.h to arch-directory, and move some functions from io.h to addrspace.h
The AVR32A architecture (which AT32UC3A-series is based on) has a
different memory layout than the AVR32B-architecture. This patch moves
addrspace.h to an arch-dependent directory in preparation for
AT32UC3A-support. It also moves some address-space manipulation
functions from io.h to addrspace.h.

Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-02-23 10:34:24 +01:00
Olav Morken
d8f2aa3298 AVR32: Make cacheflush cpu-dependent
The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.

Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-02-23 10:34:23 +01:00
Haavard Skinnemoen
ea393eb1d6 Merge branch 'cleanups' into next 2009-02-23 10:27:15 +01:00