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AVR32: Move addrspace.h to arch-directory, and move some functions from io.h to addrspace.h
The AVR32A architecture (which AT32UC3A-series is based on) has a different memory layout than the AVR32B-architecture. This patch moves addrspace.h to an arch-dependent directory in preparation for AT32UC3A-support. It also moves some address-space manipulation functions from io.h to addrspace.h. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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3 changed files with 41 additions and 38 deletions
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@ -22,6 +22,8 @@
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#ifndef __ASM_AVR32_ADDRSPACE_H
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#define __ASM_AVR32_ADDRSPACE_H
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#include <asm/types.h>
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/* Memory segments when segmentation is enabled */
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#define P0SEG 0x00000000
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#define P1SEG 0x80000000
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@ -43,4 +45,40 @@
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#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
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#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
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/* virt_to_phys will only work when address is in P1 or P2 */
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static inline unsigned long virt_to_phys(volatile void *address)
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{
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return PHYSADDR(address);
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}
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static inline void * phys_to_virt(unsigned long address)
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{
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return (void *)P1SEGADDR(address);
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}
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#define cached(addr) ((void *)P1SEGADDR(addr))
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#define uncached(addr) ((void *)P2SEGADDR(addr))
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*
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* This implementation works for memory below 512MiB (flash, etc.) as
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* well as above 3.5GiB (internal peripherals.)
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (1 << 7)
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#define MAP_WRBACK (MAP_WRCOMBINE | (1 << 9))
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#define MAP_WRTHROUGH (MAP_WRBACK | (1 << 0))
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static inline void *
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map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
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{
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if (flags == MAP_WRBACK)
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return (void *)P1SEGADDR(paddr);
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else
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return (void *)P2SEGADDR(paddr);
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}
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#endif /* __ASM_AVR32_ADDRSPACE_H */
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@ -73,21 +73,8 @@ extern void __readwrite_bug(const char *fn);
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#define inw(p) ({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; })
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#define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; })
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#include <asm/addrspace.h>
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/* virt_to_phys will only work when address is in P1 or P2 */
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static inline phys_addr_t virt_to_phys(volatile void *address)
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{
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return PHYSADDR(address);
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}
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static inline void *phys_to_virt(phys_addr_t address)
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{
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return (void *)P1SEGADDR(address);
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}
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#define cached(addr) ((void *)P1SEGADDR(addr))
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#define uncached(addr) ((void *)P2SEGADDR(addr))
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#include <asm/arch/addrspace.h>
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/* Provides virt_to_phys, phys_to_virt, cached, uncached, map_physmem */
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#endif /* __KERNEL__ */
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@ -95,28 +82,6 @@ static inline void sync(void)
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{
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}
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*
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* This implementation works for memory below 512MiB (flash, etc.) as
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* well as above 3.5GiB (internal peripherals.)
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (1 << 7)
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#define MAP_WRBACK (MAP_WRCOMBINE | (1 << 9))
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#define MAP_WRTHROUGH (MAP_WRBACK | (1 << 0))
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static inline void *
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map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
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{
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if (flags == MAP_WRBACK)
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return (void *)P1SEGADDR(paddr);
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else
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return (void *)P2SEGADDR(paddr);
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}
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/*
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* Take down a mapping set up by map_physmem().
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*/
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@ -24,7 +24,7 @@
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#include <image.h>
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#include <zlib.h>
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#include <asm/byteorder.h>
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#include <asm/addrspace.h>
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#include <asm/arch/addrspace.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/arch/clk.h>
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