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20545 commits

Author SHA1 Message Date
Ashok Reddy Soma
2a9caba1ce net: gem: Reduce timeout of mdio phy idle status check
Timeout for checking mdio phy idle status is 20seconds. In case of errors
this timeout will be too much. Reduce it to 100ms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/1b73aa57b77587391e1bcd6d9f0480163367ed1b.1637237121.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Michal Simek
10c50b1fac net: zynq: Add support for PHY configuration in SGMII mode
SGMII configuration depends on proper GT setting that's why when node has
phys property call PSGTR driver to configure it properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/bbc8d7ed9d308199168e4455c7a3e3a5ac0890e7.1639562397.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Michal Simek
b5ffc9f758 net: zynq: Add support for GEM reset
Perform reset before core initialization.
Standard flow which close to 99% users are using getting all IPs out of
reset that there is no need to reset IP again. This is because of all low
level initialization is done in previous bootloader stage.
In SOM case these IPs are not touched by previous bootloader stage that's
why reset needs to be called before IP is accessed to make sure that it is
in correct state.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/5ae1c85b282d632bb62030f1f24a0065661b9153.1638804318.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Michal Simek
12133b11a7 net: zynq: Add support for mdio bus address decoding
Xilinx DTS files are using two way how to describe ethernet phy.

The first (already supported) has phy as subnode of gem node.
eth {
        phy-handle = <&phy0>;
         phy0: ethernet-phy@21 {
                ...
        };
};

The second has mdio subnode (with mdio name) which has phy subnode. This
structure allow hadling MDIO reset signal (based on Linux mdio.yaml)
eth {
        phy-handle = <&phy0>;
        mdio {
                phy0: ethernet-phy@21 {
                        ...
                };
        };
};

This patch adds support for the second case where mdio subnode
is found driver will look at its parent to find out which gem is handling
MDIO bus.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6748007f0b6db9554d7a4b52352dce23ca403f9d.1638798796.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Ovidiu Panait
fc7220f0c4 microblaze: branch to base vector address on reset
Current code assumes that the vector base address is always at 0x0.
However, this value is configurable for MicroBlaze using the
CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option. Update the
reset routines to branch to this location instead.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-10-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Michal Simek
380bd08370 xilinx: firmware: Move dcache handling directly to pmufw load config
Core function should make sure that data is stored properly that's why move
cache operations directly to zynqmp_pmufw_load_config_object() to be able
to call it from other functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
0e789d26b7 clk: zynqmp: Fix gem tx/rx/ref clock handling
gemX_ref clock IDs starts at number 104. Till now it was at gemX_tx
location which wasn't correct.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d073e159b6316707306092a62bccb876cd89a602.1635506016.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
e959ade02c clk: zynqmp: Add support for setting up clock for USB
USB range is not enabled but for setting up frequency it is needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c55c423f48ca8f953a2dfbdcb25068278d8e5ad6.1635506016.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
T Karthik Reddy
3b441cf4e4 zynqmp: gpio: Add support for zynqmp gpio modepin driver
ZynqMP modepin driver has capability to get/set/check status of modepin
gpios. These modepins are accessed using xilinx firmware. In modepin
register, [3:0] bits set direction, [7:4] bits read IO, [11:8] bits
set/clear IO.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2d802d98fd56d95d764532a33e844d935e0cebb3.1635505900.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Tom Rini
5fec3c853d Pull request of efi-next
Documentation:
 
 * Add Sunxi board description
 
 UEFI:
 
 * Improvements to U-Boot running on top of UEFI
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Merge tag 'efi-next' of https://source.denx.de/u-boot/custodians/u-boot-efi into next

Pull request of efi-next

Documentation:

* Add Sunxi board description

UEFI:

* Improvements to U-Boot running on top of UEFI
2021-12-31 07:28:36 -05:00
Simon Glass
2996066110 efi: serial: Support arrow keys
At present only the backspace key is supported in U-Boot, when running as
an EFI app. Add support for arrows, home and end as well, to make the CLI
more friendly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 06:45:01 +01:00
Tom Rini
87a9aa604d - various fixes to the sandbox display support
- support for showing a logo without splash screen config
 - support for BMP drawing to depths other than 16bpp
 - tests for the different types of supported BMP images
 - support showing a logo when running coreboot via qemu
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Merge tag 'video-next-20211228' of https://source.denx.de/u-boot/custodians/u-boot-video into next

- various fixes to the sandbox display support
- support for showing a logo without splash screen config
- support for BMP drawing to depths other than 16bpp
- tests for the different types of supported BMP images
- support showing a logo when running coreboot via qemu
2021-12-28 11:28:31 -05:00
Tom Rini
b3f84a939f - mxsfb axi/disp_axi clock enable fix
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Merge tag 'video-20211228' of https://source.denx.de/u-boot/custodians/u-boot-video

- mxsfb axi/disp_axi clock enable fix
2021-12-28 11:19:26 -05:00
Tom Rini
880f3ee4f5 Pull request for efi-2022-01-rc4-4
UEFI:
 
 * allow for more than 16 KiB UEFI variable size when using StMM
 
 Others:
 
 * make watchdog sysreset compatible with separate poweroff driver
 * avoid OpenSSL deprecation warnings
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Merge tag 'efi-2022-01-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4-4

UEFI:

* allow for more than 16 KiB UEFI variable size when using StMM

Others:

* make watchdog sysreset compatible with separate poweroff driver
* avoid OpenSSL deprecation warnings
2021-12-28 07:59:56 -05:00
Tom Rini
b2d1c828b9 Convert CONFIG_KIRKWOOD_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_KIRKWOOD_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:19 -05:00
Tom Rini
6328f95ea0 serial: arm_dcc: Use CONFIG_ARM64 not CONFIG_CPU_ARMV8
The only place we use CONFIG_CPU_ARMV8 was in the arm_dcc serial driver.
Switch this to CONFIG_ARM64 today, and if in the future we need finer
granularity tuning here, a new CONFIG_SERIAL option needs to be
introduced.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
2f8a6db5d8 Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig
In order to finish moving this symbol to Kconfig for all platforms, we
need to do a few more things.  First, for all platforms that define this
to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to
CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h.  This entails
also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk()
and updating a few preprocessor tests.

With that done, all platforms that define a value here can be converted
to Kconfig, and a fall-back of zero is sufficiently safe to use (and
what is used today in cases where code may or may not have this
available).  Make sure that code which calls this function includes
<clock_legacy.h> to get the prototype.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
068c41f1cc Finish conversion CONFIG_SYS_NAND_SELF_INIT to Kconfig
In order to finish this conversion we need to add a symbols for
SPL_SYS_NAND_SELF_INIT and TPL_SYS_NAND_SELF_INIT as there are cases
there where we need to, or need to not, use that framework as things
stand.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
bfb5387fe9 Convert CONFIG_TEGRA_NAND to Kconfig
This converts the following to Kconfig:
   CONFIG_TEGRA_NAND

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
7856cd5a6d Convert CONFIG_SYS_PCI_64BIT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_PCI_64BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:17 -05:00
Tom Rini
be7dbb60c5 Convert CONFIG_SYS_IMMR to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
954a2f8177 pci: Remove unused FSL_PCI_INIT code
The symbol CONFIG_FSL_PCI_INIT is no longer enabled anywhere, removed
now unused code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
4d69303299 Convert CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT

In order to do this conversion, expose this option to the user and
use "save" not "safe" in the text.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
98ab831da7 Convert CONFIG_FSL_IFC to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_IFC

This is done via select statements to match previous logic.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Tom Rini
7e6a6fd821 Convert CONFIG_ENV_SPI_BUS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_SPI_BUS
   CONFIG_ENV_SPI_CS
   CONFIG_ENV_SPI_MAX_HZ
   CONFIG_ENV_SPI_MODE

As part of this, we use Kconfig to provide the defaults now that were
done in include/spi_flash.h.  We also in some cases change from using
CONFIG_ENV_SPI_FOO to CONFIG_SF_DEFAULT_FOO as those were the values in
use anyhow as ENV was not enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Tom Rini
5fd4a7ed0c Clarify CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW in Kconfig
This is a "hex" prompt but the default value was given as an int.
Switch the default to hex (0x0) and remove the defconfigs that were
using the default, but as hex before.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Giulio Benetti
f36b3f8f17 video: mxsfb: fix clk_get_by_name() return value check
If clk_get_by_name() returns 0 it means it executed successfully while now
we consider it as an error. So let's check if return value is negative to
be an error. Otherwise this prevents "axi" and "disp_axi" to be enabled.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-12-27 00:30:37 +01:00
Simon Glass
7a8555d871 video: Show the U-Boot logo by default
Enable this for boards with a display, unless they are using the SPLASH
feature.

This shows a U-Boot logo on boards with a display, which seems like a
useful thing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:33:11 +01:00
Simon Glass
84e63abfff video: Support showing the U-Boot logo
Show the U-Boot logo by default. This is only 7KB in size so seems like
a useful default for boards that enable a display.

If SPLASH_SCREEN is enabled, it is not enabled by default, so as not to
conflict with that feature.

Also disable it for tests, since we don't want to complicate the output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:32:46 +01:00
Simon Glass
2c8ee30b97 video: Drop VIDEO_LOGO from cfb_console
This driver is obsolete and only used by nokia_rx51. It should be deleted.
For now, drop the VIDEO_LOGO code to avoid confusion with the new
implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:25:29 +01:00
Simon Glass
64cfeda8ae video: Convert CONFIG_VIDEO_LOGO to Kconfig
This converts the following to Kconfig:
   CONFIG_VIDEO_LOGO

Note that this option depends on CONFIG_DM_VIDEO now, since cfb_console is
deprecated. The only relevant code is now in splash.c

Drop the check for DM_VIDEO in that file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:24:46 +01:00
Simon Glass
cd4fb0f054 video: Drop #ifdefs from video_bmp
Convert the current preprocessor macros to C code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:24:29 +01:00
Simon Glass
4ea1548210 video: theadorable: Use RGB565 for BMP blitting
At present this uses RGB555 format for blitting to a display. Sandbox uses
565 and that seems to be more normal for BMP as well. Update the code
accordingly and add a test.

Note that this likely breaks the theadorable board so we may need to
discuss supporting both formats.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:23:52 +01:00
Simon Glass
f5aa93eb53 video: Tidy up 24/32 BMP blitting
Drop the unnecessary brackets.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
ecb8b4f8f3 video: Drop the uclass colour map
We don't need this anymore since we use the BMP palette directly. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
646e169aa0 video: bmp: Update RLE8 support to use the write function
Update this code to use write_pix8() rather than writing the pixels only
for a single supported display depth. This allows us to support any
depth.

Add some more tests too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
51f92c1430 video: Move BMP pixel-writing into a function
At present the code that writes to a pixel is quite convoluted. It uses a
colour map which is in the uclass and the same code is repeated in
different places within video_bmp_display().

As a first step, create a function which can write a pixel from the
bitmap, no matter what the display depth. Use any provided palette
directly, rather than using the uclass version.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
19c828c525 video: Drop fb_put_byte() el at
These functions are not used with driver model, nor in any U-Boot boards.
Drop them and inline the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
6a19e938f8 video: Expand video debugging buffer size
On sandbox these addresses are 16 hex digits log so we need more space
for the debug string. Update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
8657ad43f3 sandbox: video: Add BMP tests for 32bpp and 8bpp modes
Add a few more tests for BMP rendering. Use a back door into the sandbox
SDL driver to adjust the resolution at runtime.

The truetype code does not support 8bpp. Add this so that the display is
not blank when running in this mode.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
8405174391 sandbox: video: Correct the address of the copy base
The intention is for the copy base to start halfway through the
frame-buffer area. At present is it actually below the frame buffer,
which could have anything in it (probably it is malloc space). Fix
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
301af2388a video: sandbox: Set a maximum frame-buffer size
If U-Boot starts with the frame buffer set to 16bpp but then runs a test
that uses 32bpp, there is not enough space. Update the driver to use the
maximum possible frame-buffer size, to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
250e735c69 video: sandbox: Avoid duplicate display windows
When unit tests are run they currently create a new window. Update the
code so that the old one is removed first. This avoids the confusion as to
which one is active.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Simon Glass
0fe5e9481e sandbox: video: Support 8bpp depth
At present sandbox only supports 16 and 32bpp depths, since those are the
easy ones with SDL.

We can support other depths by manually converting the pixel formats. Add
support for this, to enable an 8ppp (monochrome) format.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:02:19 +01:00
Tom Rini
c9964879ab Merge https://source.denx.de/u-boot/custodians/u-boot-spi 2021-12-26 14:07:41 -05:00
Heinrich Schuchardt
88c4cbedfb sysreset: watchdog: watchdog cannot power off
The watchdog system reset driver can reboot the device but it cannot power
it off. If power off is requested, the driver should not reset the system
but leave powering off to one of the other system reset drivers.

As power cycling is typically not a feature of a watchdog driver the reset
types SYSRESET_POWER and SYSRESET_POWER_OFF shall both be excluded.

Fixes: 17a0c14164 ("dm: sysreset: add watchdog-reboot driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-26 06:49:14 +01:00
Quentin Schulz
2206356a3e power: pmic/fan53555: allow dm be omitted by SPL
Allow the dm driver be omitted by SPL.

Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 15:15:03 +08:00
Simon Glass
6476c4d981 dm: core: Allow getting some basic stats
Add a function that returns some basic stats about driver model. For now
we only have two.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:40 -05:00
Pali Rohár
c68a73c559 pci: pci_mvebu: Remove unused DECLARE_GLOBAL_DATA_PTR
The global data pointer is not used in this driver, remove it's
declaration.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-21 07:42:01 +01:00
Pali Rohár
e1cee89e28 pci: pci_mvebu: Replace MBUS_PCI_*_SIZE by resource_size()
Use more appropriate resource_size() function when working with data in
struct resource.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-21 07:40:26 +01:00