mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
Convert CONFIG_SYS_PCI_64BIT to Kconfig
This converts the following to Kconfig: CONFIG_SYS_PCI_64BIT Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
d06e4b7e25
commit
7856cd5a6d
29 changed files with 14 additions and 33 deletions
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@ -1909,6 +1909,7 @@ config ARCH_OCTEONTX
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select OF_LIVE
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select BOARD_LATE_INIT
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select SYS_CACHE_SHIFT_7
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select SYS_PCI_64BIT if PCI
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imply OF_HAS_PRIOR_STAGE
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config ARCH_OCTEONTX2
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@ -1921,6 +1922,7 @@ config ARCH_OCTEONTX2
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select OF_LIVE
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select BOARD_LATE_INIT
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select SYS_CACHE_SHIFT_7
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select SYS_PCI_64BIT if PCI
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imply OF_HAS_PRIOR_STAGE
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config TARGET_THUNDERX_88XX
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@ -262,6 +262,7 @@ config ARCH_LX2162A
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select SYS_FSL_HAS_DDR4
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select SYS_FSL_SEC_COMPAT_5
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select SYS_FSL_SEC_LE
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select SYS_PCI_64BIT if PCI
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select ARCH_EARLY_INIT_R
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select BOARD_EARLY_INIT_F
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select SYS_I2C_MXC
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@ -301,6 +302,7 @@ config ARCH_LX2160A
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select SYS_FSL_HAS_DDR4
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select SYS_FSL_SEC_COMPAT_5
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select SYS_FSL_SEC_LE
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select SYS_PCI_64BIT if PCI
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select ARCH_EARLY_INIT_R
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select BOARD_EARLY_INIT_F
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select SYS_I2C_MXC
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@ -16,8 +16,4 @@ config SYS_SOC
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string
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default "octeontx"
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config SYS_PCI_64BIT
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bool
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default y
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endif
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@ -16,8 +16,4 @@ config SYS_SOC
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string
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default "octeontx2"
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config SYS_PCI_64BIT
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bool
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default y
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endif
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@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x4000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb"
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CONFIG_SYS_CLK_FREQ=66666667
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# CONFIG_SYS_PCI_64BIT is not set
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CONFIG_MPC83xx=y
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CONFIG_HIGH_BATS=y
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CONFIG_TARGET_MPC837XERDB=y
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@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x1000
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CONFIG_DEFAULT_DEVICE_TREE="phytium-durian"
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# CONFIG_PSCI_RESET is not set
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CONFIG_SYS_PCI_64BIT=y
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SYS_LOAD_ADDR=0x90000000
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@ -10,6 +10,7 @@ CONFIG_SPL_MMC=y
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CONFIG_SPL=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_SYS_PCI_64BIT=y
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CONFIG_AHCI=y
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CONFIG_TARGET_SIFIVE_UNMATCHED=y
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CONFIG_ARCH_RV64I=y
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@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xfff80000
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CONFIG_ENV_SIZE=0x4000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_DEFAULT_DEVICE_TREE="socrates"
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# CONFIG_SYS_PCI_64BIT is not set
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_SOCRATES=y
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@ -19,6 +19,12 @@ config DM_PCI_COMPAT
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measure when porting a board to use driver model for PCI. Once the
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board is fully supported, this option should be disabled.
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config SYS_PCI_64BIT
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bool "Enable 64-bit PCI resources"
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default y if PPC
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help
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Enable 64-bit PCI resource access.
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config PCI_AARDVARK
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bool "Enable Aardvark PCIe driver"
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depends on DM_GPIO
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@ -26,8 +26,6 @@
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#define CONFIG_HAS_FEC 1 /* 8540 has FEC */
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#endif
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#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
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/*
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* sysclk for MPC85xx
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*
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@ -19,7 +19,6 @@
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#define CONFIG_PCI1 /* PCI controller 1 */
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#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
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#undef CONFIG_PCI2
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#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
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#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
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@ -27,7 +27,6 @@
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* assume U-Boot is less than 0.5MB
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*/
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#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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/*
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@ -114,7 +114,6 @@
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#if defined(CONFIG_PCI)
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#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
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#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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/*
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* PCI Windows
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@ -36,7 +36,6 @@
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#define CONFIG_PCIE1 /* PCIE controller 1 */
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#define CONFIG_PCIE2 /* PCIE controller 2 */
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#define CONFIG_PCIE3 /* PCIE controller 3 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#define CONFIG_SYS_SRIO
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#define CONFIG_SRIO1 /* SRIO port 1 */
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@ -416,7 +416,6 @@ unsigned long get_board_sys_clk(void);
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#define CONFIG_PCIE1 /* PCIE controller 1 */
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#define CONFIG_PCIE2 /* PCIE controller 2 */
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#define CONFIG_PCIE3 /* PCIE controller 3 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#ifdef CONFIG_PCI
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/* controller 1, direct to uli, tgtid 3, Base address 20000 */
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@ -85,8 +85,6 @@
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#define CONFIG_PCIE3 /* PCIE controller 3 */
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#define CONFIG_PCIE4 /* PCIE controller 4 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#if defined(CONFIG_SPIFLASH)
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#elif defined(CONFIG_MTD_RAW_NAND)
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#ifdef CONFIG_NXP_ESBC
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@ -414,7 +414,6 @@ unsigned long get_board_sys_clk(void);
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#define CONFIG_PCIE2 /* PCIE controller 2 */
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#define CONFIG_PCIE3 /* PCIE controller 3 */
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#define CONFIG_PCIE4 /* PCIE controller 4 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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/* controller 1, direct to uli, tgtid 3, Base address 20000 */
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#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
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#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
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@ -366,7 +366,6 @@ unsigned long get_board_sys_clk(void);
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#define CONFIG_PCIE2 /* PCIE controller 2 */
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#define CONFIG_PCIE3 /* PCIE controller 3 */
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#define CONFIG_PCIE4 /* PCIE controller 4 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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/* controller 1, direct to uli, tgtid 3, Base address 20000 */
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#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
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#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
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@ -60,7 +60,6 @@
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#define CONFIG_PCIE1 /* PCIE controller 1 */
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#define CONFIG_PCIE2 /* PCIE controller 2 */
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#define CONFIG_PCIE3 /* PCIE controller 3 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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/*
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* These can be toggled for performance analysis, otherwise use default.
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@ -44,7 +44,6 @@
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/* Access eMMC Boot_1 and Boot_2 partitions */
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/* enable 64-bit PCI resources */
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#define CONFIG_SYS_PCI_64BIT 1
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#define CONSOLE_ARGS "console_args=console=ttyS0,115200n8\0"
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#define MAX_CPUS "max_cpus=maxcpus=8\0"
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@ -47,7 +47,6 @@
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#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
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#define CONFIG_PCIE1 /* PCIE controller 1 */
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#define CONFIG_PCIE2 /* PCIE controller 2 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#if defined(CONFIG_SPIFLASH)
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#elif defined(CONFIG_SDCARD)
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@ -16,7 +16,6 @@
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#define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000)
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/* PCI CONFIG */
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#define CONFIG_SYS_PCI_64BIT 1
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#define CONFIG_PCI_SCAN_SHOW
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/* SCSI */
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@ -141,7 +141,6 @@
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#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
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#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
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#define CONFIG_PCIE1 /* PCIE controller 1 */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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/* Environment in parallel NOR-Flash */
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#define CONFIG_ENV_TOTAL_SIZE 0x040000
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@ -104,7 +104,6 @@
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/* PCI */
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#ifdef CONFIG_PCI
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#define CONFIG_SYS_PCI_64BIT
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#define CONFIG_PCI_SCAN_SHOW
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#endif
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@ -140,7 +140,6 @@
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#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
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#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#define CONFIG_SYS_SATA_MAX_DEVICE 2
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#define CONFIG_LBA48
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@ -13,8 +13,6 @@
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#define CONFIG_SYS_RAMBOOT
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#define CONFIG_ENABLE_36BIT_PHYS
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/* Needed to fill the ccsrbar pointer */
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@ -32,8 +32,6 @@
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#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
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#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit resources */
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
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/* Environment options */
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@ -46,7 +46,6 @@
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */
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/* #define CONFIG_SYS_PCI_64BIT 1 */
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#define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \
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"mtd nor1=u-boot.bin raw 200000 100000;" \
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@ -198,6 +198,4 @@
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#define CONFIG_SPL_PAD_TO 0x20000
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#define CONFIG_SYS_PCI_64BIT
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#endif /* __CONFIG_UNIPHIER_H__ */
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