Commit graph

76297 commits

Author SHA1 Message Date
Pali Rohár
851114be1a tools: kwbimage: Properly calculate and align kwbimage v0 header size
Kwbimage v0 has similar alignment requirements as v1.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
2b0980c240 tools: kwbimage: Fill the real header size into the main header
Fill the real header size without padding into the main header

This allows to reduce final image when converting image to another format
which does not need additional padding.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
5cad2e6cce tools: kwbimage: Align kwbimage header to proper size
Currently kwbimage header is always aligned to 4096 bytes. But it does not
have to be aligned to such a high value.

The header needs to be just 4-byte aligned, while some image types have
additional alignment restrictions.

This change reduces size of kwbimage binaries by removing extra padding
between header and data part.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
e23ad5d55c tools: kwbimage: Do not put final image padding to the image data size
This change allows to convert image from one format to another without need
to include unnecessary padding (e.g. when target image format has smaller
alignment requirement as source image format).

Do it by storing real image data size without padding to the kwbimage
header.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
188099ed7f tools: kwbimage: Align final UART image to 128 bytes
xmodem block size is 128 bytes, therefore it is possible to transfer only
images with size multiple of 128 bytes. kwboot automatically pads image
with zero bytes at the end to align it to 128 bytes boundary.

Do this padding when generating image to allow uploading with other xmodem
tools or older kwboot versions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
56087c1b4d tools: kwbimage: Remove unused enums and prototypes
There are more unused enums and function prototypes. Remove them. The
function kwbimage_check_params() does not return enum kwbimage_cmd_types,
but a boolean value returned as int.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
700ea98b2e tools: kwbimage: Fix validation of kwbimage v0
kwbimage v0 sldo has 32-bit data checksum at the end like kwbimage v1.

Use same data checksum validation for both v0 and v1 image types.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
d1547b3672 tools: kwbimage: Set BOOT_FROM by default to SPI
kwbimage must have valid blockid member instead of zero value. Thus if
config file does not contain BOOT_FROM command, use by default the value
for SPI booting (which is probably the most common).

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
01bdac6df6 tools: kwbimage: Explicitly set version also for kwbimage v0
For documentation purposes update struct main_hdr_v0 to include information
where version of the image must be stored. For kwbimage v0 it obviously
must be 0. By default all image header memory is initialized to zero,
therefore this change has no functional effect.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
12f2c03f4d tools: kwbimage: Add support for new commands UART_PORT and UART_MPP
These two commands allow to specify custom setting of UART port used for
printing BootROM messages.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
cbf0d3a56d pci: pci_mvebu: Use global MBUS_PCI_MEM_SIZE macro
Header file mach/cpu.h already defines MBUS_PCI_MEM_SIZE macro which
defines size of MBUS_PCI_MEM_BASE window. So use global MBUS_PCI_MEM_SIZE
macro instead of locally defined PCIE_MEM_SIZE macro. Both macros have same
definition.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
75176dc863 tools: kwboot: Always print kwboot version
It is useful to see kwboot version in the boot log output for debugging
purposes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
Pali Rohár
f8017c3779 tools: kwboot: Fix sending Kirkwood v0 images
Properly calculate and align image header size to xmodem block size.

Kirkwood v0 images do not have stored total size of header in header
structure itself like it is for v1 images. So kwbheader_size() calculates
size by traversing image structure itself. Aligning is done in kwboot by
putting zero padding bytes between the header and data part.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:05 +01:00
Tom Rini
a7795821ce Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
- watchdog: don't autostart watchdog on Sunxi boards
2021-11-09 22:26:56 -05:00
Heinrich Schuchardt
86798ee0c1 watchdog: don't autostart watchdog on Sunxi boards
The Sunxi boards only support a 16 second watchdog timeout. This is too
short to boot Linux. The UEFI specification requires 300 seconds as
default timeout.

Change the default for CONFIG_WATCHDOG_AUTOSTART for ARCH_SUNXI.

Fixes: b147bd3607 ("sunxi: Enable watchdog timer support by default")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-10 01:38:07 +00:00
Tom Rini
e8e9c6f484 Merge https://source.denx.de/u-boot/custodians/u-boot-samsung
[trini: Migrate CONFIG_EXYNOS7420 as part of merging, so espresso7420
still builds]

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-09 15:05:33 -05:00
Vladimir Oltean
99e1fa89f1 configs: ls1028a: ensure Ethernet is enabled
CONFIG_FSL_ENETC is not explicitly enabled in the NXP LS1028A config
files, instead it is selected by CONFIG_MSCC_FELIX_SWITCH, a state of
matters which is fragile.

CONFIG_MSCC_FELIX_SWITCH depends on CONFIG_DM_DSA, which depends on
CONFIG_PHY_FIXED.

Not all LS1028A boards did enable CONFIG_PHY_FIXED, which resulted in
all of Ethernet being compiled out.

This patch makes sure that CONFIG_PHY_FIXED is enabled for all LS1028A
boards, and CONFIG_FSL_ENETC as well - don't rely on that fragile
selection done by the Felix switch config.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Hou Zhiqiang
be38416034 pci: layerscape: Fix the LUT and msi-map mismatch issue
In the current code, it doesn't reset the cursors of LUT entry and
StreamID at the beginning of the fixup, so it can result in LUT entry
setup and msi-map mismatch and LUT entries and StreamID leaking
when reload and fixup the DTB.
This patch move the initialization of LUT entry and StreamID cursors
to the beginning of the fixup to resolve the issues.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Rajesh Bhagat
a97a071d10 configs: fsl: migrate FMAN/QE specific defines to Kconfig
Use moveconfig.py script to convert CONFIG_SYS_FMAN_FW_ADDR,
CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_QE_FMAN_FW_LENGTH to Kconfig and
move these entries to defconfigs.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Kuldeep Singh
5e736c9397 configs: ls1046aqds: Configure environment related configs
LS1046A-QDS board requires updation in few environment configs in TFA
defconfigs of the board.

Following are the changes:
- Update CONFIG_ENV_ADDR
- Update CONFIG_ENV_SECT_SIZE
- Enable CONFIG_SYS_RELOC_GD_ENV_ADDR

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Kuldeep Singh
266e68be75 configs: ls1046aqds: Move CONFIG_SPI_FLASH_* definitions to defconfigs
LS1046A-QDS has CONFIG_SPI_FLASH_SST, CONFIG_SPI_FLASH_EON and
CONFIG_SPI_FLASH_STMICRO defines present in header. Move these entries
from header to defconfigs.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
8bbbb29815 board: kontron: sl28: add myself to ls1028a.dtsi maintainers
I'd like to keep informed about ls1028a.dtsi changes. For now, there is
no top-level entry for any layerscape specific files. Instead, add the
file entry to my board MAINTAINERS file.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
cdf8534b8a armv8: layerscape: use memalign() to allocate spintable code
Don't use efi_allocate_pages(). The allocated memory isn't carved out of
the lmb allocations. The memory might then be allocated twice.
Particulary, this might happened with the fdt_high/initrd_high feature
which will relocate the fdt/ramdisk. This might then overlap with the
spin table.

Instead use memalign() which allocates on memory on the heap which is
correctly carved out by lmb.

Please note, that the memory is later reserved in the device tree as
well as in the EFI memory map in ft_fixup_cpu() (in
arch/arm/cpu/armv8/fsl-layerscape/fdt.c).

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
12d2b42a05 board: sl28: enable USB periheral support and gadgets
Enable support to update the board via the DFU protocol and make it
possible to export the block devices via USB mass storage protocol.

This will not work out of the box, yet. You have to change the dr_mode
of the usb0 controller to peripheral manually to make it work. True, OTG
support will hopefully coming soon.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
f6cc9da166 board: sl28: switch to dwc3 driver
Now that the DWC3 USB driver has support for the layerscape platform,
use it. This will have the benefit that peripheral mode will work.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
2b0b51d0be usb: dwc3: add layerscape support
Add support for the proper dwc3 device tree binding support as specified
in the offical device tree spec.

Initially, add support for the LS1028A support. Other SoCs should be
easy to add by just adding the corresponding compatible string.
Unfortunately, the device trees of all other layerscape SoCs are not
converted and uses a wrong compatible string only known in u-boot.

To maintain backwards compatibility with current u-boot device trees,
add the generic "fsl,layerscape-dwc3" compatible string.

OTG mode is not supported yet. The dr_mode in the devicetree will either
have to be set to peripheral or host.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
f150b8d28b usb: dwc3: Enable undefined length INCR burst type
[backport from linux commit d9612c2f0449e24983a8b689603210486a930c90]

Enable the undefined length INCR burst type and set INCRx.
Different platform may has the different burst size type.
In order to get best performance, we need to tune the burst
size to one special value, instead of the default value.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
d274cbbc1c usb: dwc3: Add frame length adjustment quirk
[backport from linux commit db2be4e9e30c6e43e48c5749d3fc74cee0a6bbb3]

Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
7f79a2c235 usb: common: silence dubious errors
Both dr_mode and maximum-speed properties are usually optional. Drivers
will still try to fetch the properties nonetheless, which leads to error
messages, although they are no errors. Change pr_err() to pr_debug().

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
f53e102e12 armv8: fsl-layerscape: rework the dwc3 snooping enable code
Instead of looking at all USB (host) devices, just search all DWC3
device tree nodes. This will (1) fix a panic if of_match is zero and (2)
also apply the fixup if the controller is in peripheral mode. Both
happen when the DWC3 USB controller driver is used.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
bce039acf2 test: dm: add test for ofnode_for_each_compatible_node()
Check that all matching nodes have the correct compatible and that there
is at least one match.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
b8ec9458a3 dm: core: add ofnode_for_each_compatible_node()
Add a helper to iterate over all nodes with a given compatible string.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
c7155d29fb arm: dts: sl28: sync dtbs
Copy the board device tree files from linux v5.14. On top of the v5.14
dtbs the changes of these two patches are included here which are needed
for u-boot:
  https://lore.kernel.org/linux-devicetree/20210831134013.1625527-7-michael@walle.cc/
  https://lore.kernel.org/linux-devicetree/20210831134013.1625527-8-michael@walle.cc/

At the time of this writing the patches were accepted and will be
included in 5.15.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
7f900eabf7 arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the
linux kernel v5.14.12.

Notable changes:
 - second watchdog added
 - the number of chip selects of the SPI controller is now correct and
   reflects what the hardware offers
 - the LPUARTs have the correct clock parent
 - USB controllers are enabled by default, which was already the case
   before this sync because all board enabled all the USB controller
   nodes. A linux patch to fix this is pending.
 - the eSDHC controller changes from big-endian to little-endian, but
   that property seems to be not used at all.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
d08011d7f9 arm: dts: ls1028a: disable the PCIe controller by default
Disable the PCIe controllers by default, just like in the linux device
tree. But there is one catch, for linux they are enabled in-place by the
bootloader. Obviously, this doesn't work for the bootloader. Thus we
explicitly enable the controllers in the -u-boot.dtsi files.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
938d9355e6 arm: dts: ls1028a: move the PCI I/O window to match
To make the synchronization of the u-boot device tree with the one from
linux easier, move the I/O window to the one which is specified in the
linux device tree. The actual value shouldn't matter as long as it
mapped to the corresponding memory window of the PCIe controller which
is a 32GiB window at 80_0000_0000h (first controller) or 88_0000_0000h
(second controller).

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
d4a64821fb arm: dts: ls1028a: remove num-lanes in the PCIe controller nodes
This property is unused in the layerscape PCIe controller driver and not
present in the linux device tree. Remove it to be similarly.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
e10da1f985 pci: layerscape: add official ls1028a binding support
The official bindind of the PCIe controller of the ls1028a has the
following compatible string:
  compatible = "fsl,ls1028a-pcie";

Additionally, the resource names and count are different. Update the
driver to support this binding and change the entry in the ls1028a
device tree.

Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
8f176eb8ac usb: xhci: fsl: add new compatible fsl,ls1028a-dwc3
The official ls1028a binding of the driver uses the following as
compatibles:
  compatible = "fsl,ls1028a-dwc3", "snps,dwc3";

Change the ls1028a device tree and add this new compatible to the fsl
specific xhci driver, otherwise the generic dwc3 driver will be used
with the compatibles above.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
cde9b147ba scsi: ceva: rename the resource name to match the linux kernel one
The driver will look for a named resource "ecc-addr", but this isn't the
official binding. In fact, the official device tree binding
documentation doesn't mention any resource names at all. But it is safe
to assume that it's the linux ones we have to use if we want to be
compatible with the linux device tree. Thus rename "ecc-addr" to
"sata-ecc" and convert all the users in u-boot.

While at it, also rename "sata-base" to "ahci" although its not used at
all.

This change doesn't affect the SATA controller on the ZynqMP.

Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
c9bf9af9a7 serial: lpuart: add new compatible fsl, ls1028a-lpuart
The official ls1028a binding of the driver uses the following as
compatibles:
  compatible = "fsl,ls1028a-lpuart";

Add the missing compatible to the driver and update the device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
8c58089287 spi: fsl_dspi: rename num-cs to spi-num-chipselects
The official devicetree bindings specifies spi-num-chipselects as the
name. Use it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
765afe7fb3 spi: fsl_dspi: add new compatible fsl, ls1021a-v1.0-dspi
The official ls1028a binding of the driver uses the following as
compatibles:
  compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";

Add the missing compatible to the driver and update the device tree.
We can use the fallback "fsl,ls1021a-v1.0-dspi", because the endianness
is determined by the little-endian property and not by the compatible
string itself. Further, we won't need and specific details on the DMA
configuration (which is different on the LS1021A). If it's ever needed,
we can later add the more specific "fsl,ls1028a-dspi" compatible to the
driver.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
5709a858c0 watchdog: sp805_wdt: use correct compatible string
According to the linux device tree specification the compatible string
is:
  compatible = "arm,sp805", "arm,primecell";

Fix all users in u-boot.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
c816dd0324 arm: dts: ls1028a: update the labels
Update the labels of the nodes to match the kernel ones.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
f3f41f6c5c arm: dts: ls1028a: move the iRC node and its devices into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

While at it fix the indentation.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
575205c9cc arm: dts: ls1028a: move the watchdog node into /soc
While inserting it into the new location, keep it sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
3c5c47777c arm: dts: ls1028a: move the PCIe controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

While at it fix the indentation.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
659fafc3fd arm: dts: ls1028a: move SATA and USB controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
Michael Walle
65da65f6e2 arm: dts: ls1028a: move the GPIO controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30