Commit graph

3583 commits

Author SHA1 Message Date
Jan Kiszka
6ac9131702 iot2050: Update firmware layout
The latest version of the binary-only firmware parts come in a combined
form of FSBL and sysfw containers. This implies some layout changes to
the generated firmware image but also makes handling of artifacts much
simpler (4 files less). The env locations will not change, just the
space reserved for U-Boot will shrink from 4 to 3 MB - still plenty of
space left in practice.

Adjust configuration and documentation accordingly.

Along this change, add a new reservation for update commands of the
user-controlled OTP part. A specific userspace tool will fill it, and
the FSBL will evaluate it during boot. This reservation will use 64K of
the former sysfw section.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
Su Baocheng
ea0f45d187 board: siemens: iot2050: Split the build for PG1 and PG2
Due to different signature keys, the PG1 and the PG2 boards can no
longer use the same FSBL (tiboot3). This makes it impossible anyway to
maintaine a single flash.bin for both variants, so we can also split the
build.

A new target is added to indicates the build is for PG1 vs. PG2 boards.
Hence now the variants have separated defconfig files.

The runtime board_is_sr1() check does make no sense anymore, so remove
it and replace with build time check.

Documentation is updated accordingly. New binary artifacts are already
available via meta-iot2050.

Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[Jan: refactor config option into targets, tweak some wordings]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:25 -04:00
Tom Rini
605bc145f9 Merge branch 'master' into next 2023-03-27 15:19:57 -04:00
Tom Rini
41a88ad529 Prepare v2023.04-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-27 14:23:26 -04:00
Simon Glass
f1d87db49b x86: minnowmax: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Add documentation on how to make this change safely.

Fixes: 66e2c665f3 ("x86: minnowmax: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Tom Rini
fde439219f Pull request for efi-next-20230325
Documenation:
 
 * add man-page for efi command
 
 UEFI:
 
 * Let EFI app call ExitBootServices() before legacy booting kernel
 * Support zboot and bootm in the EFI app
 * Let efi command show configuration tables
 * Support booting a 64-bit kernel from 64-bit EFI app
 * Allocate device-tree copy from high memory
 * simplify efi_str_to_u16()
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Merge tag 'efi-next-20230325' of https://source.denx.de/u-boot/custodians/u-boot-efi into next

Pull request for efi-next-20230325

Documenation:

* add man-page for efi command

UEFI:

* Let EFI app call ExitBootServices() before legacy booting kernel
* Support zboot and bootm in the EFI app
* Let efi command show configuration tables
* Support booting a 64-bit kernel from 64-bit EFI app
* Allocate device-tree copy from high memory
* simplify efi_str_to_u16()
2023-03-25 17:34:34 -04:00
Simon Glass
1d32eee4fa efi: Support showing tables
Add a command (for the app and payload) to display the tables provided
by EFI. Note that for the payload the tables should always be present, so
an error message is unnecessary and would bloat the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:22 +01:00
Simon Glass
30c9646eff doc: Add help for the efi command
This command currently has no help. Add some.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:22 +01:00
Pali Rohár
2a3bbced71 doc/kwboot.1: Update Armada 38x BootROM bug description
Replace SPI-NOR by default boot source location as bug is not SPI-NOR related.

Signed-off-by: Pali Rohár <pali@kernel.org>
2023-03-24 13:11:47 +01:00
Fabio Estevam
45156edb16 README.mpc85xx-sd-spi-boot: Suggest the NXP boot format github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/qoriq/qoriq-yocto-sdk/boot-format:

"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."

Point to the NXP boot format github repo instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2023-03-22 12:51:02 -04:00
Rasmus Villemoes
2bec548052 doc: document read/write commands
The read and write commands are, deliberately, implemented in the same
file, so that they stay feature-compatible (e.g. if someone implements
support for "read the full partition, however large that is", that
same syntax should also work for write). In order to ensure the
documentation for both are similarly kept in sync, and to avoid
duplication, document them both in read.rst, and add a stub write.rst
referring to read.rst.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-17 16:10:42 -04:00
Tom Rini
a5faa4a9eb Prepare v2023.04-rc4
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Merge tag 'v2023.04-rc4' into next

Prepare v2023.04-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-14 12:06:35 -04:00
Tom Rini
88e08fc5f6 Prepare v2023.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-13 20:52:48 -04:00
Heinrich Schuchardt
5ee8d90f54 doc: man-page for panic command
Provide a man-page for the panic command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-13 13:56:14 +01:00
Vincent Stehlé
ac2ac69080 doc: uefi: fix links
Fix a couple of links so that they are rendered correctly with sphinx.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-03-13 13:56:14 +01:00
Simon Glass
4f806f31fc bootflow: Rename bootflow_flags_t
These flags actually relate to the iterator, not the bootflow struct
itself. Rename them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-08 11:40:49 -08:00
Simon Glass
bfb708ad99 buildman: Add a flag for reproducible builds
This is quite a useful thing to use when building since it avoids small
size changes between commits. Add a -r flag for it.

Also undefine CONFIG_LOCALVERSION_AUTO since this appends the git hash
to the version string, causing every build to be slightly different.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-08 11:38:48 -08:00
Chunfeng Yun
ea436dbc40 dt-bindings: usb: mtk-xhci: add support mt8195
Add a new compatible for mt8195 to add a workaround for hardware
issue.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2023-03-02 22:43:44 +01:00
Chunfeng Yun
b5e8e12c04 dt-bindings: phy-mtk-tphy: add support mt8195
Add a new compatible for mt8195 to add a workaround for hardware
issue.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2023-03-02 22:43:43 +01:00
Pali Rohár
1dbeade84e doc/kwboot.1: Update example description
Mention fact about changing baudrate back when -B is used.

Signed-off-by: Pali Rohár <pali@kernel.org>
2023-03-01 06:39:18 +01:00
Pali Rohár
4bf91e2203 cmd: mvebu/bubt: Add support for reading image from the SATA disk partition
This change allows to load boot image from the first SATA/SCSI device
partition and burn it to board boot location (e.g. SPI-NOR). This is
particularly when storage device is not handled by U-Boot as USB mass
storage (which is already supported by bubt) but as SATA/SCSI device.

Signed-off-by: Pali Rohár <pali@kernel.org>
2023-03-01 06:39:17 +01:00
Pali Rohár
c8f5009029 cmd: mvebu/bubt: Add support for writing image to SATA disk
All 32-bit Armada SoCs and also 64-bit Armada 3720 SoC can load and boot
firmware from SATA disk. This adds support for updating firmware binary for
these SoCs. On 32-bit Armada SoC is firmware stored at sector 1 and on
Armada 3720 is stored at MBR partition 0x4d or GPT partition with type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE (Marvell Armada 3700 Boot partition).

Signed-off-by: Pali Rohár <pali@kernel.org>
2023-03-01 06:39:17 +01:00
Pali Rohár
fc10a926ec cmd: mvebu/bubt: Add support for selecting eMMC HW partition
Support for burning into the correct eMMC HW boot partition was broken and
removed in commit 96be2f0727 ("mvebu: bubt: Drop dead code"). Reimplement
this functionality and bring it back again.

Fixes: 96be2f0727 ("mvebu: bubt: Drop dead code")
Signed-off-by: Pali Rohár <pali@kernel.org>
2023-03-01 06:39:17 +01:00
Eugen Hristev
3bf8e40807 board: rockchip: add Radxa ROCK5B Rk3588 board
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa.

There are tree variants depending on the DRAM size : 4G, 8G and 16G.

Specification:

    Rockchip Rk3588 SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    4/8/16GB memory LPDDR4x
    Mali G610MC4 GPU
    MIPI CSI 2 multiple lanes connector
    eMMC module connector
    uSD slot (up to 128GB)
    2x USB 2.0, 2x USB 3.0
    2x HDMI output, 1x HDMI input
    Ethernet port
    40-pin IO header including UART, SPI, I2C and 5V DC power in
    USB PD over USB Type-C
    Size: 85mm x 54mm

Kernel commits:
a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board")
6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b")

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:29 +08:00
Jagan Teki
15b2d1fb72 board: rockchip: Add Edgeble Neural Compute Module 6
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.

General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC

On module WiFi6/BT5 is available in the following Neu6 variants.

Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.

IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.

Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.

Boot log for the record,

DDR Version V1.08 20220617
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
Manufacturer ID:0x6
CH0 RX Vref:31.7%, TX Vref:21.8%,21.8%
CH1 RX Vref:30.7%, TX Vref:22.8%,23.8%
CH2 RX Vref:30.7%, TX Vref:22.8%,22.8%
CH3 RX Vref:30.7%, TX Vref:21.8%,21.8%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out

U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)
Trying to boot from MMC1
INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-391-g856309329:derrick.huang
NOTICE:  BL31: Built : 14:15:50, Jul 18 2022
INFO:    ext 32k is not valid
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    system boots from cpu-hwid-0
INFO:    idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO:    dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO:    dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO:    dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO:    dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO:    BL31: Initialising Exception Handling Framework
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0xa00000
INFO:    SPSR = 0x3c9

U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)

Model: Edgeble Neu6A IO Board
DRAM:  7.5 GiB (effective 3.7 GiB)
Core:  71 devices, 15 uclasses, devicetree: separate
MMC:   mmc@fe2c0000: 0
Loading Environment from nowhere... OK
In:    serial@feb50000
Out:   serial@feb50000
Err:   serial@feb50000
Model: Edgeble Neu6A IO Board
Net:   No ethernet found.
Hit any key to stop autoboot:  0
=>

Add support for Edgeble Neu6 Model A IO Board.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Chris Morgan
9b78a98ee5 evb-rk3568: Update MAINTAINERS and documentation
Update the MAINTAINERS file to include the devicetree for the
rk3568-evb1-v10 board.

Also update Rockchip board docs to include information on building
RK3568 based devices.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Jonas Karlman
4773e9d5ed rockchip: Use an external TPL binary on RK3568
Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps
back to BootRom to load next stage, U-Boot SPL, into DRAM. BootRom then
jumps to U-Boot SPL to continue the normal boot flow.

However, there is no support to initialize DRAM on RK35xx SoCs using
U-Boot TPL and instead an external TPL binary must be used to generate a
bootable u-boot-rockchip.bin image.

Add CONFIG_ROCKCHIP_EXTERNAL_TPL to indicate that an external TPL should
be used. Build U-Boot with ROCKCHIP_TPL=/path/to/ddr.bin to generate a
bootable u-boot-rockchip.bin image for RK3568.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-02-28 18:07:26 +08:00
Tom Rini
5b197eee33 Prepare v2023.04-rc3
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Merge tag 'v2023.04-rc3' into next

Prepare v2023.04-rc3
2023-02-27 17:28:21 -05:00
Tom Rini
e8c80ac0f7 Prepare v2023.04-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-27 17:18:36 -05:00
Tom Rini
0024e7f72b Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra 2023-02-23 17:40:18 -05:00
Svyatoslav Ryhel
5a8fe1ee81 ARM: tegra20: implement BCT patching
This function allows updating bootloader from u-boot
on production devices without need in host PC.

Be aware! It works only with re-crypt BCT.

Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Signed-off-by: Ramin Khonsari <raminterex@yahoo.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23 12:55:37 -07:00
Heinrich Schuchardt
5e957ae350 doc: remove superfluous warning
We have been using Sphinx >=3 since 2020. We don't expect issues.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-02-19 21:34:38 +01:00
Yu Chien Peter Lin
093ff96e74 doc: arch: Add document for RISC-V architecture
This patch adds a brief introduction to the RISC-V architecture and
the typical boot process used on a variety of RISC-V platforms.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-02-19 21:15:15 +01:00
Tim Harvey
98382917d7 board: gateworks: venice: move README to RST
Move board/gateworks/venice/README to RST documentation.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-02-19 21:15:15 +01:00
Thomas Fitzsimmons
34a1fee756 doc: board: bcm7xxx: Convert to reStructuredText format
Convert the documentation for the Broadcom BCM7445 and BCM7260 boards
to reStructuredText format and add the new filename to
doc/board/broadcom/index.rst.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-02-19 21:15:15 +01:00
Yu Chien Peter Lin
8c8153ead2 doc: devicetree: dt_qemu.rst: Fix the typo and space
Fix typo and whitespace in the document.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-02-19 21:15:15 +01:00
Leo Yu-Chi Liang
8900e2bbec riscv: Rename Andes cpu and board names
The current ae350-related defconfigs could also
support newer Andes CPU IP, so modify the names of CPU
from ax25 to andesv5, and board name from ax25-ae350 to ae350.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17 19:07:48 +08:00
Simon Glass
ea4299a213 dm: doc: Update documentation for new driver model schema
Now that Linux has accepted these tags, move U-Boot over to use them.
Tidy up the comments and formatting, making sure that VPL is mentioned
too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:27 -07:00
Simon Glass
c8ef3eed61 dm: doc: Update device tree binding docs for new schema
Now that Linux has accepted these tags, move U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:27 -07:00
Simon Glass
7703efbc99 schemas: Add schema for U-Boot driver model 'phase tags'
U-Boot has some particular challenges with device tree and devices:

- U-Boot has multiple build phases, such as a Secondary Program Loader
  (SPL) phase which typically runs in a pre-SDRAM environment where code
  and data space are limited. In particular, there may not be enough
  space for the full device tree blob. U-Boot uses various automated
  techniques to reduce the size from perhaps 40KB to 3KB. It is not
  always possible to handle these tags entirely at build time, since
  U-Boot proper must have the full device tree, even though we do not
  want it to process all nodes until after relocation.
- Some U-Boot phases needs to run before the clocks are properly set up,
  where the CPU may be running very slowly. Therefore it is important to
  bind only those devices which are actually needed in that phase
- U-Boot uses lazy initialisation for its devices, with 'bind' and
  'probe' being separate steps. Even if a device is bound, it is not
  actually probed until it is used. This is necessary to keep the boot
  time reasonable, e.g. to under a second

The phases of U-Boot in order are: TPL, VPL, SPL, U-Boot (first
pre-relocation, then post-relocation). ALl but the last two are optional.

For the above reasons, U-Boot only includes the full device tree in the
final 'U-Boot proper' build. Even then, before relocation U-Boot only
processes nodes which are marked as being needed.

For this to work, U-Boot's driver model[1] provides a way to mark device
tree nodes as applicable for a particular phase. This works by adding a
tag to the node, e.g.:

   cru: clock-controller@ff760000 {
      bootph-all;
      compatible = "rockchip,rk3399-cru";
      reg = <0x0 0xff760000 0x0 0x1000>;
      rockchip,grf = <&grf>;
      #clock-cells = <1>;
      #reset-cells = <1>;
      ...
   };

Here the "bootph-all" tag indicates that the node must be present in all
phases, since the clock driver is required.

There has been discussion over the years about whether this could be done
in a property instead, e.g.

   options {
      bootph-all = <&cru> <&gpio_a> ...;
      ...
   };

Some problems with this:

- we need to be able to merge several such tags from different .dtsi files
  since many boards have their own specific requirements
- it is hard to find and cross-reference the affected nodes
- it is more error-prone
- it requires significant tool rework in U-Boot, including fdtgrep and
  the build system
- is harder (slower, more code) to process since it involves scanning
  another node/property to find out what to do with a particular node
- we don't want to add phandle arguments to the above since we are
  referring, e.g., to the clock device as a whole, not a paricular clock
- the of-platdata feature[2], which converts device tree to C for even
  more constrained environments, would need to become aware of the
  /options node

There is also the question about whether this needs to be U-Boot-specific,
or whether the tags could be generic. From what I can tell, U-Boot is the
only bootloader which seriously attempts to use a runtime device tree in
all cases. For this version, an attempt is made to name the phases in a
generic manner.

It should also be noted that the approach provided here has stood the test
of time, used in U-Boot for 8 years so far.

So add the schema for this. This will allow a major class of schema
exceptions to be dropped from the U-Boot source tree.

This has been applied upstream[3]

[1] https://u-boot.readthedocs.io/en/latest/develop/driver-model/index.html
[2] https://u-boot.readthedocs.io/en/latest/develop/driver-model/of-plat.html
[3] https://github.com/devicetree-org/dt-schema/commit/63bd847

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:42:14 -07:00
Tom Rini
faac9dee8e Prepare v2023.04-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-13 18:39:15 -05:00
Pei Yue Ho
8511a7fc85 dt-bindings: i2c: i2c-cdns.txt: Add description for an optional parameter, fifo-depth
Add description for fifo-depth parameter that can be used
in the device tree.

Signed-off-by: Pei Yue Ho <peiyue.ho@starfivetech.com>
Reviewed-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Eng Lee Teh <englee.teh@starfivetech.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-02-13 09:58:15 +01:00
Simon Glass
e46b72436c trace: Update documentation
Revamp the documentation for the new features, including a description of
the new features and documentation for the trace command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-11 12:22:35 -05:00
Tom Rini
c34009d5a9 Pull request for efi-2023-04-rc2
Documentation:
 
 * Provide page with links to talks on U-Boot
 
 UEFI:
 
 * Enable CTRL+S to save the boot order in eficonfig command
 * Run attribute check for QueryVariableInfo() only for the file store
 * Bug fixes
 
 Others:
 
 * Improve output formatting of the coninfo command
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Merge tag 'efi-2023-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023-04-rc2

Documentation:

* Provide page with links to talks on U-Boot

UEFI:

* Enable CTRL+S to save the boot order in eficonfig command
* Run attribute check for QueryVariableInfo() only for the file store
* Bug fixes

Others:

* Improve output formatting of the coninfo command

# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 10 Feb 2023 12:15:45 PM EST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
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# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4
2023-02-10 13:45:15 -05:00
Thomas Fitzsimmons
01065043ad arm: bcm7xxx: Convert to DM_SERIAL
Remove ns16550 configuration from header files.  Document
DM_SERIAL-required prior stage device tree configuration.
2023-02-10 11:24:08 -05:00
Masahisa Kojima
45f5319fa6 menu: remove CTRL+C to quit
On the sandbox called without "--terminal raw" CTRL+C leaves U-Boot,
"ESC/CTRL+C to quit" is misleading.

Let's remove CTRL+C to quit key handling from bootmenu and eficonfig menu.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-02-10 13:05:39 +01:00
Simon Glass
8ad7cfec37 doc: Link to some useful talks
Talks are a great way to learn about U-Boot and have been lost now that
the Denx Wiki has gone away.

These are stored at elinux.org so link to that .

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2023-02-10 13:05:39 +01:00
Heinrich Schuchardt
67835c2090 doc: complete setexpr configuration information
Add missing information to the configuration section of the setexpr
man-page.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-10 13:05:39 +01:00
Linus Walleij
41a29f284c cmd: Add a SEAMA image load command
Add a command to load SEAMA (Seattle Image), a NAND flash
on-flash storage format.

This type of flash image is found in some D-Link routers such
as DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L, DIR890L and
DCH-M225, as well as in WD and NEC routers on the ath79
(MIPS), Broadcom BCM53xx, and RAMIPS platforms.

This U-Boot command will read and decode a SEAMA image from
raw NAND flash on any platform. As it is always using big endian
format for the data decoding is always necessary on platforms
such as ARM.

The command is needed to read a SEAMA-encoded boot image on the
D-Link DIR-890L router for boot from NAND flash in an upcoming
port of U-Boot to the Broadcom Northstar (BCM4709, BCM53xx)
architecture.

A basic test and documentation is added as well. The test must
be run on a target with NAND flash support and at least one
resident SEAMA image in flash.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-06 17:10:15 -05:00
Simon Glass
22353fa6b5 bootstd: Add some default filesystems and commands
We need to support a basic set of filesystems for booting to work in most
cases. Add these in via a new option, letting the board disable them
individually (for space reasons) if desired.

This enables the filesystem commands as well as the actual functionality,
even though bootstd is quite happy to use ext4 without the ext4 command.
Further work would be needed to disintangle this and reduce code size.

Add several other options as well, providing sensible defaults.

We cannot enable this by default, since it expands the size of many
boards quite a lot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-06 13:04:53 -05:00