Commit graph

86191 commits

Author SHA1 Message Date
Heinrich Schuchardt
b54477ff8b test: fix pylint warning for capsule tests
Fix pylint warnings like:

* Class inherits from object
* Missing module description
* Missing class description
* First line of comment blank
* Superfluous imports

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-04-21 08:50:35 +02:00
Heinrich Schuchardt
4bccbd32fb efi_loader: remove unused efi_capsule_authenticate
Remove an unused implementation of efi_capsule_authenticate().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-04-21 08:50:35 +02:00
Heinrich Schuchardt
8626ef32e9 doc: codingstyle: Python coding style
Indicate that we follow PEP8 and PEP257.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-21 08:50:35 +02:00
Samuel Holland
04d16be554 riscv: Support CONFIG_REMAKE_ELF
Add flags to tell objcopy what kind of ELF to create.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2023-04-20 20:45:08 +08:00
Bin Meng
9a6569a043 riscv: Update alignment for some sections in linker scripts
Some sections in the linker scripts are aligned to 4 bytes, which
may cause misaligned exception on some platforms, e.g.: clearing
the bss section on 64-bit hardware if __bss_start does not start
from a naturally 8 bytes aligned address.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
3f37baae83 riscv: spl: Remove relocation sections
U-Boot SPL is not relocable. Drop these relocation sections.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
3c09ac2c58 riscv: Avoid updating the link register
board_init_r does not return for U-Boot SPL hence there is no need
to update the link register when jumping to board_init_r.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
485f593079 riscv: Change to use positive offset to access relocation entries
The codes currently skip the very first relocation entry, and have
an inaccurate comment "skip first reserved entry" indicating that
the first entry is reserved, but later it references the elements
in the first relocation entry using a minus offset.

Change to use a positive offset so that there is no need to skip
the first relocation entry.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
d7abc0f819 makefile: riscv: Drop useless argument of prelink-riscv
The argv[2] is never used in prelink-riscv. Drop it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
781a0308f4 tools: prelink-riscv: Unmap the ELF image when done
The codes forget to call munmap() to unmap the ELF image that was
mapped by previous mmap().

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
fb3cc482da tools: prelink-riscv: Cosmetic style fixes
Some coding convention fixes.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
0b1a3a22de riscv: Optimize loading relocation type
't5' already contains relocation type so don't bother reloading it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
883f553e6b riscv: Optimize source end address calculation in start.S
The __bss_start is the source end address hence load its address
directly into register 't2' for optimization.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
db9a7e51bf riscv: Enforce DWARF4 output
Since commit 409e4b5478 ("Makefile: Enforce DWARF4 output") the
whole U-Boot build switched to enforce DWARF4 output, but RISC-V
is still on its own setting. Let's switch to use U-Boot's setting.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-04-20 20:45:08 +08:00
Bin Meng
16f53be076 riscv: Correct a comment in io.h
Replace NDS32 with RISC-V in the comments.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-04-20 20:45:08 +08:00
Yanhong Wang
0eff3bf176 configs: starfive: add starfive_visionfive2_defconfig
This is the initial basic config for StarFive VisionFive v2 board. It
includes consol, Norflash, sdio, ddr etc.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 20:45:08 +08:00
Yanhong Wang
f2d52446bc riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree
Add initial device tree for StarFive VisionFive v2 board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 20:45:08 +08:00
Yanhong Wang
c04dfc7ac1 riscv: dts: jh7110: Add initial u-boot device tree
Add initial u-boot device tree for the JH7110 RISC-V SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 20:45:07 +08:00
Yanhong Wang
9087a6ae79 riscv: dts: jh7110: Add initial StarFive JH7110 device tree
Add initial device tree for the JH7110 RISC-V SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:45 +08:00
Yanhong Wang
331ad93c12 board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig
Add board support for StarFive VisionFive v2.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:45 +08:00
Yanhong Wang
6f902b85b6 board: starfive: Add Kconfig for StarFive VisionFive v2 Board
Add Kconfig to select the basic functions for StarFive VisionFive v2 Board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
2f5fad0b0d riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC
Add Kconfig to select the basic functions for StarFive JH7110 SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
5ecf9b0b8a board: starfive: add StarFive VisionFive v2 board support
Add board support for StarFive VisionFive v2.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
60abbadfc0 ram: starfive: add ddr driver
Add driver for StarFive JH7110 to support ddr initialization in SPL.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Kuan Lim Lee
732f01aabf pinctrl: starfive: Add StarFive JH7110 driver
Add pinctrl driver for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Jianlong Huang
d60f384938 dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Add pinctrl definitions for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
c13fe7c034 clk: starfive: Add StarFive JH7110 clock driver
Add a DM clock driver for StarFive JH7110 SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
58c9c60b64 dt-bindings: clock: Add StarFive JH7110 clock definitions
Add all clock outputs for the StarFive JH7110 clock generator.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
d13de4faaf reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC
Add a DM reset driver for StarFive JH7110 SoC.

Note that the register base address of reset controller is the
same with the clock controller. Therefore, there is no device
tree node alone for reset driver.It binds device node in
the clock driver

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
c10483045e dt-bindings: reset: Add StarFive JH7110 reset definitions
Add resets for the StarFive JH7110 system(SYS),system-top-group(STG) and
always-on(AON) reset controller.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
22c2402737 cache: starfive: Add StarFive JH7110 support
This adds support for the StarFive JH7110 SoC which also
feature this SiFive cache controller.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
218534153e riscv: cpu: jh7110: Add support for jh7110 SoC
Add StarFive JH7110 SoC to support RISC-V arch.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Patrick Delaunay
0d5bd362f6 configs: stm32mp15: set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s
With some USB devices connected on USB HUB for the STMicroelectronics
boards, set the usb_pgood_delay=2 is not enough to ensure a correct
detection for all cases; but it is solved with USB_HUB_DEBOUNCE_TIMEOUT=2s.

For example, issue encountered with the USB flash disk:
    ID 058f:6387 Alcor Micro Corp. Flash Drive

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-19 10:10:17 +02:00
Rasmus Villemoes
daf07215e8 stm32mp: fix various array bounds checks
In all these cases, the index on the LHS is immediately afterwards
used to access the array appearing in the ARRAY_SIZE() on the RHS - so
if that index is equal to the array size, we'll access
one-past-the-end of the array.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-19 10:02:28 +02:00
Christophe Kerello
bb03520098 mtd: rawnand: stm32_fmc2: remove unsupported EDO mode
Remove the EDO mode support from as the FMC2 controller does not
support the feature.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-19 10:01:42 +02:00
Christophe Kerello
fa998c8aea ARM: dts: stm32: add FMC support on STM32MP13x SoC family
Add FMC support on STM32MP13x SoC family.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-19 09:59:36 +02:00
Patrick Delaunay
d6fe59b781 configs: stm32mp15: increase malloc size for pre-reloc
The early malloc usage increased so the associated defined
CONFIG_SYS_MALLOC_F_LEN need to be increased.

For example, for stm32mp15_defconfig and
stm32mp157c-dk2-scmi.dtsi, we have:

Early malloc usage: 280b8 / 80000

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-19 09:54:54 +02:00
Patrice Chotard
acf9f03634 spi: stm32_qspi: Remove useless struct stm32_qspi_flash
Currently, in stm32_qspi_claim_bus(), QSPI_CR and QSPI_DCR registers
are saved in stm32_ospi_flash struct on first flash memory initialization
and restored on each flash accesses.

As the logic of spi-uclass.c changed since 'commit 741280e9ac
("spi: spi-uclass: Fix spi_claim_bus() speed/mode setup logic")'
set_speed() and set_mode() callbacks are called systematically when bus
speed or bus mode need to be updated, QSPI_CR and QSPI_DCR registers are
set accordingly.

So stm32_qspi_claim_bus() can be updated by removing QSPI_CR and QSPI_DCR
save/restore code and struct stm32_ospi_flash can be removed as well.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-19 09:52:42 +02:00
Patrice Chotard
60edabc0a3 ARM: dts: stm32: Add QSPI support on STM32MP13x SoC family
Add QSPI support on STM32MP13x SoC family

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-19 09:51:49 +02:00
Patrice Chotard
bff0d846c7 pinctrl: pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing()
For debug purpose, it should be useful to indicate the slew rate for
each pins.
Add ospeed register information for pins which are configured in
either alternate function or gpio output.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-19 09:50:32 +02:00
Patrice Chotard
ac31663c9c configs: stm32mp13: Increase usb_pgood_delay for ST boards
With some USB device, the current usb_pgood_delay value is not long
enough to ensure a correct detection.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-19 09:45:34 +02:00
Patrice Chotard
7950b1dcf1 configs: stm32mp15: Add usb_pgood_delay for ST boards
Add usb_pgood_delay to ensure a correct detection of USB devices.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-19 09:45:33 +02:00
Lionel Debieve
0d5990a242 watchdog: arm_smc_wdt: add watchdog support
Implement a ARM SMCCC based driver that allow to use
a secure watchdog on the platform.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-18 08:42:43 +02:00
Sergei Antonov
6e44bb0c10 watchdog: ftwdt010: return a previously deleted driver now ported to DM
The ftwdt010 watchdog driver was deleted by
commit 11232139e3 ("nds32: Remove the architecture")

Return it to the codebase in a DM compatible form. Enable it in
sandbox_defconfig to test compilability.
Another platform using ftwdt010 will be submitted later.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-04-18 08:42:43 +02:00
ETIENNE DUBLE
89c4fecd9b watchdog: Add a watchdog driver for Raspberry Pi boards
This driver supports the bcm2835 watchdog found on
Raspberry Pi boards.
It is derived from the Linux driver and was tested
on two Raspberry Pi board versions (B+ and 3B+).

Signed-off-by: Etienne Dublé <etienne.duble@imag.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-04-18 08:42:43 +02:00
Tom Rini
454712f67c - Add initial support for BPI-CM4
- Spring Cleanup of Amlogic board documentation
 - add support for BananaPi M2-Pro
 - add support for BananaPi M2S
 - add support for Radxa Zero2
 - add support for WeTek Hub and WeTek Play2
 - switch LibreTech-CC v2 and WeTek Core2 to EE powerdomain
 - add support for Beelink GT1 Ultimate
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Merge tag 'u-boot-amlogic-20230417' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Add initial support for BPI-CM4
- Spring Cleanup of Amlogic board documentation
- add support for BananaPi M2-Pro
- add support for BananaPi M2S
- add support for Radxa Zero2
- add support for WeTek Hub and WeTek Play2
- switch LibreTech-CC v2 and WeTek Core2 to EE powerdomain
- add support for Beelink GT1 Ultimate
2023-04-17 16:32:17 -04:00
Tom Rini
5db4972a5b Pull request for u-boot-nand-20230417
The first two patches are by Frieder Schrempf who joins as a reviewer for
 the SPI NAND framework and drivers.
 
 The following 2 patches are by Linus Walleij and are taken by the series
 "Add Broadcom Northstar basic support".
 
 Bin Meng makes static a list for octeontx.
 
 Francesco Dolcini specifies MTD partitions on command line for
 colibri-{imx6ull,imx7}.
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Merge tag 'u-boot-nand-20230417' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash

Pull request for u-boot-nand-20230417

The first two patches are by Frieder Schrempf who joins as a reviewer for
the SPI NAND framework and drivers.

The following 2 patches are by Linus Walleij and are taken by the series
"Add Broadcom Northstar basic support".

Bin Meng makes static a list for octeontx.

Francesco Dolcini specifies MTD partitions on command line for
colibri-{imx6ull,imx7}.
2023-04-17 10:47:33 -04:00
Karl Chan
411d6af8b6 doc: boards: amlogic: add documentation for Beelink GT1 Ultimate
Add build instructions for the Beelink GT1 Ultimate board.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Karl Chan <exxxxkc@getgoogleoff.me>
Link: https://lore.kernel.org/r/8760391a-3506-5ac5-8d55-92c23cccff44@yahoo.com
[narmstrong: fixed MAINTAINERS indentation, added doc to index]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17 11:06:08 +02:00
Karl Chan
67197e0a07 boards: amlogic: add Beelink GT1 Ultimate defconfig
Add configuration for the Beelink GT1 Ultimate board.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Karl Chan <exxxxkc@getgoogleoff.me>
Link: https://lore.kernel.org/r/e3c87efd-4ac1-24a7-503d-71669aae5177@yahoo.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17 11:06:08 +02:00
Karl Chan
00b3a0b872 ARM: dts: add support for Beelink GT1 Ultimate
Import the device-tree from linux-amlogic/for-next (Linux 6.3-rc1).

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Karl Chan <exxxxkc@getgoogleoff.me>
Link: https://lore.kernel.org/r/f5a8db4e-b2d0-e00a-cc4f-01a4f794c761@yahoo.com
[narmstrong: fixed imported dt file]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17 11:06:08 +02:00