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riscv: Optimize loading relocation type

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't5' already contains relocation type so don't bother reloading it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This commit is contained in:
Bin Meng 2023-04-13 14:20:01 +08:00 committed by Leo Yu-Chi Liang
parent 883f553e6b
commit 0b1a3a22de
1 changed files with 0 additions and 1 deletions
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arch/riscv/cpu/start.S
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@ -323,7 +323,6 @@ fix_rela_dyn:
add t4, t4, t6
9:
LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */
srli t0, t5, SYM_INDEX /* t0 <--- sym table index */
andi t5, t5, 0xFF /* t5 <--- relocation type */
li t3, RELOC_TYPE