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watchdog: arm_smc_wdt: add watchdog support
Implement a ARM SMCCC based driver that allow to use a secure watchdog on the platform. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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@ -361,6 +361,14 @@ config WDT_TANGIER
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Intel Tangier SoC. If you're using a board with Intel Tangier
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SoC, say Y here.
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config WDT_ARM_SMC
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bool "ARM SMC watchdog timer support"
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depends on WDT && ARM_SMCCC
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imply WATCHDOG
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help
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Select this to enable Arm SMC watchdog timer. This watchdog will manage
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a watchdog based on ARM SMCCC communication.
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config SPL_WDT
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bool "Enable driver model for watchdog timer drivers in SPL"
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depends on SPL_DM
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@ -18,6 +18,7 @@ obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
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obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
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obj-$(CONFIG_WDT_ALARM_SANDBOX) += sandbox_alarm-wdt.o
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obj-$(CONFIG_WDT_APPLE) += apple_wdt.o
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obj-$(CONFIG_WDT_ARM_SMC) += arm_smc_wdt.o
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obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
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obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
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obj-$(CONFIG_WDT_AST2600) += ast2600_wdt.o
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123
drivers/watchdog/arm_smc_wdt.c
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123
drivers/watchdog/arm_smc_wdt.c
Normal file
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@ -0,0 +1,123 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* ARM Secure Monitor Call watchdog driver
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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* This file is based on Linux driver drivers/watchdog/arm_smc_wdt.c
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*/
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#define LOG_CATEGORY UCLASS_WDT
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <linux/arm-smccc.h>
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#include <linux/psci.h>
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#include <wdt.h>
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#define DRV_NAME "arm_smc_wdt"
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#define WDT_TIMEOUT_SECS(TIMEOUT) ((TIMEOUT) / 1000)
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enum smcwd_call {
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SMCWD_INIT = 0,
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SMCWD_SET_TIMEOUT = 1,
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SMCWD_ENABLE = 2,
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SMCWD_PET = 3,
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SMCWD_GET_TIMELEFT = 4,
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};
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struct smcwd_priv_data {
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u32 smc_id;
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unsigned int min_timeout;
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unsigned int max_timeout;
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};
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static int smcwd_call(struct udevice *dev, enum smcwd_call call,
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unsigned long arg, struct arm_smccc_res *res)
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{
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struct smcwd_priv_data *priv = dev_get_priv(dev);
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struct arm_smccc_res local_res;
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if (!res)
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res = &local_res;
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arm_smccc_smc(priv->smc_id, call, arg, 0, 0, 0, 0, 0, res);
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if (res->a0 == PSCI_RET_NOT_SUPPORTED)
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return -ENODEV;
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if (res->a0 == PSCI_RET_INVALID_PARAMS)
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return -EINVAL;
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if (res->a0 != PSCI_RET_SUCCESS)
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return -EIO;
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return 0;
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}
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static int smcwd_reset(struct udevice *dev)
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{
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return smcwd_call(dev, SMCWD_PET, 0, NULL);
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}
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static int smcwd_stop(struct udevice *dev)
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{
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return smcwd_call(dev, SMCWD_ENABLE, 0, NULL);
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}
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static int smcwd_start(struct udevice *dev, u64 timeout_ms, ulong flags)
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{
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struct smcwd_priv_data *priv = dev_get_priv(dev);
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u64 timeout_sec = WDT_TIMEOUT_SECS(timeout_ms);
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int err;
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if (timeout_sec < priv->min_timeout || timeout_sec > priv->max_timeout) {
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dev_err(dev, "Timeout value not supported\n");
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return -EINVAL;
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}
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err = smcwd_call(dev, SMCWD_SET_TIMEOUT, timeout_sec, NULL);
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if (err) {
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dev_err(dev, "Timeout out configuration failed\n");
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return err;
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}
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return smcwd_call(dev, SMCWD_ENABLE, 1, NULL);
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}
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static int smcwd_probe(struct udevice *dev)
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{
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struct smcwd_priv_data *priv = dev_get_priv(dev);
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struct arm_smccc_res res;
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int err;
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priv->smc_id = dev_read_u32_default(dev, "arm,smc-id", 0x82003D06);
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err = smcwd_call(dev, SMCWD_INIT, 0, &res);
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if (err < 0) {
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dev_err(dev, "Init failed %i\n", err);
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return err;
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}
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priv->min_timeout = res.a1;
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priv->max_timeout = res.a2;
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return 0;
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}
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static const struct wdt_ops smcwd_ops = {
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.start = smcwd_start,
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.stop = smcwd_stop,
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.reset = smcwd_reset,
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};
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static const struct udevice_id smcwd_dt_ids[] = {
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{ .compatible = "arm,smc-wdt" },
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{}
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};
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U_BOOT_DRIVER(wdt_sandbox) = {
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.name = "smcwd",
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.id = UCLASS_WDT,
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.of_match = smcwd_dt_ids,
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.priv_auto = sizeof(struct smcwd_priv_data),
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.probe = smcwd_probe,
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.ops = &smcwd_ops,
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};
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