Commit graph

1714 commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD
8ed2f5f950 at91: move arch-at91sam9 to arch-at91
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-12 18:41:42 +02:00
Scott Wood
e4c0950854 NAND boot: MPC8313ERDB support
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset.  I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:31 -05:00
Sergey Kubushyn
fe56a2772e NAND: Davinci driver updates
Here comes a trivial patch to cpu/arm926ejs/davinci/nand.c. Unfortunately I
don't have hardware handy so I can not test it at the moment but changes are
rather trivial so it should work. It would be nice if somebody with a
hardware checked it anyways.

Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
2008-08-12 11:31:24 -05:00
Stefan Roese
3df2ece0f0 NAND: Update 4xx NDFC driver to match updated nand subsystem
This patch changes the 4xx NAND driver ndfc.c to match the new
infrastructure from the updated NAND subsystem. This NAND
subsystem was recently synced again with the Linux 2.6.22 MTD/NAND
subsystem.

Tested successfully on AMCC Sequoia and Bamboo.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-12 11:31:23 -05:00
William Juul
5e1dae5c3d Fixing coding style issues
- Fixing leading white spaces
 - Fixing indentation where 4 spaces are used instead of tab
 - Removing C++ comments (//), wherever I introduced them

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:17 -05:00
William Juul
4cbb651b29 Remove white space at end.
Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:16 -05:00
William Juul
cfa460adfd Update MTD to that of Linux 2.6.22.1
A lot changed in the Linux MTD code, since it was last ported from
Linux to U-Boot. This patch takes U-Boot NAND support to the level
of Linux 2.6.22.1 and will enable support for very large NAND devices
(4KB pages) and ease the compatibility between U-Boot and Linux
filesystems.

This patch is tested on two custom boards with PPC and ARM
processors running YAFFS in U-Boot and Linux using gcc-4.1.2
cross compilers.

MAKEALL ppc/arm has some issues:
 * DOC/OneNand/nand_spl is not building (I have not tried porting
   these parts, and since I do not have any HW and I am not familiar
   with this code/HW I think its best left to someone else.)

Except for the issues mentioned above, I have ported all drivers
necessary to run MAKEALL ppc/arm without errors and warnings. Many
drivers were trivial to port, but some were not so trivial. The
following drivers must be examined carefully and maybe rewritten to
some degree:
 cpu/ppc4xx/ndfc.c
 cpu/arm926ejs/davinci/nand.c
 board/delta/nand.c
 board/zylonite/nand.c

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:15 -05:00
Wolfgang Denk
52b047ae48 MPC8272ADS: fix build error: 'bd_t' has no member named 'pci_clk'
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 12:10:11 +02:00
Wolfgang Denk
224f7a5679 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-08-12 11:47:54 +02:00
Wolfgang Denk
565ffbb9ee Merge branch 'master' of git://www.denx.de/git/u-boot-arm 2008-08-12 11:46:56 +02:00
Wolfgang Denk
c9c101c660 ads5121: fix compiler warnings (unused variables)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 00:36:53 +02:00
Kumar Gala
902ca09246 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS
Use CONFIG_NUM_CPUS to match existing define used by 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-12 00:09:29 +02:00
Becky Bruce
2d0daa0361 POWERPC 86xx: Move BAT setup code to C
This is needed because we will be possibly be locating
devices at physical addresses above 32bits, and the asm
preprocessing does not appear to deal with ULL constants
properly. We now call write_bat in lib_ppc/bat_rw.c.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-11 23:53:59 +02:00
Magnus Lilja
5276a3584d i.MX31: Fix mx31_gpio_mux() function and MUX_-macros.
Correct the mx31_gpio_mux() function to allow changing all i.MX31 IOMUX
contacts instead of only the first 256 ones as is the case prior to
this patch.

Add missing MUX_* macros and update board files to use the new macros.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-08-11 23:33:57 +02:00
Haavard Skinnemoen
7772c13ba0 Merge branch 'favr-32' of git://git.denx.de/u-boot-avr32
Conflicts:

	MAINTAINERS
	MAKEALL
	Makefile
2008-08-06 15:12:38 +02:00
Stefan Roese
f2302d4430 Fix merge problems
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-06 14:05:38 +02:00
Kenneth Johansson
6689484ccd mpc5121: Move iopin features from board specific to common files.
And in the process eliminate some duplicate register defines.

Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
2008-08-05 20:45:34 -06:00
John Rigby
ef11df6b66 mpc5121: squash some fdt fixup errors
On ADS5121 when booting linux the following errors are seen:
    Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND
    Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND
    Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND

This is caused by ft_cpu_setup trying to deal with
both old and new soc node naming.  This patch
fixes this by being smarter about what to
fixup.

Also do soc node fixups by compatible instead of by path.
A new board config called OF_SOC_COMPAT defined
to be "fsl,mpc5121-immr" replaces the old
OF_SOC node path that was defined to be "soc@80000000".

Old device trees still work, but the compatiblity
is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
which is on by default in include/configs/ads5121.h.

Signed-off-by: John Rigby <jrigby@freescale.com>
2008-08-05 19:58:21 -06:00
Jean-Christophe PLAGNIOL-VILLARD
4cd7e6528f nios2/sysid: fix printf warning
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:24:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
81d3f1fddd nios2: fix phys_addr_t and phys_size_t support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:19:16 +02:00
Matvejchikov Ilya
9196b44334 8260: Making the use of gd->pci_clk dependant on the CONFIG_PCI
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-31 11:35:16 +02:00
Julien May
5c374c9ee1 Add support for the hammerhead (AVR32) board
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

For more information see: http:///www.miromico.com/hammerhead

Signed-off-by: Julien May <mailinglist@miromico.ch>
[haavard.skinnemoen@atmel.com: various small fixes and adaptions]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-30 10:06:11 +02:00
Wolfgang Denk
1ca9950b46 Merge branch 'master' of git://git.denx.de/u-boot-mips 2008-07-30 01:24:07 +02:00
Adrian Filipi
7610db17fd Removed support for the adsvix board.
Support for the adsvix was originally provided by Applied Data
Systems (ADS), inc., now EuroTech, Inc.
The board never shipped aside from some sample boards.

Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
2008-07-30 00:26:03 +02:00
Wolfgang Ocker
dbd3238792 mips: Fix baudrate divisor computation on alchemy cpus
Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
on alchemy cpus.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-07-30 00:40:54 +09:00
Michal Simek
1953d128fd microblaze: Fix printf() format issues
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-07-20 23:10:34 +02:00
Stefan Roese
66fe183b1d ppc4xx: Fix incorrect MODTx setup for some DIMM configurations
This patch fixes a problem with incorrect MODTx (On Die Termination)
setup for a configuration with multiple DIMM's and multiple ranks.
Without this change Katmai was unable to boot Linux with DDR2 frequency
>= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
with DDR2 frequency = 640MHz and mem=4GB.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18 15:57:23 +02:00
Stefan Roese
60204d06ed ppc4xx: Minor coding style cleanup of Xilinx Virtex5 ml507 support
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18 12:31:25 +02:00
Ricardo Ribalda Delgado
d865fd0980 ppc4xx: CPU PPC440x5 on Virtex5 FX
-This patchs gives support for the embbedded ppc440
 on the Virtex5 FPGAs
-interrupts.c divided in uic.c and interrupts.c
-xilinx_irq.c for xilinx interrupt controller
-Include modifications propossed by  Stefan Roese

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-18 12:30:50 +02:00
Stefan Roese
42246dacf6 Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next 2008-07-17 10:41:06 +02:00
Wolfgang Denk
1d28d48e3d Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-07-15 21:37:23 +02:00
Kumar Gala
73f15a060f 85xx: Cleanup L2 cache size detection
The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:14:20 -05:00
Paul Gortmaker
71074abbe0 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq
Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs.  Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 18:56:51 -05:00
Andrew Klossner
24ef76f320 Change the temp map to ROM to align addresses to page size.
With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB.  The hardware silently truncates
them so the code happens to work.  This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 18:46:32 -05:00
Kim Phillips
06b4186c10 mpc85xx: use IS_E_PROCESSOR macro
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 17:01:34 -05:00
Kim Phillips
6b70ffb9d1 fdt: add crypto node handling for MPC8{3, 5}xxE processors
Delete the crypto node if not on an E-processor.  If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 17:01:29 -05:00
Hugo Villeneuve
85e5808e8e ARM DaVinci: Remove extern phy_t declaration by moving code to proper place
ARM DaVinci: Remove extern phy_t declaration by moving
code to proper place.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-14 23:40:55 +02:00
Kumar Gala
348753d416 Fix some more printf() format problems.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 23:01:01 +02:00
Wolfgang Denk
b880cbf207 cpu/i386/serial.c: Fix syntax errors
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 21:19:08 +02:00
Wolfgang Denk
d0ff51ba5d Code cleanup: fix old style assignment ambiguities like "=-" etc.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:19:07 +02:00
Wolfgang Denk
b64f190b7a Fix printf() format issues with sizeof_t types by using %zu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:06:35 +02:00
Stefan Roese
4b326101d6 Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next 2008-07-14 10:45:47 +02:00
Wolfgang Denk
25dbe98abb Fix some more printf() format issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-13 23:07:35 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0a5676befb Fix some more printf() format issues.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-13 16:55:00 +02:00
Marcel Ziswiler
6b760189d7 Fix build time warnings in function mmc_decode_csd()
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-07-13 15:06:52 +02:00
Hugo Villeneuve
c15947d6ce ARM: Fix for broken compilation when defining CONFIG_CMD_ELF
caused by missing dcache status/enable/disable functions.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-13 15:05:11 +02:00
Stefan Roese
068c1b77c8 ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-13 15:04:11 +02:00
Wolfgang Denk
0740ac26f4 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2008-07-13 14:44:04 +02:00
TsiChung Liew
47bf9c71ae ColdFire: Fix FB CS not setup properly for Mcf5282
Remove all CFG_CSn_RO in cpu/mcf52x2/cpu_init.c. If
CFG_CSn_RO is defined as 0, the chipselect will not
be assigned.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:59 -06:00
TsiChung Liew
bc3ccb139f ColdFire: Fix incorrect define for mcf5227x and mcf5445x RTC
Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
clock module in cpu/<cf arch>/cpu_init.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:59 -06:00
TsiChung Liew
dd08e97361 ColdFire: Fix compiling error for MCF5275
The compiling error was caused by missing a closed parentheses
in speed.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
TsiChung Liew
3b1e8ac9b4 ColdFire: Change invalid JMP to BRA caught by new v4e toolchain
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
2008-07-11 10:45:57 -06:00
TsiChung Liew
8371dc2066 ColdFire: Add -got=single param for new linux v4e toolchains
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
2008-07-11 10:45:57 -06:00
Stefan Roese
b578fb4714 ppc4xx: Fix include sequence in 4xx_pcie.c
This patch now moves common.h to the top of the inlcude list. This
is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that
the phys_size_t/phys_addr_t are defined to the correct size in this
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 15:07:23 +02:00
Stefan Roese
69e2c6d0d1 ppc4xx: Fix compile warning in 44x_spd_ddr2.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00
Stefan Roese
5de851403b ppc4xx: Rework 440GX UIC handling
This patch reworks the 440GX interrupt handling so that the common 4xx
code can be used. The 440GX is an exception to all other 4xx variants
by having the cascading interrupt vectors not on UIC0 but on a special
UIC named UICB0 (UIC Base 0). With this patch now, U-Boot references
the 440GX UICB0 when UIC0 is selected. And the common 4xx interrupt
handling is simpler without any 440GX special cases.

Also some additional cleanup to cpu/ppc4xx/interrupt.c is done.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00
Stefan Roese
d1631fe1a0 ppc4xx: Consolidate PPC4xx UIC defines
This 2nd patch now removes all UIC mask bit definition. They should be
generated from the vectors by using the UIC_MASK() macro from now on.
This way only the vectors need to get defined for new PPC's.

Also only the really used interrupt vectors are now defined. This makes
definitions for new PPC versions easier and less error prone.

Another part of this patch is that the 4xx emac driver got a little
cleanup, since now the usage of the interrupts is clearer.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00
Stefan Roese
4fb25a3db3 ppc4xx: Consolidate PPC4xx UIC defines
This patch is the first step to consolidate the UIC related defines in the
4xx headers. Move header from asm-ppc/ppc4xx-intvec.h to
asm-ppc/ppc4xx-uic.h as it will hold all UIC related defines in the next
steps.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Stefan Roese
e321801bed ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Stefan Roese
08250eb2ed ppc4xx: Fix merge problems in 44x_spd_ddr2.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Grant Erickson
1740c1bf40 ppc4xx: Add MII mode support to the EMAC RGMII Bridge
This patch adds support for placing the RGMII bridge on the
PPC405EX(r) into MII/GMII mode and allows a board-specific
configuration to specify the bridge mode at compile-time.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Grant Erickson
2e2050842e ppc4xx: Add Mnemonics for AMCC/IBM DDR2 SDRAM Controller
This patch completes the preprocessor mneomics for the IBM DDR2 SDRAM
controller registers (MODT and INITPLR) used by the
PowerPC405EX(r). The MMODE and MEMODE registers are unified with their
peer values used for the INITPLR MR and EMR registers,
respectively. Finally, a spelling typo is correct (MANUEL to MANUAL).

With these mnemonics in place, the CFG_SDRAM0_* magic numbers for
Kilauea are replaced by equivalent mnemonics to make it easier to
compare and contrast other 405EX(r)-based boards (e.g. during board
bring-up).

Finally, unified the SDRAM controller register dump routine such that
it can be used across all processor variants that utilize the IBM DDR2
SDRAM controller core. It produces output of the form:

	PPC4xx IBM DDR2 Register Dump:
		...
	        SDRAM_MB0CF[40] = 0x00006701
		...

which is '<mnemonic>[<DCR #>] = <value>'. The DCR number is included
since it is not uncommon that the DCR values in header files get mixed
up and it helps to validate, at a glance, they match what is printed
in the user manual.

Tested on:
  AMCC Kilauea/Haleakala:
  - NFS Linux Boot: PASSED
  - NAND Linux Boot: PASSED

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Feng Kan
7d30793685 ppc4xx: Add initial 460SX defines for the cpu/ppc4xx directory.
Signed-off-by: Feng Kan <fkan@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:12 +02:00
Wolfgang Denk
9b55a25369 Fix some more print() format errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 01:16:00 +02:00
Kim Phillips
4109df6f75 silence misc printf formatting compiler warnings
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-10 22:12:09 +02:00
Wolfgang Denk
4b13860e74 Merge branch 'master' of git://git.denx.de/u-boot-mpc512x 2008-07-10 22:09:39 +02:00
Martha Marx
f31c49db2a Configuration changes for ADS5121 Rev 3
ADS5121 Rev 3 board is now the default config

config targets are now

ads5121_config
    Rev 3 board with
	PCI
	M41T62 on board RTC
	512MB DRAM

ads5121_rev2_config
    Rev 2 board with
	No PCI
	256MB DRAM

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
2008-07-10 11:36:42 -06:00
Martha Marx
16bee7b0dc Consolidate ADS5121 IO Pin configuration
Consolidate ADS5121 IO Pin configuration to one file
board/ads5121/iopin.c.

Remove pin config from cpu/mpc512x/fec.c

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
2008-07-10 11:36:32 -06:00
Jon Loeliger
859f24350e Merge commit 'wd/master' 2008-07-10 12:05:32 -05:00
Stefan Roese
b002144e1d ppc4xx: Fix printf format warnings now visible with the updated format check
This patch fixes ppc4xx related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:58:06 +02:00
Stefan Roese
5d812b8b4a ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai
Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
To support such configurations, we "only" map the first 2GB via the TLB's. We
need some free virtual address space for the remaining peripherals like, SoC
devices, FLASH etc.

Note that ECC is currently not supported on configurations with more than 2GB
SDRAM. This is because we only map the first 2GB on such systems, and therefore
the ECC parity byte of the remaining area can't be written.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:14:01 +02:00
Stefan Roese
ac5ba41c22 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-07-10 09:09:45 +02:00
Wolfgang Denk
4188f04918 Minor coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-10 01:13:30 +02:00
Wolfgang Denk
40234535ee Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash 2008-07-10 00:59:04 +02:00
Marcel Ziswiler
dbab0691d2 Minor spelling fix in comment.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-07-10 00:49:37 +02:00
Scott Wood
3167c5386e NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution.
This is particularly problematic now that non-NAND-specific code is
including <nand.h>, and thus all debugging code is being compiled
regardless of whether it was requested, as reported by Scott McNutt
<smcnutt@psyent.com>.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-07-09 17:24:47 -05:00
Haavard Skinnemoen
c3bf1ad7ba mmc: Move atmel_mci driver into drivers/mmc
This makes it easier to use the driver on other platforms.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 00:05:52 +02:00
Haavard Skinnemoen
d2d54ea449 avr32: Use CONFIG_ATMEL_MCI to select the atmel_mci driver
After we move the atmel_mci driver into drivers/mmc, we can't select
it with CONFIG_MMC anymore. Introduce a new symbol specifically for
this driver so that there's no ambiguity.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 00:04:47 +02:00
Matvejchikov Ilya
0e6989b9fa FDT memory and pci node fixes for MPC8260ADS
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-09 23:57:59 +02:00
Andrew Klossner
dc4b0b38d4 Fix printf errors.
The compiler will help find mismatches between printf formats and
arguments if you let it.  This patch adds the necessary attributes to
declarations in include/common.h, then begins to correct the resulting
compiler warnings.  Some of these were bugs, e.g., "$d" instead of
"%d" and incorrect arguments.  Others were just annoying, like
int-long mismatches on a system where both are 32 bits.  It's worth
fixing the annoying errors to catch the real ones.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
2008-07-09 23:55:46 +02:00
Wolfgang Denk
9692cab76f Merge branch 'master' of git://www.denx.de/git/u-boot-net 2008-07-09 23:22:54 +02:00
Nobuhiro Iwamatsu
9e23fe0560 sh: Fix SH-boards compile error
By Cleanup out-or-tree building for some boards (.depend)
(commit:c8a3b109f07f02342d097b30908965f7261d9f15)
because filse ware changed, some SH-boards have compile error.
I revised this problem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-08 12:03:24 +09:00
Jason Jin
3473ab7372 Feed the watchdog in u-boot for 8610 board.
The watchdog on 8610 board is enabled by setting sw[6]
to on. Once enabled, the watchdog can not be disabled
by software. So feed the dog in u-boot is necessary for
normal operation.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2008-07-07 11:29:48 -05:00
Stefan Roese
7c6237b3e2 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-07-07 09:51:25 +02:00
Hugo Villeneuve
63676841ca Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.
Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.

Remove duplicate code in a if/else block in
cpu/arm926ejs/davinci/lxt972.c.
Fixed style issues.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 23:44:34 -07:00
Hugo Villeneuve
fec61431a0 Remove duplicate definitions in include/lxt971a.h.
Remove duplicate definitions in include/lxt971a.h.

Remove duplicate registers and bits definitions in
include/lxt971a.h for standard MII registers, and
use values in include/miiphy.h instead.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 23:44:34 -07:00
Wolfgang Denk
b223017f08 Merge branch 'master' of git://www.denx.de/git/u-boot-avr32 2008-07-07 00:39:43 +02:00
Wolfgang Denk
3070a9a3cb Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-07-07 00:32:47 +02:00
Michal Simek
9fea65a6c4 ppc4xx: Rename CONFIG_XILINX_ML300 to CONFIG_XILINX_405
This change helps with better handling with others
Xilinx based platform.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-06 22:39:14 +02:00
Ben Warren
dd35479a50 Add mechanisms for CPU and board-specific Ethernet initialization
This patch is the first step in cleaning up net/eth.c, by moving Ethernet
initialization to CPU or board-specific code.  Initial implementation is
only on the Freescale TSEC controller, but others will be added soon.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 00:20:59 -07:00
Wolfgang Denk
d86a0a6f7f Merge branch 'master' of ssh+git://mercury.denx.de/home/wd/git/u-boot/master
Conflicts:

	board/amirix/ap1000/serial.c
	board/exbitgen/exbitgen.c
	board/exbitgen/flash.c
	board/ml2/serial.c
	board/xilinx/ml300/serial.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-06 01:15:17 +02:00
Wolfgang Denk
c8a3b109f0 Cleanup out-or-tree building for some boards (.depend)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:49:18 +02:00
Wolfgang Denk
a30cc5a340 Cleanup: fix out-of-tree building for some boards
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:38:50 +02:00
Wolfgang Denk
461fa68d20 Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:00:14 +02:00
Esben Haabendal
ee4ae38342 mpc8260: add fdt_fixup_ethernet support
Add support for updating mac-address and local-mac-address in fdt for
all MPC8260 targets.

Signed-off-by: Esben Haabendal <eha@doredevelopment.dk>
2008-07-01 23:44:22 +02:00
Juergen Kilb
d92ea21baf i.MX31: fixed CTRL-C detection
The Register URXD contains status information in bits [15..8].
With status bit 15 set, CTRL-C was reported as 0x8003 instead
of 0x03. Therefore CTRL-C was not detected.
To solve this, bits [15..8] were masked out now.

Signed-off-by: Juergen Kilb <J.Kilb@gmx.de>
Acked-by: Felix Radensky <felix@embedded-sol.com>
2008-07-01 20:54:04 +02:00
Stefan Roese
dd1c5523d6 ppc4xx: Fix 460EX/GT PCIe port initialization
This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
this out.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-01 17:03:19 +02:00
Stefan Roese
745d8a0d3c ppc4xx: Fix 460EX errata with CPU lockup upon high AHB traffic
This patch implements a fix provided by AMCC so that the lockup upon
simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
anymore:

Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
(bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
USB 2.0 host and SATA.

This errata is not officially available yet. I'll update the comment
to add the errata number later.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-30 15:20:41 +02:00
Wolfgang Denk
e093a24762 Coding Style Cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-28 23:34:37 +02:00
Haavard Skinnemoen
341188b9cc MMC: Consolidate MMC/SD command definitions
This moves the MMC and SD Card command definitions from
include/asm/arch/mmc.h into include/mmc.h. These definitions are
given by the MMC and SD Card standards, not by any particular
architecture.

There's a lot more room for consolidation in the MMC drivers which
I'm hoping to get done eventually, but this patch is a start.

Compile-tested for all avr32 boards as well as lpc2292sodimm and
lubbock. This should cover all three mmc drivers in the tree.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-28 22:40:15 +02:00
Andre Schwarz
846f1574dd fix system config overwrite @ MPC834x and MPC8313
During 83xx setup the "System I/O configuration register high" gets
overwritten with user defined value if CFG_SICRH is defined.

Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH
must keep their reset value regardless of configuration.

On my board (using RGMII) those bits are set after reset - yet it's
unclear where they come from.

The patch keeps both bits on MPC834x and MPC8313.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-25 17:04:28 -05:00
Kim Phillips
4890246a2c mpc83xx: move CPU_TYPE_ENTRY over to processor.h
to avoid this:

cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
In file included from cpu.c:33:
/home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-25 16:34:29 -05:00
Stefan Roese
aac7a5095b ppc4xx: Fix problem in gpio_config()
As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted
left by one. So the additional shift is bogus.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-23 11:15:09 +02:00
Haavard Skinnemoen
5605ef6b58 avr32: Fix SPI portmux initialization
Use the new GPIO manipulation functions to set up the chip select lines,
and make sure both busses use GPIO for chip select control.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20 12:46:43 +02:00
Peter Ma
4688f9e34a avr32: Add GPIO manipulation functions
Adds GPIO manipulation functions for AVR32 AP7 platform.

Signed-off-by: Peter Ma <pma@mediamatech.com>
[haavard.skinnemoen@atmel.com: coding style fixup, slight simplification]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20 10:40:42 +02:00
Anatolij Gustschin
96026d42fa Fix 4xx build issue
Building for 4xx doesn't work since commit 4dbdb768:

In file included from 4xx_pcie.c:28:
include/asm/processor.h:971: error: expected ')' before 'ver'
make[1]: *** [4xx_pcie.o] Error 1

This patch fixes the problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 22:48:45 +02:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Wolfgang Denk
1a5017601f Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-06-11 22:48:09 +02:00
Wolfgang Denk
cdeb62e20d Merge branch 'master' of git://www.denx.de/git/u-boot-fdt 2008-06-11 22:30:47 +02:00
Wolfgang Denk
1730edf76c Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-06-11 22:13:07 +02:00
Wolfgang Denk
5ea67393b8 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
Conflicts:

	include/asm-ppc/fsl_lbc.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-11 21:33:16 +02:00
Kumar Gala
859a86a25c 85xx/86xx: Move to dynamic mgmt of LAWs
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-11 01:52:23 -05:00
Kumar Gala
f060054dad FSL LAW: Keep track of LAW allocations
Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-11 01:50:53 -05:00
Sergei Poselenov
740280e68c Added the upmconfig() function for 85xx.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-11 00:29:29 -05:00
Wolfgang Grandegger
6beecfbb54 MPC85xx: Beautify boot output of L2 cache configuration
The boot output is now aligned poperly with other boot output
lines, e.g.:

  FLASH: 128 MB
  L2:    512 KB enabled

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 18:22:26 -05:00
Kumar Gala
730b2fcf6f 85xx: Add setting of cache props in the device tree.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-10 18:22:25 -05:00
Kumar Gala
4dbdb7681e 85xx: expose cpu identification
The current cpu identification code is used just to return the name
of the processor at boot.  There are some other locations that the name
is useful (device tree setup).  Expose the functionality to other bits
of code.

Also, drop the 'E' suffix and add it on by looking at the SVR version
when we print this out.  This is mainly to allow the most flexible use
of the name.  The device tree code tends to not care about the 'E' suffix.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-10 18:22:25 -05:00
Gerald Van Baren
fec6d9ee7c Remove the deprecated CONFIG_OF_FLAT_TREE
Use CONFIG_OF_LIBFDT instead to support flattened device trees.  It is
cleaner, has better functionality, and is better supported.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:35 -04:00
Gerald Van Baren
589c04271d Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.

WARNING: This conversion is untested because I do not have a board to
test it on.

NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:24 -04:00
Kumar Gala
ee1e35bede 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define it
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-09 13:31:20 -05:00
Becky Bruce
3b9519fc50 MPC85xx: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-09 13:31:20 -05:00
Shinya Kuribayashi
79b51ff820 [MIPS] cpu/mips/Makefile: Split [CS]OBJS onto separate lines
Also get rid of some #ifdefs in *.c files.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-07 20:51:59 +09:00
Shinya Kuribayashi
8bde63eb3f [MIPS] Rename Alchemy processor configs into CONFIG_SOC_*
CONFIG_SOC_AU1X00

  Common Alchemy Au1x00 stuff. All Alchemy processor based machines
  need to have this config as a system type specifier.

CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200,
CONFIG_SOC_AU1500, CONFIG_SOC_AU1550

  Machine type specifiers. Each port should have one of aboves.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-07 20:51:56 +09:00
Becky Bruce
279726bd00 MPC86xx: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd to prevent us from trying to access
non-mapped memory.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-06 10:55:35 -05:00
Stefan Roese
b2815f7928 ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config options
We use upper case letters for the AMCC processor defines (like
CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and
not CONFIG_440SPe. This patch fixes the last misspelled config options.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 16:10:41 +02:00
Shinya Kuribayashi
7daf2ebe91 [MIPS] Update <asm/addrspace.h> header
- Fix traditional KSEG names
- Replace PHYSADDR with CPHYSADDR

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Shinya Kuribayashi
5f64d21c9a [MIPS] Kill unused <version.h> inclusions
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Grant Erickson
22f371b630 PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-06-03 21:22:26 +02:00
Hans-Christian Egtvedt
60445cb5c3 atmel_spi: Driver for the Atmel SPI controller
This adds a driver for the SPI controller found on most AT91 and AVR32
chips, implementing the new SPI API.

Changed in v4:
  - Update to new API
  - Handle zero-length transfers appropriately. The user may send a
    zero-length SPI transfer with SPI_XFER_END set in order to
    deactivate the chip select after a series of transfers with chip
    select active. This is useful e.g. when polling the status
    register of DataFlash.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-03 20:30:05 +02:00
Haavard Skinnemoen
d255bb0e78 SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
  * spi_cs_activate(): Activates the chipselect for a given slave
  * spi_cs_deactivate(): Deactivates the chipselect for a given slave
  * spi_cs_is_valid(): Determines if the given bus/chipselect
    combination can be activated.

Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?

Changed in v4:
  - Build fixes for various boards, drivers and commands
  - Provide common struct spi_slave definition that can be extended by
    drivers
  - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
  - Make default bus and mode build-time configurable
  - Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:
  - Add opaque struct spi_slave for controller-specific data associated
    with a slave.
  - Add spi_claim_bus() and spi_release_bus()
  - Add spi_free_slave()
  - spi_setup() is now called spi_setup_slave() and returns a
    struct spi_slave
  - soft_spi now supports four SPI modes (CPOL|CPHA)
  - Add bus parameter to spi_setup_slave()
  - Convert the new i.MX32 SPI driver
  - Convert the new MC13783 RTC driver

Changed in v2:
  - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
    new API.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-06-03 20:28:50 +02:00
Stefan Roese
bbeff30cbd ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.

This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:

csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG

I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:19 +02:00
Stefan Roese
192f90e272 ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:13 +02:00
Stefan Roese
39b32be18c ppc4xx: Fix common ECC generation code for 440GP style platforms
This patch makes the common 4xx ECC code really usable on 440GP style
platforms.

Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
we need to make some processor dependant defines used later on by the
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:08 +02:00
Stefan Roese
ec724f883e ppc4xx: Change Kilauea to use the common DDR2 init function
This patch changes the kilauea and kilauea_nand (for NAND booting)
board port to not use a board specific DDR2 init routine anymore. Now
the common code from cpu/ppc4xx is used.

Thanks to Grant Erickson for all his basic work on this 405EX early
bootup.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:03 +02:00
Stefan Roese
36ea16f6a0 ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1
This patch removes all SDRAM related defines from the PPC4xx headers
ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
the same SDRAM controller as 440 systems do (like 405EX and 440SP).

It also introduces new defines for the equipped SDRAM controller based on
which PPC variant is used. There new defines are:

used on 405GR/CR/EP and some Xilinx Virtex boards.

used on 440GP/GX/EP/GR.

used on 440EPx/GRx.

used on 405EX/r/440SP/SPe/460EX/GT.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:21:53 +02:00
Stefan Roese
64852d09e0 ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
This patch consolidates the 405 and 440 parts of the NAND booting code
selected via CONFIG_NAND_SPL. Now common code is used to initialize the
SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
Only *after* running from this location, nand_boot() is called.

Please note that the initsdram() call is now moved from nand_boot.c
to start.S. I experienced problems with some boards like Kilauea
(405EX), which don't have internal SRAM (OCM) and relocation needs to
be done to SDRAM before the NAND controller can get accessed. When
initdram() is called later on in nand_boot(), this can lead to problems
with variables in the bss sections like nand_ecc_pos[].

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2008-06-03 20:21:49 +02:00
Grant Erickson
c821b5f120 ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
This patch (Part 1 of 2):

* Rolls up a suite of changes to enable correct primordial stack and
  global data handling when the data cache is used for such a purpose
  for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).

* Related to the first, unifies DDR2 SDRAM and ECC initialization by
  eliminating redundant ECC initialization implementations and moving
  redundant SDRAM initialization out of board code into shared 4xx
  code.

* Enables MCSR visibility on the 405EX(r).

* Enables the use of the data cache for initial RAM on
  both AMCC's Kilauea and Makalu and removes a redundant
  CFG_POST_MEMORY flag from each board's CONFIG_POST value.

  - Removed, per Stefan Roese's request, defunct memory.c file for
    Makalu and rolled sdram_init from it into makalu.c.

With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:20:50 +02:00
Grant Erickson
a439680019 PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-06-03 20:20:01 +02:00
Becky Bruce
9b124a6834 MPC512x: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 19:47:14 +02:00
Becky Bruce
e34a0e911b PPC: 86xx Add bat registers to reginfo command
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 18:05:15 +02:00
Becky Bruce
31d8267224 PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now.  Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 17:48:41 +02:00
Wolfgang Denk
912810eeca Merge remote branch 'u-boot-at91/for-1.3.4' 2008-06-03 00:24:36 +02:00
Wolfgang Denk
7a68389a23 Merge remote branch 'u-boot-avr32/master' 2008-06-03 00:19:57 +02:00
Shinya Kuribayashi
e2ad842662 [MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-30 00:53:38 +09:00
Haavard Skinnemoen
a8092c021d avr32: Fix theoretical race in udelay()
If the specified delay is very short, the cycle counter may go past the
"end" time we are waiting for before we get around to reading it.

Fix it by checking the different between the cycle count "now" and the
cycle count at the beginning. This will work as long as the delay
measured in number of cycles is below 2^31.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
48ea623eae avr32: Compile atmel_mci.o conditionally
Remove #ifdef CONFIG_MMC from the source file and use conditional
compilation in the Makefile instead.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
e92a5bf833 avr32: Fix wrong error flags in atmel_mci driver
Make sure we check for CRC errors when sending commands that use CRC
checking.

Reported-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
7a96ddadd1 avr32: Fix two warnings in atmel_mci.c
The warnings are harmless but annoying. Let's fix them.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
a23e277c4a avr32: Rework SDRAM initialization code
This cleans up the SDRAM initialization and related code a bit, and
allows faster booting.

  * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
  * Remove memory test from sdram_init() and make caller responsible
    for verifying the SDRAM and determining its size.
  * Remove base_address member from struct sdram_config (was sdram_info)
  * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
  * Add support for a common STK1000 hack: 16MB SDRAM instead of 8.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
95107b7c02 avr32: Do stricter stack checking in the exception handler
Don't do a stack dump if the stack pointer is outside the memory area
reserved for stack.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00