OF_HOSTFILE is used on sandbox configs only. Although it's pretty
unique and not causing any confusions, we are better of having simpler
config options for the DTB.
So let's replace that with the existing OF_BOARD. U-Boot would then
have only three config options for the DTB origin.
- OF_SEPARATE, build separately from U-Boot
- OF_BOARD, board specific way of providing the DTB
- OF_EMBED embedded in the u-boot binary(should not be used in production
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
So far U-Boot was hard coding a (surely sufficient) memory size of 512
MB, even though all machines out there have at least 4GB of DRAM.
Since U-Boot uses its memory knowledge to populate the EFI memory map,
we are missing out here, at best losing everything beyond 4GB on Midway
boxes (which typically come with 8GB of DRAM).
Since the management processor populated the DT memory node already with
the detected DRAM size and configuration, we use that to populate
U-Boot's memory bank information, which is the base for the UEFI memory
map.
This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we
had in place to avoid U-Boot messing up the DT memory node before
loading the kernel.
Also, to cover the whole of memory, we need to enable PHYS_64BIT.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
To squash that nasty warning message and make better use of the newly
gained OF_CONTROL feature, let's convert the calxedagmac driver to the
"new" driver model.
The conversion is pretty straight forward, mostly just adjusting the
use of the involved data structures.
The only actual change is the required split of the receive routine into
a receive and free_pkt part.
Also this allows us to get rid of the hardcoded platform information and
explicit init calls.
This also uses the opportunity to wrap the code decoding the MMIO
register base address, to make it safe for using PHYS_64BIT later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:
Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move this out of the common header and include it only where needed. In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly. Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The Linux coding style guide (Documentation/process/coding-style.rst)
clearly says:
It's a **mistake** to use typedef for structures and pointers.
Besides, using typedef for structures is annoying when you try to make
headers self-contained.
Let's say you have the following function declaration in a header:
void foo(bd_t *bd);
This is not self-contained since bd_t is not defined.
To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>
#include <asm/u-boot.h>
void foo(bd_t *bd);
Then, the include direcective pulls in more bloat needlessly.
If you use 'struct bd_info' instead, it is enough to put a forward
declaration as follows:
struct bd_info;
void foo(struct bd_info *bd);
Right, typedef'ing bd_t is a mistake.
I used coccinelle to generate this commit.
The semantic patch that makes this change is as follows:
<smpl>
@@
typedef bd_t;
@@
-bd_t
+struct bd_info
</smpl>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.
Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.
Move them over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.
Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
We are now using an env_ prefix for environment functions. Rename setenv()
for consistency. Also add function comments in common.h.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'mode' parameter is actually a flag to determine whether to display
a list of devices found during the scan. Rename it to reflect this, add a
function comment and adjust callers to use a boolean.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On the highbank platform the SoC's management controller firmware
will probe the DRAM modules and populates the initial device tree with
the correct values. Therefore the memory sizes in the DT are already
correct, so remove U-Boot's DRAM bank setup so the memory node is not
"fixed up" by u-boot.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andre Przywara <osp@andrep.de>
The Calxeda highbank SOC needs a custom sequence to bring up SATA links,
so override ahci_link_up with custom function to handle combophy setup.
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Richard Gibbs
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andre Przywara <osp@andrep.de>
The Calxeda Midway part has A15 cores, which do not have the Highbank
A9's SCU used there for resetting the chip.
Add code to distinguish between the A9 and the A15 and invoke the
appropriate register writes to support the newer part.
Andre: rework detection of Highbank vs. Midway
Rob: fix Andre's reworked detection
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Andre Przywara <osp@andrep.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Don't store it in a u32.
Don't dereference the bus address as if it were a virtual address
(fixes 284231e49a ("ahci: Support splitting of read transactions
into multiple chunks")).
Fixes crash on boot in MPC8641HPCN_36BIT target.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Vadim Bendebury <vbendeb@chromium.org>
Acked-by: York Sun <yorksun@freescale.com>
This function can fail if the device tree runs out of space. Rather than
silently booting with an incomplete device tree, allow the failure to be
detected.
Unfortunately this involves changing a lot of places in the code. I have
not changed behvaiour to return an error where one is not currently
returned, to avoid unexpected breakage.
Eventually it would be nice to allow boards to register functions to be
called to update the device tree. This would avoid all the many functions
to do this. However it's not clear yet if this should be done using driver
model or with a linker list. This work is left for later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Stefan Roese <sr@denx.de>
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini <trini@ti.com>
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Older compilers don't recognize v7 wfi instruction, so use wfi macro to
fix builds on old compilers.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Add support to read the boot src register and set bootcmd env from the
selected bootcmdX env setting.
Based on Linkstation boot choice selection.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Implement reset for highbank platform. Reset is triggered via a wfi
instruction, so enabling armv7 for the compiler is necessary.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This enables the XGMAC ethernet driver and networking related config
options.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Add basic support for Calxeda Highbank platform. Only minimal support with
serial and SATA are included.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
