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ahci: mmio_base is a virtual address

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Don't store it in a u32.

Don't dereference the bus address as if it were a virtual address
(fixes 284231e49a ("ahci: Support splitting of read transactions
into multiple chunks")).

Fixes crash on boot in MPC8641HPCN_36BIT target.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Vadim Bendebury <vbendeb@chromium.org>
Acked-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Scott Wood 2015-04-17 09:19:01 -05:00 committed by Tom Rini
parent 3907305fb9
commit 9efaca3e84
7 changed files with 16 additions and 15 deletions
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2
arch/arm/cpu/armv7/omap-common/boot-common.c
View file

@ -159,6 +159,6 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
#ifdef CONFIG_SCSI_AHCI_PLAT
void arch_preboot_os(void)
{
ahci_reset(DWC_AHSATA_BASE);
ahci_reset((void __iomem *)DWC_AHSATA_BASE);
}
#endif

6
arch/arm/cpu/armv7/omap-common/sata.c
View file

@ -69,7 +69,7 @@ int init_sata(int dev)
val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
writel(val, TI_SATA_WRAPPER_BASE + TI_SATA_SYSCONFIG);
ret = ahci_init(DWC_AHSATA_BASE);
ret = ahci_init((void __iomem *)DWC_AHSATA_BASE);
return ret;
}
@ -88,6 +88,6 @@ void scsi_init(void)
void scsi_bus_reset(void)
{
ahci_reset(DWC_AHSATA_BASE);
ahci_init(DWC_AHSATA_BASE);
ahci_reset((void __iomem *)DWC_AHSATA_BASE);
ahci_init((void __iomem *)DWC_AHSATA_BASE);
}

2
board/highbank/highbank.c
View file

@ -57,7 +57,7 @@ void scsi_init(void)
u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
if (reg & PWRDOM_STAT_SATA) {
ahci_init(HB_AHCI_BASE);
ahci_init((void __iomem *)HB_AHCI_BASE);
scsi_scan(1);
}
}

2
board/sunxi/ahci.c
View file

@ -83,5 +83,5 @@ void scsi_init(void)
if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0)
return;
ahci_init(SUNXI_SATA_BASE);
ahci_init((void __iomem *)SUNXI_SATA_BASE);
}

11
drivers/block/ahci.c
View file

@ -137,10 +137,10 @@ static void sunxi_dma_init(volatile u8 *port_mmio)
}
#endif
int ahci_reset(u32 base)
int ahci_reset(void __iomem *base)
{
int i = 1000;
u32 host_ctl_reg = base + HOST_CTL;
u32 __iomem *host_ctl_reg = base + HOST_CTL;
u32 tmp = readl(host_ctl_reg); /* global controller reset */
if ((tmp & HOST_RESET) == 0)
@ -419,8 +419,9 @@ static int ahci_init_one(pci_dev_t pdev)
probe_ent->pio_mask = 0x1f;
probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &probe_ent->mmio_base);
debug("ahci mmio_base=0x%08x\n", probe_ent->mmio_base);
probe_ent->mmio_base = pci_map_bar(pdev, PCI_BASE_ADDRESS_5,
PCI_REGION_MEM);
debug("ahci mmio_base=0x%p\n", probe_ent->mmio_base);
/* Take from kernel:
* JMicron-specific fixup:
@ -939,7 +940,7 @@ void scsi_low_level_init(int busdevfunc)
}
#ifdef CONFIG_SCSI_AHCI_PLAT
int ahci_init(u32 base)
int ahci_init(void __iomem *base)
{
int i, rc = 0;
u32 linkmap;

2
drivers/block/dwc_ahsata.c
View file

@ -343,7 +343,7 @@ static int ahci_init_one(int pdev)
| ATA_FLAG_PIO_DMA
| ATA_FLAG_NO_ATAPI;
probe_ent->mmio_base = CONFIG_DWC_AHSATA_BASE_ADDR;
probe_ent->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
/* initialize adapter */
rc = ahci_host_init(probe_ent);

6
include/ahci.h
View file

@ -151,7 +151,7 @@ struct ahci_probe_ent {
u32 hard_port_no;
u32 host_flags;
u32 host_set_flags;
u32 mmio_base;
void __iomem *mmio_base;
u32 pio_mask;
u32 udma_mask;
u32 flags;
@ -160,7 +160,7 @@ struct ahci_probe_ent {
u32 link_port_map; /*linkup port map*/
};
int ahci_init(u32 base);
int ahci_reset(u32 base);
int ahci_init(void __iomem *base);
int ahci_reset(void __iomem *base);
#endif