Currently, we get 256MB as the default, but since all the 86xx
board configs define a 2G BAT mapping for RAM, raise default
to 2G.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
Added code to setup the extra Flash and FRAM chip selects as used on the
MIMC200 board.
V2 moves the init code from the common "cpu.c" file into the board specific
setup file.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Change the MIMC200 startup code to use the built-in (rather than
hard-coded) funtions for setting up gclk outputs.
We'll also move the code to the new, more-appropriate
board_postclk_init() routine.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The AT32UC3A0512ES chip has a bug when disabling interrupts. As a
workaround, two NOPs can be inserted.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
There are some differences in the implementation of GPIO in the
at32uc chip compared to the ap700x series.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The AVR32A architecture (which AT32UC3A-series is based on) has a
different memory layout than the AVR32B-architecture. This patch moves
addrspace.h to an arch-dependent directory in preparation for
AT32UC3A-support. It also moves some address-space manipulation
functions from io.h to addrspace.h.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
NetLoop polls every cycle with getenv some environment variables.
This is horribly slow, especially when the environment is big.
This patch reads only the environment variables in NetLoop,
when they were changed.
Also moved the init part of the NetLoop function in a seperate
function.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
A forward port of the last version to work with the newer smc911x driver.
I only have a board with a LAN9218 part on it, so that is the only one
I've tested. But there isn't anything in this that would make it terribly
chip specific afaik.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added the struct containing PHY settings for the Vitesse VSC8211 phy to
the phy_info list in tsec.c
Signed-off-by: Pieter Henning <phenning@vastech.co.za>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Compiling dbau1x00 and gth2 boards with GCC-4.2, you would see new warnings
like this:
skuribay@ubuntu:u-boot.git$ ./MAKEALL dbau1000
Configuring for dbau1x00 board...
au1x00_eth.c: In function 'au1x00_send':
au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_recv':
au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_init':
au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_recv':
au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_init':
au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_send':
au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
We're passing a volatile pointer to a function which is expecting a non-
volatile pointer. That's potentially dangerous, so gcc warns about it.
Confirmed with ELDK 4.2 (GCC 4.2.2) and Sourcey G++ 4.2 (GCC 4.2.3).
To fix this, we add a volatile attribute to the argument in question.
The virt_to_phys function in Linux kernel also does the same thing.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Clock pin must have input enabled for MMC3 to work.
Also enable pull-ups for cmd/data lines to be consistent
with remaining MMC host pin setup.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
This patch adds OMAP3 cpu type auto detection based on OMAP3 register
and removes hardcoded values.
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX)
which might need different software handling. For this, GPIO pin 171 (GPIO
module 6, offset 11) can be used to check for board revision. If this pin
is low, we have a rev C board. Else it must be a revision Ax or Bx board.
To handle board differences you can call function beagle_get_revision().
E.g.:
if (beagle_get_revision()) {
/* do special revision C stuff here */
}
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* Make Overo GPIO114 an input for touchscreen PENDOWN
* Make Overo GPIO144-147 readable
* Make Overo EHCI pinmux match beagle rev c setup
* Adjust pinmux for SMSC911X network chip support
* Remove unnecessary GPIO setup
* Fix merge error in Makefile
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Serial driver via the EmbeddedICE macrocell's DCC channel using
co-processor 14.
It does include a timeout to ensure that the system does not
totally freeze when there is nothing connected to read.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Taken all the duplicated code for enabling common modules and apply
software workarounds from the board specific code into common
functions. Also added comments explaining the workarounds
(from TI errata documents) and replaced some numerical bit numbers
with more meaningful defines.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
This trivially enables Ethernet support in the debug board
by setting up the proper chip select.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
This driver implements the ECC algorithm described in
the CPU data sheet and uses the OOB layout chosen in
already-released development systems (shipped with a custom-made
u-boot 1.3.1).
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Fix the problem that cannot use external hub, because this driver
did not control correctly a DEVADDx register.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Looks like the initcode updates fell out of order during my merges. The
patch that really fixes up this code is part of power-on overhaul and so
is too large for merging at this point. Instead, we can disable the code
as no currently in-tree board depends on it. The next merge window will
fix things up properly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The previous merge for cleaning up the I2C driver incorrectly reverted the
CFG_xxx rename for some of the I2C defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
Commit e4943ec5 moved the ARM boards to a vendor directory but forgot
to adapt the cleanup rules in the Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch clarifies the way m68k passes linux boot argument.
The one gotcha here is that the assembly instruction that
the compiler uses to jump to the kernel is 'jsr' which pushes the
program counter for the instruction after the jsr into the stack pointer.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Although load address and image start address are same address,
bootm command always does memmove.
That is unnecessary memmove and can be taken few milliseconds
(about 500 msec to 1000 msec).
If skip this memmove, we can reduce the boot time.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch does some minor fixing of the Xilinx Spartan III
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch does some minor fixing of the Xilinx Spartan II
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- relocate post configuration callback only when it
is implemented
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
In the commit 79b51ff820 ([MIPS] cpu/mips/
Makefile: Split [CS]OBJS onto separate lines), I wrongly deleted a START
line. This patch puts it back.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
