Marek reports warnings in UniPhier pinctrl drivers when compiled by
GCC 6.x, like:
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c:58:18: warning:
'usb3_muxvals' defined but not used [-Wunused-const-variable=]
static const int usb3_muxvals[] = {0, 0};
^~~~~~~~~~~~
My intention here is to compile minimum set of pin data for SPL to
save memory footprint, but GCC these days is clever enough to notice
unused data arrays.
We can fix it by sprinkling around __maybe_unused on those arrays,
but I did not do that because they are counterparts of the pinctrl
drivers in Linux. All the pin data were just copy-pasted from Linux
and are kept in sync for maintainability.
I chose a bit tricky way to fix the issue; calculate ARRAY_SIZE of
*_pins and *_muxvals and set their sum to an unused struct member.
This trick will satisfy GCC because the data arrays are used anyway,
but such data arrays will be dropped from the final binary because
the pointers to them are not used.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Marek Vasut <marex@denx.de>
Hardware: CM-FX6 Module from Compulab
This patch fixes unwanted watchdog resets while the user enters
a command at the U-Boot prompt.
As found on the CM-FX6 board from Compulab, when having enabled the
watchdog, a missing WATCHDOG_RESET call in common/console.c causes
this and alike boards to reset when the watchdog's timeout has
elapsed while waiting at the U-Boot prompt.
Despite the user could press several keys within the watchdog
timeout limit, the while loop in cli_readline.c, line 261, does only
call WATCHDOG_RESET if first == 1, which gets set to 0 in the 1st
loop iteration. This leads to a watchdog timeout no matter if the
user presses keys or not.
Although, this affects other boards as well as it touches
common/console.c, the macro WATCHDOG_RESET expands to {} if watchdog
support isn't configured. Hence, there's no harm caused and no need to
surround it by #ifdef in this case.
* Symptom:
U-Boot resets after watchdog times out when in commandline prompt
and watchdog is enabled.
* Reasoning:
When U-Boot shows the commandline prompt, the following function
call stack is executed while waiting for a keypress:
common/main.c:
main_loop => common/cli.c: cli_loop() =>
common/cli_hush.c:
parse_file_outer => parse_stream_outer =>
parse_stream => b_getch(i) =>
i->get(i) => file_get =>
get_user_input => cmdedit_read_input =>
uboot_cli_readline =>
common/cli_readline.c:
cli_readline => cli_readline_into_buffer =>
cread_line => getcmd_getch (== getc) =>
common/console.c:
fgetc => console_tstc
common/console.c:
(with CONFIG_CONSOLE_MUX is set)
- in console_tstc line 181:
If dev->tstc(dev) returns 0, the global tstcdev variable doesn't get
set. This is the case if no character is in the serial buffer.
- in fgetc(int file), line 297:
Program flow keeps looping because tstcdev does not get set.
Therefore WATCHDOG_RESET is not called, as mx_serial_tstc from
drivers/serial/serial_mxc.c does not call it.
* Solution:
Add WATCHDOG_RESET into the loop of console_tstc.
Note: Macro expands to {} if not configured, so no #ifdef is needed.
* Comment:
Signed-off-by: Christian Storm <christian.storm@tngtech.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Andreas J. Reichel <Andreas.Reichel@tngtech.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add a README to explain the steps for booting mx6sabresd in different ways:
1. Booting via Normal U-Boot (u-boot.imx)
2. Booting via SPL (SPL and u-boot.img)
3. Booting via Falcon mode (SPL launches the kernel directly)
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Allow i.MX6Q Sabre SD to load the kernel and dtb via SPL in Falcon mode.
Based on the Falcon mode code for MX6 Gateworks Ventana board.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Declaring a CSF section makes the imximage tool increase the size of
data to be loaded by the BootROM and also adds a pointer to that CSF
section in the IVT header to the BootROM can check the signature.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Selecting the proper options to enable the build of the HAB tools.
Note, this support is disabled by default, one will have to select
the SECURE_BOOT configuration through menuconfig to enable it.
See doc/README.mxc_hab for more details.
Also remove duplicate options from board config headers.
Cc: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Selecting the proper options to enable the build of the HAB tools.
Note, this support is disabled by default, one will have to select
the SECURE_BOOT configuration through menuconfig to enable it.
See doc/README.mxc_hab for more details.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
This commit "2bb014820c49a63902103bac710bc86b5772e843"
do some clean up to use the code in lib/time.c.
But usec2ticks is still being used by security related job ring code.
Bring back the function to avoid build break when CONFIG_FSL_CAAM
is defined.
The computation logic has been changed, using 64-bit variable
to ease the process, making it work on older (MX5) platforms.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Move SYS_OS_BASE to Kconfig and cleanup existing
uses.
Signed-off-by: Heiko Schocher <hs@denx.de>
[trini: Also migrate a4m2k]
Signed-off-by: Tom Rini <trini@konsulko.com>
Jon Master reports that QEMU refuses to load a U-Boot image built
with CONFIG_ARMV7_NONSEC, but without CONFIG_ARMV7_PSCI since
commit 5a3aae68c7 ("ARM: armv7: guard memory reserve for PSCI
with #ifdef CONFIG_ARMV7_PSCI").
It looks like only PSCI that needs the Secure stack, so move
the #ifdef to guard the whole of .secure_stack allocation in order
not to create the empty section.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Jon Masters <jcm@redhat.com>
Link: http://patchwork.ozlabs.org/patch/664025/
lbc_clk is used to fixup dts as "bus frequency".
It is not being used by Linux IFC and eLBC driver.
So remove unused "bus frqeuency" fix-up of devicre tree.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
PBL flush command is restricted to CCSR memory space. So use WAIT
PBI command to provide enough time for data to get flush in
target memory.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[York Sun: rewrap commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
T series boards use unified RCW for sd, spi and nand boot.
Now split txxx_rcw.cfg to txxx_sd_rcw.cfg, txxx_spi_rcw.cfg
and txxx_nand_rcw.cfg for SPI/NAND/SD boot.
And modify RCW[PBI_SRC] for them:
PBI_SRC=5 for SPI 24-bit addressing
PBI_SRC=6 for SD boot
PBI_SRC=14 for IFC NAND boot
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The signature for this macro has changed. Bring in the upstream version and
adjust U-Boot's usages to suit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update to drivers/power/pmic/palmas.c:
Signed-off-by: Keerthy <j-keerthy@ti.com>
Change-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.
This applies the following upstream commits by
Thierry Reding <treding@nvidia.com> :
604e61e fdt: Add functions to retrieve strings
8702bd1 fdt: Add a function to get the index of a string
2218387 fdt: Add a function to count strings
Signed-off-by: Simon Glass <sjg@chromium.org>
This includes small changes to the following functions, from upstream
commit 6d1832c:
- fdt_get_max_phandle() (upstream commit 84e0e134)
- fdt_node_check_compatible (upstream commit 53bf130b)
- fdt_setprop_inplace_namelen_partial() to remove useless brackets and
use idx instead of index
- _fdt_resize_property() to use idx instead of index
- _fdt_splice() (upstream commit d4c7c25c)
It also includes various typo fixes in libfdt.h
Signed-off-by: Simon Glass <sjg@chromium.org>
Using pointer arithmetic to generate a pointer outside a known object is,
technically, undefined behaviour in C. Unfortunately, we were using that
in fdt_offset_ptr() to detect overflows.
To fix this we need to do our bounds / overflow checking on the offsets
before constructing pointers from them.
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes devicetree nodes and or properties are added out of the u-boot
console, maybe through some script or manual interaction.
The devicetree as loaded or embedded is quite small, so the devicetree
has to be resized to take up those new nodes/properties.
In original the devicetree was only extended by effective
4 * add_mem_rsv.
With this commit we can add an argument to the "fdt resize" command,
which takes the extrasize to be added.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Simon Glass <sjg@chromium.org>
eth-uclass.c expects DM-capable Ethernet adapters to implement ops->
read_rom_hwaddr(), or for some other mechanism to set pdata->enetaddr, or
for the user to set environment variable $usbethaddr. Without any of
these, it will refuse to initialize the device since no valid MAC address
is known. Implement this function for the smsc95xx driver.
With this feature implemented, there is no point smsc95xx_init_common()
re-reading the MAC address from ROM, so ifdef out this code when DM_ETH
is enabled.
This allows (at least) the built-in Ethernet on the NVIDIA Harmony board
to operate again.
Fixes: 0990fcb772 ("net: smsc95xx: Add driver-model support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add a NFS download test, based on TFTP test.
Tested on i.MX6 SabreLite board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@konsulko.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
After any operation that downloads a file (e.g., pxe get, or dhcp), the
buffer containing the downloaded data is flushed. This is unnecessary
and annoying. Unnecessary, because
the network driver should already have fliushed the cache for the DMAed area,
and annoying because it generates a cache misalignment message.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.
Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
If mac-address is changed using "setenv ethaddr ...." command the new
mac-adress also must be written into the responsible ethernet driver.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
On some boards these switches are wired directly into a SERDES
interface on another Ethernet MAC. Add the ability to specify
these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines
a bit mask of these fixed ports.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.
The main difference is the number of ports. Which affects the
PORT_COUNT define and the size of the mask passed to
mv88e61xx_port_set_vlan().
Other than that it's just a matter of adding the appropriate chip
IDs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Cc: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ethernet ports might be used in the kernel even if CPSW driver
is disabled at u-boot. So always set ethaddr and eth1addr
environment variable from efuse.
Retain usbnet_devaddr as it is required for SPL USB eth boot.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Both ethernet ports can be used as CPSW ethernet (RMII mode)
or PRU ethernet (MII mode) by setting the jumper near the port.
Read the jumper value and set the pinmux, external mux and
PHY clock accordingly.
As jumper line is overridden by PHY RX_DV pin immediately
after bootstrap (power-up/reset), we have to use GPIO edge
detection to capture the jumper line status.
As u-boot doesn't provide any infrastructure for GPIO edge
detection, we directly access the GPIO registers.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
cpsw driver supports only selection of phy mode in control module
but control module has more setting like RGMII ID mode selection,
RMII clock source selection. So ported to cpsw-phy-sel driver
from kernel to u-boot.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In AM335x GP EVM, Atheros 8031 phy is used, enable the driver as
AM335x SoC RGMII delay mode has to be enabled in phy as mentioned
in the silicon errata Advisory 1.0.10
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.
This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
