rk3588 frac pll:
FFVCO = ((m + k / 65536) * FFIN) / p
FFOUT = ((m + k / 65536) * FFIN) / (p * 2s)
k is the original code, but the K[15:0] is complement code
(6'b1000_0000_0000_0000 <= K[15:0] <= 16'b0111_1111_1111_1111),
need to be converted.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
aclk_top_root choose a parent clock that does not change.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For a specific frequency.
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable mini PCIe slot, pcie3x1 node, now that the PCIe PHY driver
support bifurcation.
A pinctrl is assigned for reset-gpios or the device may freeze running
pci enum and nothing is connected to the mini PCIe slot.
Also drop the AHCI_PCI Kconfig option as this option is not required for
a functional M.2 SATA drive slot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable building Pogo V4 u-boot image with LTO, which results in about 30K
reduction in size.
Rebased to latest master and resend.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that if
there is a reset signal defined in the device tree, it is de-asserted
before we try to talk to the SCIF module.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R-Car H3 Salvator-XS
The current SCIF error handling is broken for the RZ/G2L. After a break
condition has been triggered, the current code is unable to clear the
error and serial port output never resumes.
The RZ/G2L datasheet says that most error conditions are cleared by
resetting the relevant error bits in the FSR & LSR registers to zero.
To clear framing errors on SCIF ports, the invalid data also needs to be
read out of the receive FIFO.
After reviewing datasheets for RZ/G2{H,M,N,E}, R-Car Gen4, R-Car Gen3
and even SH7751 SoCs, it's clear that this is the way to clear errors
for all of these SoCs.
While we're here, annotate the handle_error() function with a couple of
comments as the reads and writes themselves don't immediately make it
clear what we're doing.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tested-by: Chris Paterson <chris.paterson2@renesas.com> # HiHope RZ/G2M board
Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R-Car H3 Salvator-XS
This patch adds ISA string to the -march to generate zbb instructions
for U-Boot binaries, along with optimized string functions introduced
from Linux kernel.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Originally, u-boot SPL will place the DTB directly after the kernel,
but the size of the kernel does not include the BSS section, This
means that u-boot SPL places the DTB in the kernel BSS section causing
the DTB to be cleared by the kernel BSS initialisation.
Moving the DTB in front of the kernel can avoid this error.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Fork from ae350_rv[32/64]_spl_[xip]_defconfig and
append CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
If SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled, the function
spl_invoke_opensbi should change the target OS type to IH_OS_LINUX.
OpenSBI will load the Linux image as the next boot stage.
The os_takes_devicetree function returns a value of true or false
depending on whether or not SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add condition for OpenSBI OS boot mode, by default it is not enabled.
By default, binman creates the output file u-boot.itb.
If SPL_OPENSBI_OS_BOOT is enabled, linux.itb will be created
after compilation instead of the default u-boot.itb.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Introduce common Kconfig symbol for riscv architecture.
This symbol SPL_LOAD_FIT_OPENSBI_OS_BOOT is like falcon mode on ARM,
the Falcon boot is a shortcut boot method for SD/eMMC targets. It
skips the loading the RAM version U-Boot. Instead, it will loads
the FIT image and boots directly to Linux.
When SPL_OPENSBI_OS_BOOT is enabled, linux.itb is created after
compilation instead of the default u-boot.itb. It initialises memory
with the U-Boot SPL at the first stage, just as a normal boot process
does at the beginning. Instead of jumping to the U-Boot proper from
OpenSBI before booting the Linux kernel, the RISC-V falcon mode
process jumps directly to the Linux kernel to gain shorter booting time.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to introduce the Opensbi OS boot mode, the next stage boot
image of OpenSBI should be configurable.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Source hart information is not necessary in IPI, so we could
use single-bit-per-hart strategy to rearrange PLICSW mapping.
Bit 0 of Interrupt Pending Bits is hardwired to 0.
Therefore, we use bit 1 to send IPI to hart 0,
bit 2 to hart 1, ..., and so on.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Some platforms may not have any DDR memory below 4G and for such platforms
the TEXT_BASE and LOAD addresses etc are all 64 bit addresses due to
which the u-boot build fails with below error:
u-boot/arch/riscv/dts/binman.dtsi:30.14-25
Value out of range for 32-bit array element
u-boot/arch/riscv/dts/binman.dtsi:43.14-25
Value out of range for 32-bit array element
u-boot/arch/riscv/dts/binman.dtsi:44.15-26
Value out of range for 32-bit array element
FATAL ERROR: Syntax error parsing input tree
Fix by setting the address-cells property to 2 and converting load
addresses to 64 bit values.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove dram_init_banksize() on the architecture level.
Limiting used RAM to under 4 GiB is only necessary for CPUs which have a
DMA issue. SoC specific code already exists for FU540, FU740, JH7110.
Not all RISC-V boards will have memory below 4 GiB.
A weak implementation of dram_init_banksize() exists in common/board_f.c.
See the discussion in
https://lore.kernel.org/u-boot/545fe813-cb1e-469c-a131-0025c77aeaa2@canonical.com/T/
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Fix npcm845 watchdog halt for reset function and expire function.
Reset function is restart wdt.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Stefan Roese <sr@denx.de>
For some time now running sandbox with -T produces an error:
Core: 270 devices, 95 uclasses, devicetree: board
WDT: Not starting wdt-gpio-toggle
wdt_gpio wdt-gpio-level: Request for wdt gpio failed: -16
WDT: Not starting wdt@0
MMC: mmc2: 2 (SD), mmc1: 1 (SD), mmc0: 0 (SD)
Use an unallocated GPIO to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 1fc45d6483 ("watchdog: add pulse support to gpio watchdog driver")
Reviewed-by: Stefan Roese <sr@denx.de>
To quote the author:
This series adds some tests for various SPL load methods, with the
intent of helping debug v6 of [1]. With that in mind, notable omissions
include NAND and ROMAPI, which both lack sandbox implementations, and
OS_BOOT, which I have deferred due to its complexity. Semihosting is
also omitted, but I think we can test that with qemu.
In order to test all of these methods, we must first generate suitable
images, possibly on filesystems. While other tests have historically
generated these images using external tools (e.g. mkimage, mkfs, etc.),
I have chosen to generate them on the fly. This is for a few reasons:
- By removing external dependencies on pytest to create certain files,
the tests become self-contained. This makes them easier to iterate on
and debug.
- By generating tests at runtime, we can dynamically vary the content.
This helps detect test failures, as even if tests are loaded to the
same location, the expected content will be different.
- We are not testing the image parsers themselves (e.g.
spl_load_simple_fit or fs_read) but rather the load methods (e.g.
spl_mmc_load_image). It is unnecessary to exercise full functionality
or generate 100% correct images.
- By reducing functionality to only what is necessary, the complexity of
various formats can often be greatly reduced.
This series depends on [2-3], which are small fixes identified through
this patch set. The organization of patches in this series is as
follows:
- General fixes for bugs which are unlikely to be triggered outside of
this series
- Changes to IMX8 container images to facilitate testing
- General prep. work, particularly regarding linker issues
- The tests themselves
Passing CI at [4].
[1] https://lore.kernel.org/all/20230731224304.111081-1-sean.anderson@seco.com/
[2] https://lore.kernel.org/all/20230930204246.515254-1-seanga2@gmail.com/
[3] https://lore.kernel.org/all/20231008014748.1987840-1-seanga2@gmail.com/
[4] https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/18128
Add test for the SPI load method. This one is pretty straightforward. We
can't enable FIT_EXTERNAL with LOAD_FIT_FULL because spl_spi_load_image
doesn't know the total image size and has to guess from fdt_totalsize. This
doesn't include external data, so loading it will fail.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a test for the NOR load method. Since NOR is memory-mapped we can
substitute a buffer instead. The only major complication is testing LZMA
decompression. It's too complex to implement LZMA compression in a test, and we
have no in-tree compressor, so we just include some pre-compressed data. This
data was generated through something like
generate_data(plain, plain_size, "lzma")
cat plain.dat | lzma | hexdump -C
and was cleaned up further in my editor.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a test for loading U-Boot over TFTP. As with other sandbox net
routines, we need to initialize our packets manually since things like
net_set_ether and net_set_udp_header always use "our" addresses. We use
BOOTP instead of DHCP, since DHCP has a tag/length-based format which is
harder to parse. Our TFTP implementation doesn't define as many constants
as I'd like, so I create some here. Note that the TFTP block size is
one-based, but offsets are zero-based.
In order to avoid address errors, we need to set up/define some additional
address information settings. dram_init_banksize would be a good candidate
for settig up bi_dram, but it gets called too late in board_init_r.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a test for the MMC load method. This shows the general shape of tests
to come: The main test function calls do_spl_test_load with an appropriate
callback to write the image to the medium.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a test for spl_blk_load_image, currently used only by NVMe. Because
there is no sandbox NVMe driver, just use MMC instead. Avoid falling back
to raw images to make failures more obvious.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add some functions for creating fat/ext2 filesystems with a single file and
a test for them. Filesystems require block devices, and it is easiest to
just use MMC for this. To get an MMC, we must also pull in the test device
tree. SPL_TIMER is necessary for SPL_MMC, perhaps because it uses a timeout.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This add some basic functions to create images, and a test for said
functions. This is not intended to be a test of the image parsing
functions, but rather a framework for creating minimal images for testing
load methods. That said, it does do an OK job at finding bugs in the image
parsing directly.
Since we have two methods for loading/parsing FIT images, add LOAD_FIT_FULL
as a separate CI run.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Returning a negative value from a unit test doesn't automatically fail the
test. We have to fail an assertion. Modify the test to do so.
This now causes the test to count as a failure on VPL. This is because the
fname of SPL (and U-Boot) is generated with make_exec in os_jump_to_image.
The original name of SPL is gone, and we can't determine the name of U-Boot
from the generated name.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to make adding new spl unit tests easier, especially when they may
have many dependencies, add some Kconfigs for the existing image test.
Split it into the parts which are generic (such as callbacks) and the
test-specific parts.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The test devicetree is only compiled for U-Boot proper. When accessing it in
SPL we need to go up one directory.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All "physical" addresses in SPL must be converted to virtual addresses
before access in order for sandbox to work. Add some calls to map_sysmem in
appropriate places. We do not generally call unmap_sysmem, since we need
the image memory to still be mapped when we jump to the image. This doesn't
matter at the moment since unmap_sysmem is a no-op.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Several SPL functions try to avoid performing initialization twice by
caching devices. This is fine for regular boot, but does not work with
UNIT_TEST, since all devices are torn down after each test. Add some
functions to invalidate the caches which can be called before testing these
load methods.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
If we sent a DHCP packet and get a BOOTP response from the server, we
shouldn't try to send a DHCPREQUEST packet, since it won't be DHCPACKed.
Transition straight to BIND. This is only enabled for UNIT_TEST to avoid
bloat, since I suspect the number of BOOTP servers in the wild is
vanishingly small.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These defines are useful when testing bootp.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When fastboot is enabled in U-Boot proper and SPL_NET is enabled, we will
try to (unsuccessfully) reference it in SPL. Fix these linker errors by
conditioning on SPL_UDP/TCP_FUNCTION_FASTBOOT.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add various defines which are not necessary for reading/writing
filesystems, but which are useful for creating them. These mostly come from
Linux v6.5-rc2 (what I had checked out).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If EXT4_WRITE is enabled, write capabilities will be compiled into SPL, but
not CRC16. Add an option to enable CRC16 to avoid linker errors.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Don't bother compiling the sandbox filesystem in SPL for now, as it is not
needed.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
lib/acpi/acpigen.o is only compiled into SPL when SPL_ACPIGEN is enabled.
Update several files which reference these functions accordingly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sandbox unit tests in U-Boot proper load a test device tree to have some
devices to work with. In order to do the same in SPL, we must enable
SPL_OF_REAL. However, we already have SPL_OF_PLATDATA enabled. When
generating platdata from a devicetree, it is expected that we will not need
devicetree access functions (even though SPL_OF_CONTROL is enabled). This
expectation does not hold for sandbox, so allow user control of
SPL_OF_REAL.
There are several places in the tree where conditions involving OF_PLATDATA
or OF_REAL no longer function correctly when both of these options can be
selected at the same time. Adjust these conditions accordingly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make sure we have an IMX header before calling spl_load_imx_container,
since if we don't it will fail with -ENOENT. This allows us to fall back to
legacy/raw images if they are also enabled.
This is a functional change, one which likely should have been in place
from the start, but a functional change nonetheless. Previously, all
non-IMX8 images (except FITs without FIT_FULL) would be optimized out if
the only image load method enabled supported IMX8 images. With this change,
support for other image types now has an effect.
There are seven boards with SPL_LOAD_IMX_CONTAINER enabled: three with
SPL_BOOTROM_SUPPORT:
imx93_11x11_evk_ld imx93_11x11_evk imx8ulp_evk
and four with SPL_MMC:
deneb imx8qxp_mek giedi imx8qm_mek
All of these boards also have SPL_RAW_IMAGE_SUPPORT and
SPL_LEGACY_IMAGE_FORMAT enabled as well. However, none have FIT support
enabled. Of the six load methods affected by this patch, only SPL_MMC and
SPL_BOOTROM_SUPPORT are enabled with SPL_LOAD_IMX_CONTAINER.
spl_romapi_load_image_seekable does not support legacy or raw images, so
there is no growth. However, mmc_load_image_raw_sector does support loading
legacy/raw images. Since these images could not have been booted before, I
have disabled support for legacy/raw images on these four boards. This
reduces bloat from around 800 bytes to around 200.
There are no in-tree boards with SPL_LOAD_IMX_CONTAINER and AHAB_BOOT both
enabled, so we do not need to worry about potentially falling back to
legacy images in a secure boot scenario.
Future work could include merging imx_container.h with imx8image.h, since
they appear to define mostly the same structures.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
