Commit graph

79511 commits

Author SHA1 Message Date
Andrew Scull
c763e1e023 virtio: pci: Check virtio configs are mapped
Prepare for calls to `virtio_pci_map_capability()` failing by returning
NULL on error. If this happens, later accesses to the pointers would be
unsafe so cause the probe to fail if such an error occurs.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
2635e3b50f pci: Add mask parameter to dm_pci_map_bar()
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
a822d1dee4 pci: Update dm_pci_bus_to_virt() parameters
Add mask parameter and reorder length parameter to match the other PCI
address conversion functions. Using PCI_REGION_TYPE as the mask gives
the old behaviour.

It's converted from a macro to an inline function as the length
parameter is now used twice, but should only be calculated once.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
7739d93d82 pci: Match region flags using a mask
When converting addresses, apply a mask to the region flags during
lookup. This allows the caller to specify which flags are important and
which are not, for example to exclude system memory regions.

The behaviour of the function is changed such that they don't
preferentially search for a non-system memory region. However, system
memory regions are added after other regions in decode_regions() leading
to a similar outcome.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:26 -04:00
Andrew Scull
12507a2d22 pci: Map bars with offset and length
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.

Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:46 -04:00
Andrew Scull
55e6adbd78 test: pci: Test PCI address conversion functions
Add tests for the functions dm_pci_bus_to_phys() and
dm_pci_phys_to_bus() which convert between PCI bus addresses and
physical addresses based on the ranges declared for the PCI controller.

The ranges of bus#1 are used for the tests, adding a translation to one
of the ranges to cover more cases.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:46 -04:00
Andrew Scull
398dc367c5 pci: Range check address conversions
When converting between PCI bus and physical addresses, include a length
parameter that can be used to check that the entire range fits within
one of the PCI regions. This prevents an address being returned that
might be only partially valid for the range it is going to be used for.

Where the range check is not wanted, passing a length of 0 will have the
same behaviour as before this change.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
ec8eba8c2d pci: Check region ranges are addressable
When parsing the `ranges` DT node, check that both extremes of the
regions are addressable without overflow. This assumption can then be
safely made when processing the regions.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
60f4142aa2 pci: Fix use of flags in dm_pci_map_bar()
The flags parameter of dm_pci_map_bar() is used for PCI region flags
rather than memory mapping flags. Fix the type to match that of the
region flags and stop using the regions flags as memory mapping flags.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
e7870c2cdc virtio: pci: Read entire capability into memory
Read the virtio PCI capability out of the device configuration space to
a struct rather than accessing fields directly from the configuration
space as they are needed. This both makes access to the fields easier
and avoids re-reading fields.

Re-reading fields could result in time-of-check to time-of-use problems,
should the value in the configuration space change. The range check of
the `bar` field and the later call to `dm_pci_read_bar32()` is an
example of where this could happen.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
6a8cb878a2 virtio: pci: Check virtio capability is in bounds
Ensure the virtio PCI capabilities are contained within the bounds of
the device's configuration space. The expected size of the capability is
passed when searching for the capability to enforce this check.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
f2c1ef1b6d virtio: pci: Check virtio common config size
Check that the common config is at least as large as the struct it is
expected to contain. Only then is it safe to cast the pointer and be
safe from out-of-bounds accesses.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
c690f64f4c virtio: pci: Bounds check notification writes
Make sure virtio notifications are written within their allocated
buffer.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
94b28b9158 virtio: pci: Bounds check device config access
The device config is optional, so check it was present and mapped before
trying to use the pointer. Bounds violations are an error, not just a
warning, so bail if the checks fail.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
da03cdfa7a virtio: pci: Fix discovery of device config length
The length of the device config was erroneously being taken from the
notify capability. Correct this by finding the length in the device
capability.

Fixes: 550435edf8 ("virtio: pci: Support non-legacy PCI transport device")
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
30471d5351 virtio: pci: Allow exclusion of legacy driver
Add a new config to control whether the driver for legacy virtio PCI
devices is included in the build. VIRTIO_PCI_LEGACY is included by
default when VIRTIO_PCI is selected, but it can also be independently
toggled.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Tom Rini
f8e7670f8b CI: Azure: Rework how we update MSYS2
Based on reading https://www.msys2.org/docs/ci/ and "Other Systems"
rework how we update MSYS2 to the current version.  We run it once, to
perform nothing other than being the first run, then we run pacman
twice.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-03 08:32:50 -04:00
Tom Rini
edb6982b58 Merge branch '2022-05-02-add-verifying-program-loader'
To quote the author:

U-Boot provides a verified-boot feature based around FIT, but there is
no standard way of implementing it for a board. At present the various
required pieces must be built up separately, to produce a working
implementation. In particular, there is no built-in support for selecting
A/B boot or recovery mode.

This series introduces VPL, a verified program loader phase for U-Boot.
Its purpose is to run the verified-boot process and decide which SPL
binary should be run. It is critical that this decision happens before
SPL runs, since SPL sets up SDRAM and we need to be able to update the
SDRAM-init code in the field.

Adding VPL into the boot flow provides a standard place to implement
verified boot. This series includes the phase itself, some useful Kconfig
options and a sandbox_vpl build for sandbox. No verfied-boot support is
provided in this series.

Most of the patches in this series are fixes and improvements to docs and
various Kconfig conditions for SPL.
2022-05-02 19:02:44 -04:00
Tom Rini
2406a91734 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Misc turris_omnia/mox related Fixes and impovements (Pali)
- Turris Omnia: Add support for configuring mSATA and WWAN slots
  via env variables (Pali)
- net: mvgbe: Set PHY page 0 before phy_connect (Tony)
- kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver (Tony)
- mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names (Pali)
- mvebu: clearfog_defconfig: enable setexpr command (Josef)
- mvebu: x530: set MPP55 to gpio (Chris)
2022-05-02 19:00:42 -04:00
Simon Glass
a31eff3015 CI: Run VPL tests
Add tests for VPL into the mix. For now this just runs the help test and
a few SPL ones.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 10:01:52 -04:00
Simon Glass
5f195140a9 vpl: Test that VPL runs correctly through to U-Boot proper
Check the TPL -> VPL -> SPL -> U-Boot path by running the 'help' command
in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 10:01:51 -04:00
Simon Glass
313438c971 vpl: Support running vpl tests
Add support for these to the pytest system.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
9ae25b9ac9 sandbox: Add a build for VPL
Add an initial VPL build for sandbox. This includes the flow:

   TPL (with of-platdata) -> VPL -> SPL -> U-Boot

To run it:

   ./tpl/u-boot-tpl -D

The -D is needed to get the default device tree, which includes the serial
console info.

Add a Makefile check for OF_HOSTFILE which is the option that enables
devicetree control on sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
747093dd40 vpl: Add Kconfig options for VPL
Add VPL versions of commonly used Kconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
f86ca5ad8f Introduce Verifying Program Loader (VPL)
Add support for VPL, a new phase of U-Boot. This runs after TPL. It is
responsible for selecting which SPL binary to run, based on a
verified-boot process.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
d3eba95a7e Makefile: Tidy up the TPL build rules
These should follow the same pattern as SPL, for consistency. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
70bed2f659 Makefile: Simplify devicetree rules for SPL/TPL
The current logic checks several options to decide whether SPL/TPL need
the U-Boot devicetree to be built. In fact we can check OF_CONTROL, which
is enabled in all cases that matter.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
743ebe6b79 avb: Don't build in SPL
This feature is not used in SPL at present. Update the Makefile to avoid
it being built.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
3c0d5ea0a5 bloblist: Correct Kconfig dependencies
This feature is not available in SPL unless common/ and lib/ are built.
Update the Kconfig to avoid build errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
b550853b7d test: Tidy up test building with SPL
We can in principle add tests to any SPL build, e.g. TPL or VPL. Update
the build rules to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
a36d251b50 doc: Expand SPL docs to explain the phase and config
Add a bit more information about how to use SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
d411359d91 doc: Convert SPL documentation to ReST
Move this documentation over to .rst format.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Chris Packham
08dc62c152 ARM: mvebu: x530: set MPP55 to gpio
MPP55 is used as a reset connected to the L3 switch chip. This doesn't
matter for u-boot as it doesn't use the L3 switch but it is useful to
be able to toggle the switch in/out of reset for the OS.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-02 07:47:26 +02:00
Josef Schlehofer
af767e9a3d arm: mvebu: clearfog_defconfig: enable setexpr command
This command is useful in U-boot scripts and it is being used by
OpenWrt bootscript for this board [1]. Otherwise shell scripting
commands are enabled by default in cmd/Kconfig.

[1] 852126680e/target/linux/mvebu/image/clearfog.bootscript (L7)

[2] e95afa5675/cmd/Kconfig (L1504)

Fixes: 0299c90f39 ("arm: mvebu: Add
SolidRun ClearFog Armada 38x initial support")

Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-02 07:47:26 +02:00
Pali Rohár
363d9f2c2f arm: mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names
This is A385 register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-02 07:47:26 +02:00
Tony Dinh
dbd2a382c1 arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet
The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S.
Use uclass mvgbe and the compatible driver M88E1310 driver to bring
up Ethernet.

- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Remove CONFIG_RESET_PHY_R.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add phy mode RGMII to kirkwood-nsa310s.dts
- Miscellaneous changes: Move constants to .c file and remove header file
board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs,
use BIT macro, add/cleanup comments, and cosmetic changes.

Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2022-05-02 07:47:26 +02:00
Tony Dinh
f0f98758ed net: marvell: mvgbe: Set PHY page 0 before phy_connect
For most Kirkwood boards, the PHY page is already set to page 0
(in register 22) before phy_connect is invoked. But some board like
the Zyxel NSA310S (which uses the network chip MV88E1318S), the PHY page
is not set to page 0. There seems to be some bad data remained in
register 22 when the uclass MVGBE about to invoke phy_connect().

This patch enables the uclass MVGBE to always set the PHY page to 0
before phy_connect.

For reference, please see this discussion:
[RFC PATCH v2] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe
and PHY driver for DM Ethernet.
https://lists.denx.de/pipermail/u-boot/2022-April/480946.html

This patch has been tested with the following Kirkwood boards:

NSA310S (88F6702, network chip MV88E1318S)
Sheevaplug (88F6281, network chip MV88E1318)
Pogo V4 (88F6192, network chip 88E1116R)
GF Home(88F6281, network chip 88E1116R)
Dreamplug (88F6281, network chip MV88E1318)
Dell Kace M300 (88F6282, network chip MV88E1318) - out of tree u-boot

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2022-05-02 07:47:26 +02:00
Pali Rohár
b8b91a0f08 arm: mvebu: turris_mox: Add NVMe and SCSI to boot targets
U-Boot for Turris Mox has already enabled NVMe and SCSI support. So add
NVMe and SCSI to boot targets.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:47:26 +02:00
Pali Rohár
0ddc1e5aa3 arm: mvebu: turris_omnia: Add NVMe to boot targets
U-Boot for Turris Omnia has already enabled NVMe support. So add NVMe to
boot targets.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:47:26 +02:00
Pali Rohár
9efc5b7a4b arm: mvebu: turris_omnia: Always enable MMC, SCSI and USB boot targets
U-Boot for Turris Omnia is always compiled with MMC, SCSI and USB support,
so always enable macros for booting from these devices.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:47:26 +02:00
Pali Rohár
31f88018d9 arm: mvebu: turris_omnia: Define CONFIG_ETHPRIME instead of ethact= ENV
CONFIG_ETHPRIME defines primary ethernet device and env variable $ethact
stores currently active ethernet device.

So there is no point to set ethact= in default environment. Instead set
CONFIG_ETHPRIME properly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-05-02 07:47:26 +02:00
Pali Rohár
1ae8a5fb6a arm: mvebu: turris_omnia: Fix RESET button message
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-05-02 07:29:55 +02:00
Pali Rohár
73c7db73e8 arm: mvebu: turris_omnia: Add support for USB3.0 mode in WWAN MiniPCIe slot
PCIe Mini CEM 2.1 spec added support for USB3.0 mode on MiniPCIe cards.
USB3.0 and PCIe share same pins and only one function can be active at the
same time. PCIe Mini CEM 2.1 spec says that determining function is
platform specific and spec does not define any dedicated pin which could
say if card is USB3.0-based or PCIe-based.

Implement this platform specific decision (USB3.0 vs PCIe) for WWAN
MiniPCIe slot on Turris Omnia via U-Boot env variable "omnia_wwan_slot",
similarly like is implemented forced mode for MiniPCIe/mSATA slot via
"omnia_msata_slot" env variable. Value "usb3" for "omnia_wwan_slot" would
mean to set USB3.0 mode and value "pcie" original PCIe mode.

A385 SoC on Turris Omnia has configurable fifth SerDes line (exported to
MiniPCIe WWAN slot with SIM card) either to USB3.0 or PCIe functionality,
so implementation of this new PCIe Mini CEM 2.1 feature is simple, by just
configuring SerDes to USB 3.0 mode.

Other twos MiniPCIe slots on Turris Omnia do not have this new
functionality as their SerDes lines cannot be switched to USB3.0
functionality.

Note that A385 SoC does not have too many USB3.0 blocks, so activating
USB3.0 in MiniPCIe cause that one external USB3.0 USB-A port would loose
USB3.0 functionality and would be downgraded just to USB2.0.

By default this MiniPCIe WWAN slot is in PCIe mode, like before.

To set this MiniPCIe WWAN slot to USB3.0 mode, call U-Boot commands:

  => setenv omnia_wwan_slot usb3
  => saveenv
  => reset

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
72a9dd264c arm: mvebu: turris_omnia: Signal error when sata/pcie DT mode
Show error message when DT file does not contain sata or pcie node which
should be explicitly disabled. This can happen when U-Boot code for finding
those nodes is incomplete or when those DT nodes are in different
unexpected location. In any case it is needed to know if DT not was not
explicitly disabled as it could mean that combo slots where setup
incorrectly.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
d80276870d arm: mvebu: turris_omnia: Extract code for disabling sata/pcie
Move code for disabling sata and pcie DT nodes to own functions, so this
code can be called from other places in follow up patches.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
1da19dcf3b arm: mvebu: turris_omnia: Allow to configure mSATA slot via env variable
Some PCIe-based MiniPCIe cards are broken and they do not ground PIN 43
which is required by PCIe mini CEM specs. Such broken cards are incorrectly
detected as mSATA cards because SATA specs requires that PIN 43 on mSATA
cards has to be disconnected.

PIN 43 on Turris Omnia is used only for MiniPCIe/mSATA card detection by
software in U-Boot SPL. Allow to override that U-Boot SPL detection by a
new "omnia_msata_slot" env variable (to value "pcie" or "sata") so broken
MiniPCIe cards can be used in combo mSATA/MiniPCIe slot too.

As configuration of PCIe vs SATA functionality is done in U-Boot SPL,
it is required to change env variable in permanent storage and reset the
board to take effect.

To force PCIe mode for broken MiniPCIe cards, call U-Boot commands:

  => setenv omnia_msata_slot pcie
  => saveenv
  => reset

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
8ead243ecc arm: mvebu: turris_omnia: Define only one serdes map variable
By default use primary serdes map with PCIe function in combined
miniPCIe/mSATA slot. When SATA is detected change serdes map variable at
runtime.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
f9c5cf8a88 arm: mvebu: turris_omnia: Enable ENV support in SPL
Allow to read ENV variables also in SPL on Turris Omnia.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
d6ba5c4f92 arm: mvebu: turris_omnia: Provide env_sf_get_env_addr() function
BootROM maps SPI Flash to fixed address 0xD4000000 and this mapping is
active also when BootROM is executing binary kwbimage headers, which
includes also U-Boot SPL.

Therefore no initialization code is required to access SPI Flags from
U-Boot SPL. In proper U-Boot it is remapped to other location.

So in mvebu implementation of env_sf_get_env_addr() function returns
0xD4000000 when running in SPL and NULL when in proper U-Boot.

This change would allow to use U-Boot ENV in U-Boot SPL. Normally it is not
possible to read ENV because it is too big and U-Boot SPL does not have
such big malloc() pool to real all ENV variables.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-05-02 07:28:25 +02:00
Pali Rohár
f4bf81b013 env: sf: Allow to use env_sf_init_addr() at any stage
In some cases it makes sense to use env_sf_init_addr() also in SPL mode.
Allow it for boards by providing custom implementation of weak function
env_sf_get_env_addr(). When this function returns NULL it signals that
address is invalid, like config option CONFIG_ENV_ADDR.

There is no change in default behavior or in config options.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00