Commit graph

4292 commits

Author SHA1 Message Date
Yegor Yefremov
0fae25089d net: add ICPlus PHY driver
The driver code was taken from Linux kernel source:
drivers/net/phy/icplus.c

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2013-06-24 19:07:32 -05:00
Yegor Yefremov
e2043f5c27 phy: export genphy_parse_link()
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2013-06-24 19:07:32 -05:00
Henrik Nordström
518ce472f7 net: Add sunxi (Allwinner) wemac driver
This patch adds support for the WEMAC, the ethernet controller included
in the Allwinner A10 SoC. It will get used in the upcoming A10 board
support.

From: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
2013-06-24 19:07:31 -05:00
Heiko Schocher
a67cc37e69 dfu, nand: before write a buffer to nand, erase the nand sectors
before writing the received buffer to nand, erase the nand
sectors. If not doing this, nand write fails. See for
more info here:

http://lists.denx.de/pipermail/u-boot/2013-June/156361.html

Using the nand erase option "spread", maybe overwrite
blocks on, for example another mtd partition, if the
erasing range contains bad blocks.
So a limit option is added to nand_erase_opts()

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-06-24 18:17:23 -05:00
Tom Rini
f9c1456cf6 Merge branch 'master' of git://git.denx.de/u-boot-spi 2013-06-24 16:37:01 -04:00
Rajeshwari Shinde
d4ec8f0885 S5P: Serial: Add fdt support to driver
This patch adds FDT support to the serial s5p driver.
At present disabling the serial console (from the device tree) crashes
U-Boot. Add checks for this case, so that execution can continue without
a serial console.
It also enables the serial_s5p driver recognize the silent_console option.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-24 20:47:41 +09:00
Amar
2c07bb9b53 EXYNOS5: I2C: Add FDT and non-FDT support for I2C
This patch updates the function board_i2c_init() to add support for both
FDT and non-FDT for I2C, and initialise the I2C channels.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-24 11:25:19 +09:00
Jagannadha Sutradharudu Teki
b9e31be0f8 sf: Warn to use BAR for > 16MiB flashes
Warning for > 16MiB flashes to #define CONFIG_SPI_FLASH_BAR

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:10:36 +05:30
Jagannadha Sutradharudu Teki
29fbfc10f4 sf: Add debug messages on spi_flash_read_common
- Added debug's on spi_flash_read_common()
- Added space

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:10:36 +05:30
Jagannadha Sutradharudu Teki
95e779e4f4 sf: Place the sf calls in proper order
Placed the sf calls in proper order - erase/write/read

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:10:36 +05:30
Jagannadha Sutradharudu Teki
acc237544a sf: Unify spi_flash write code
Move common flash write code into spi_flash_write_common().

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:10:35 +05:30
Jagannadha Sutradharudu Teki
615a156167 sf: Add flag status register polling support
Flag status register polling is required for micron 512Mb flash
devices onwards, for performing erase/program operations.

Like polling for WIP(Write-In-Progress) bit in read status register,
spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control)
bit in flag status register.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:51 +05:30
Jagannadha Sutradharudu Teki
ba549de6c5 sf: Remove spi_flash_cmd_poll_bit()
There is no other call other than spi_flash_cmd_wait_ready(),
hence removed spi_flash_cmd_poll_bit and use the poll status code
spi_flash_cmd_wait_ready() itself.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:51 +05:30
Jagannadha Sutradharudu Teki
76e98d4817 sf: spansion: Add support for S25FL512S_64K
Add support for Spansion S25FL512S_64K SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:02:51 +05:30
Jagannadha Sutradharudu Teki
4e2904311d sf: stmicro: Add support for N25Q1024A
Add support for Numonyx N25Q1024A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:02:51 +05:30
Jagannadha Sutradharudu Teki
221cb084ad sf: stmicro: Add support for N25Q1024
Add support for Numonyx N25Q1024 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:02:51 +05:30
Jagannadha Sutradharudu Teki
fd60c0ac31 sf: stmicro: Add support for N25Q512A
Add support for Numonyx N25Q512A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:02:51 +05:30
Jagannadha Sutradharudu Teki
0569f3b9be sf: stmicro: Add support for N25Q512
Add support for Numonyx N25Q512 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:02:50 +05:30
Jagannadha Sutradharudu Teki
f76b1bd08b sf: Use spi_flash_addr() in write call
Use the existing spi_flash_addr() for 3-byte addressing
cmd filling in write call.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:50 +05:30
Jagannadha Sutradharudu Teki
1dcd6d0381 sf: Add bank addr code in CONFIG_SPI_FLASH_BAR
Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the
size for existing boards which has < 16Mbytes SPI flashes.

It's upto user which has provision to use the bank addr code for
flashes which has > 16Mbytes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:50 +05:30
Jagannadha Sutradharudu Teki
fc207ee4db sf: Update sf read to support all sizes of flashes
This patch updated the spi_flash read func to support all
sizes of flashes using bank reg addr facility.

The same support has been added in below patch for erase/write
spi_flash functions:
"sf: Support all sizes of flashes using bank addr reg facility"
(sha1: c956f600cbb0943d0afe1004cdb503f4fcd8f415)

With these new updates on sf framework, the flashes which has < 16MB
are not effected as per as performance is concern and but the
u-boot.bin size incrased ~460 bytes.

sf update(for first 16MBytes), Changes before:
U-Boot> sf update 0x1000000 0x0 0x1000000
- N25Q256
  16777216 bytes written, 0 bytes skipped in 199.72s, speed 86480 B/s
- W25Q128BV
  16777216 bytes written, 0 bytes skipped in 351.739s, speed 48913 B/s
- S25FL256S_64K
  16777216 bytes written, 0 bytes skipped in 65.659s, speed 262144 B/s

sf update(for first 16MBytes), Changes before:
U-Boot> sf update 0x1000000 0x0 0x1000000
- N25Q256
  16777216 bytes written, 0 bytes skipped in 198.953s, speed 86480 B/s
- W25Q128BV
  16777216 bytes written, 0 bytes skipped in 350.90s, speed 49200 B/s
- S25FL256S_64K
  16777216 bytes written, 0 bytes skipped in 66.521s, speed 262144 B/s

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:50 +05:30
Jagannadha Sutradharudu Teki
e3ff9d51ec sf: Update sf to support all sizes of flashes
Updated the spi_flash framework to handle all sizes of flashes
using bank/extd addr reg facility

The current implementation in spi_flash supports 3-byte address mode
due to this up to 16Mbytes amount of flash is able to access for those
flashes which has an actual size of > 16MB.

As most of the flashes introduces a bank/extd address registers
for accessing the flashes in 16Mbytes of banks if the flash size
is > 16Mbytes, this new scheme will add the bank selection feature
for performing write/erase operations on all flashes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:50 +05:30
Jagannadha Sutradharudu Teki
e612ddf593 sf: Read flash bank addr register at probe time
Read the flash bank addr register to get the state of bank in
a perticular flash. and also bank write happens only when there is
a change in bank selection from user.

bank read only valid for flashes which has > 16Mbytes those are
opearted in 3-byte addr mode, each bank occupies 16Mytes.

Suppose if the flash has 64Mbytes size consists of 4 banks like
bank0, bank1, bank2 and bank3.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:50 +05:30
Jagannadha Sutradharudu Teki
cf6b11dcda sf: Discover the bank addr commands
Bank/Extended addr commands are specific to particular
flash vendor so discover them based on the idocode0.

Assign the discovered bank commands to spi_flash members
so-that the bank read/write will use their specific operations.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:02:49 +05:30
Jagannadha Sutradharudu Teki
c9fcb59d7d sf: Add bank address register writing support
This patch provides support to program a flash bank address
register.

extended/bank address register contains an information to access
the 4th byte addressing in 3-byte address mode.

reff' the spec for more details about bank addr register
in Page-63, Table 8.16
http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:49 +05:30
Axel Lin
9675fed474 spi: mxc_spi: Use DIV_ROUND_UP at appropriate places
This change slightly improves readability.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-06-22 23:08:01 +05:30
Axel Lin
0cb8394f81 spi: cf_qspi: Use DIV_ROUND_UP at appropriate place
This change slightly improves readability.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Richard Retanubun <richardretanubun@ruggedcom.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-06-22 23:08:01 +05:30
Jagannadha Sutradharudu Teki
1e77deec6e sf: winbond: Add support for W25QXXXFV
Add support for Winbond W25QXXXFV SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-22 23:08:01 +05:30
Jagannadha Sutradharudu Teki
f0293fb595 sf: winbond: Add support for W25Q16DW
Add support for Winbond W25Q16DW SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-22 23:08:01 +05:30
Jagannadha Sutradharudu Teki
920559f19e sf: winbond: Add support for W25Q128FW
Add support for Winbond W25Q128FW SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-22 23:08:00 +05:30
Jagannadha Sutradharudu Teki
e9fd312088 sf: winbond: Update the names for W25Q 0x40XX ID's flash parts
Use the exact names for W25Q 0x40XX ID's flash parts, as the same
sizes of flashes comes with different ID's. so-that the distinguishes
becomes easy with this change.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-22 23:08:00 +05:30
Jagannadha Sutradharudu Teki
6fd1000224 sf: spansion: Correct name of S25FL128S 64K Sector part
Corrected the name of S25FL128S 64K sector part SPI flash,
S25FL128S supported has been added in below commit
"sf: spansion: Add support for S25FL128S"
(sha1: 1bfb9f156a)

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-22 23:08:00 +05:30
Tom Rini
348e47f766 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-06-22 07:38:12 -04:00
Ajay Kumar
9169543d1e video: exynos_fb: Add the missing #else clause
This patch fixes a bug introduced while adding DT support
to Exynos FIMD driver:

	commit c23f3157d6
	Author: Ajay Kumar <ajaykumar.rs@samsung.com>
	Date:   Thu Feb 21 23:53:01 2013 +0000

	    video: exynos_fb: add DT support for FIMD driver

Even though this part of code was missing, things were working
fine on Exynos5250 because, samsung_get_base_fimd() used
to give the correct base address for Exynos5250 FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-21 09:14:15 +09:00
Liu Gang
c8b281524b powerpc/boot: Change the macro of Boot from SRIO and PCIE master module
Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable
the master module of Boot from SRIO and PCIE on a platform. But this
is not a silicon feature, it's just a specific booting mode based on
the SRIO and PCIE interfaces. So it's inappropriate to put the macro
into the file arch/powerpc/include/asm/config_mpc85xx.h.

Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to
"CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from
arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros
in configuration header file of each board which can support the
master module of Boot from SRIO and PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20 17:08:48 -05:00
Prabhakar Kushwaha
3a88179d03 powerpc/mpc85xx: new SPL support for IFC NAND
Linker script is not able find start.o binary. So add its absolute path in
u-boot-spl.lds. This change is similar to u-boot-nand.lds

common/Makefile: Avoid compiling unnecssary files

fsl_ifc_spl.c : It is is responsible for reading u-boot binary from
NAND flash and copying into DDR. It also transfer control from NAND SPL
to u-boot image present in DDR.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20 16:08:58 -05:00
Albert ARIBAUD
69f14dc2fd Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
	spl/Makefile
2013-06-19 12:53:59 +02:00
Daniel Schwierzeck
eab2276458 mtd: nand: fix initialization of BBT options
commit dfe64e2c89
Author: Sergey Lapin <slapin@ossfans.org>
Date:   Mon Jan 14 03:46:50 2013 +0000

    mtd: resync with Linux-3.7.1

changed the initialization of BBT options. Fix drivers
jz4740 and s3c2410 which have not been updated yet and
cause compile errors.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-06-18 15:35:16 -05:00
Mike Dunn
211bf20c35 mtd: nand/docg4: fix driver after Linux resync
Commit dfe64e2c89:

    mtd: resync with Linux-3.7.1

broke the docg4 driver.  Specifically:
 - some of the prototypes of the ecc methods changed
 - the NAND_NO_AUTOINCR flag was removed
 - the ecc.strength element was added.

This patch fixes these.  Tested on the docg4 on my palmtre680 board.

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2013-06-17 17:26:12 -05:00
Rajeshwari Shinde
ed7bdc03eb MMC: DWMMC: Fix FIFO_DEPTH calculation
Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time
for mmc rescan command.
In current code FIFO_DEPTH is getting calculated after reading the default FIFOTH
register and extracting the RX_WMARK bits from it i.e (RX_WMARK = FIFO_DEPTH/2 -1).
Instead of storing the correct value, we were recalculating the FIFO_DEPT each
time which is not correct.

Based on "[PATCH V9 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues"
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/160247

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-17 11:03:42 +09:00
Tom Rini
dfdb3d37dd Merge branch 'master' of git://www.denx.de/git/u-boot-mmc 2013-06-14 16:06:49 -04:00
Stephen Warren
f866a46d6e mmc: report capacity for the selected partition
Enhance the MMC core to calculate the size of each MMC partition, and
update mmc->capacity whenever a partition is selected. This causes:

mmc dev 0 1 ; mmcinfo

... to report the size of the currently selected partition, rather than
always reporting the size of the user partition.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:52:19 -05:00
Andrew Gabbasov
01b77353e4 fsl_esdhc: Do not clear interrupt status bits until data processed
After waiting for the command completion event, the interrupt status
bits, that occured to be set by that time, are cleared by writing them
back. It is supposed, that it should be command related bits (command
complete and may be command errors).

However, in some cases the DMA already completes by that time before
the full transaction completes. The corresponding DINT bit gets set
and then cleared before even entering the loop, waiting for data part
completion. That waiting loop never gets this bit set, causing the
operation to hang. This is reported to happen, for example, for write
operation of 1 sector to upper area (block #7400000) of SanDisk Ultra II
8GB card.

The solution could be to explicitly clear only command related interrupt
status bits. However, since subsequent processing does not rely on
any command bits state, it could be easier just to remove clearing
of any bits at that point, leaving them all until all data processing
completes. After that the whole register will be cleared at once.

Also, on occasion, interrupts masking moved to before writing the command,
just for the case there should be no chance of interrupt between the first
command and interrupts masking.

Reported-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:52:19 -05:00
Fabio Estevam
c2137b10a4 mmc: fsl_esdhc: Fix hang after 'save' command
Since commit 48e0b2bd (powerpc/esdhc: Correct judgement for DATA PIO mode)
we see mx6 systems to hang after doing a 'save' command.

Revert this commit since the original 'ifdef' logic from 7b43db92
(drivers/mmc/fsl_esdhc.c: fix compiler warnings) was the correct one.

Reported-by: Tapani Utriainen <tapani@technexion.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:52:19 -05:00
Ruud Commandeur
a586c0aa21 mmc write bug fix
This patch fixes a bug related to mmc writes.

When doing fatwrites on an SD-Card, MMC bus problems can occur. Depending
on the size of the file, "MMC0: Bus busy timeout!" is reported, resulting
in an SD-Card that is no longer responding.
It appears to be, that set_cluster can be called with a size being zero.
That can be with a file that has a size being an exact multiple
(including 0) of the clustersize, but also for files that are smaller than
the size of one cluster.
The same problem occurs if the "mmc write" command is given with a block
count being 0.

By adding a check for the block count being zero in mmc_write_blocks
(drivers/mmc.c), this problem is solved.

Signed-off-by: Ruud Commandeur <rcommandeur@clb.nl>
Cc: Tom Rini <trini@ti.com>
Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Mats Karrman <Mats.Karrman@tritech.se>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:46:57 -05:00
Jagannadha Sutradharudu Teki
1695b29a5d mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwards
CAP register don't have any information for 8-bit buswidth support
on 2.0 sdhci spec, only from 3.0 onwards bit[18] got this information.

Due to this misassignment in sdhci, mmc is setting 8-bit buswidth using
mmc_set_bus_width even if controller doesn't support.
Below change has code information.
"mmc: Properly determine maximum supported bus width"
(sha1: 7798f6dbd5)

Bug log: <mmc plus and emmc cards)
-------
zynq-uboot> mmcinfo
Error detected in status(0x208100)!
Device: zynq_sdhci
Manufacturer ID: fe
.....

So enable 8-bit support only for 3.0 spec using CAP and for below 3.0
assign mmc->host_caps = MMC_MODE_8BIT on respective platform driver
if host have a support.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:44:49 -05:00
Tom Rini
f0df254663 Merge branch 'master' of git://git.denx.de/u-boot-spi 2013-06-13 15:18:35 -04:00
Tom Rini
41341221d1 Merge branch 'master' of git://git.denx.de/u-boot-arm
Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR

Conflicts:
	arch/arm/include/asm/arch-omap5/omap.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-06-13 15:16:15 -04:00
Jagannadha Sutradharudu Teki
ea7fcc5aeb sf: winbond: Correct the nr_blocks used for W25Q32DW
This patch corrected the nr_blocks used for W25Q32DW SPI flash.

nr_blcoks are incorrectly assigned on below patch
"sf: winbond: add W25Q32DW"
(sha1: 772ba15474)

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-13 23:42:46 +05:30
Jagannadha Sutradharudu Teki
fc2d721992 sf: winbond: Add support for W25Q80BW
Add support for Winbond W25Q80BW SPI flash.

This patch corrected the flash name, nr_blocks and
also commit message header from below patch.
"sf: winbond: add W25Q32"
(sha1: c969abc470)

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-13 23:42:46 +05:30
Jagannadha Sutradharudu Teki
59120ca365 sf: spansion: Update the name for S25FL256S flash
As the per the ID tabl the flash is under Uniform 64-kB sector
architecture, hence updated with proper name.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-13 23:42:46 +05:30
Axel Lin
ba1d1c2d9b spi: tegra20_sflash: Remove redundant code to set bus and cs of struct spi_slave
It's done in spi_alloc_slave(), thus remove the redundant code.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-06-13 22:55:30 +05:30
Axel Lin
d6f64d4a11 spi: tegra114_spi: Convert to use spi_alloc_slave()
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-06-13 22:55:24 +05:30
Axel Lin
0368292954 spi: armada100_spi: Remove unnecessary NULL test for dout and din
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-06-13 22:55:18 +05:30
Naveen Krishna Chatradhi
eeb7d6a238 power: exynos-tmu: use the mux_addr bit fields in tmu_control register
This patch implements the mux_addr bit fields defined in tmu_control
register (used for debugging purpose)

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:53:37 +09:00
Naveen Krishna Chatradhi
1149ca005a power: exynos-tmu: fix warnings and clean up code
This patch does the folowing
1. change the data types for unsigned int variable to unsigned
2. change the tmu_base type to struct exynos5_tmu_reg *
3. Add timer functionality for get_cur_temp()
4. error handling in the get_tmu_fdt_values()
5. Add check for curr_temp reading
6. some cosmotic changes.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:53:37 +09:00
Amar
3690d6d66b MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to access(open / close) and to resize boot partiton of EMMC.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:35:14 +09:00
Amar
752f4c4a9c SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
        exynos5-dt.c:   This file shall contain all code which supports FDT.
                        Any addition of FDT support for any module needs to be
                        added in this file.
        smdk5250.c:     This file shall contain the code which supports non-FDT.
                        version. Any addition of non-FDT support for any module
                        needs to be added in this file.
                        May be, the file smdk5250.c can be removed in near future
                        when non-FDT is not required.

The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.

NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:35:14 +09:00
Amar
a082a2dde0 EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:35:14 +09:00
Amar
9c50e35ff2 DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:35:13 +09:00
Heiko Schocher
c67b0e42a5 usb, composite: after unregister gadget driver set composite to NULL
Without this, second usb_composite_register() call fails always
with -EINVAL.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2013-06-12 22:22:52 +02:00
Stephen Warren
d3e0747846 usb: ehci: add missing cache managment
Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list"
didn't include any cache management in the new interrupt transfer path.
It also added an extra write to or_asynclistaddr in usb_lowlevel_init(),
without having flushed out the data there.

Add the missing cache management calls, so that the code works again.

This allows the USB keyboard on Tegra's Seaboard/Springbank boards to
work.

Cc: Patrick Georgi <patrick@georgi-clan.de>
Cc: Vincent Palatin <vpalatin@chromium.org>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-06-12 22:22:52 +02:00
Kuo-Jung Su
64cfd3f964 usb: gadget: add Faraday FOTG210 USB gadget support
The Faraday FOTG210 is an OTG chip which could operate
as either an EHCI Host or a USB Device at a time.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
2013-06-12 22:22:52 +02:00
Kuo-Jung Su
e82a316d7f usb: ehci: add Faraday USB 2.0 EHCI support
This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:

1. The PORTSC starts at 0x30 instead of 0x44.
2. The CONFIGFLAG(0x40) is not only un-implemented, and
   also has its address space removed.
3. Faraday EHCI is a TDI design, but it doesn't
   compatible with the general TDI implementation
   found at both U-Boot and Linux.
4. The ISOC descriptors differ from standard EHCI in
   several ways. But since U-boot doesn't support ISOC,
   we don't have to worry about that.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
2013-06-12 22:22:51 +02:00
Kuo-Jung Su
1dde1423ad usb: ehci: add weak-aliased function for PORTSC
There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
not only leave RESERVED and CONFIGFLAG registers un-implemented
but also has their address spaces removed.

As an result, the PORTSC register of Faraday EHCI always
starts from 0x30 instead of 0x44 in standard EHCI.

So that we'll need a weak-aliased function for abstraction.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
2013-06-12 22:22:51 +02:00
Kuo-Jung Su
9c6a9d7c8b usb: ehci: prevent bad PORTSC register access
1. The 'index' of ehci_submit_root() is not always > 0.

   e.g.
   While it gets invoked from usb_get_descriptor(),
   the 'index' is always a '0'. (See ch.9 of USB2.0)

2. The PORTSC register is not always required, and thus it
   should only report a port error when necessary.
   It would cause a port scan failure if the ehci_submit_root()
   always gets terminated by a port error.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
2013-06-12 22:22:51 +02:00
Vivek Gautam
f6664ba4bc usb: gadget: Use unaligned access for wMaxPacketSize
Use get_unaligned() while fetching wMaxPacketSize to avoid
voilating any alignment rules.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Dalek <luk0104@gmail.com>
Cc: Marek Vasut <marex@denx.de>
2013-06-12 22:22:51 +02:00
Julius Werner
4edcf0a3df usb: asix: Move software resets to basic_init
The ASIX driver calls a basic_init() function during get_info(), so that
not all initialization tasks need to be redone on every init().
Unfortunately, the most important one is still triggered too often: the
driver does a full port and MII reset on every asix_init(), requiring up
to several seconds to reestablish the link.

This patch confines that software reset into the asix_basic_init()
function so that it will only be executed once. This saves about a
second of boot time on systems using BOOTP.

Note: this patch was previously submitted many moons ago as:

   usb: usbeth: asix: Do a fast init if link already established

That patch seens to have been lost or forgotten, so this is a rebased
version. It is tested on snow with a Asix USB dongle (Cisco).

Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2013-06-12 22:22:51 +02:00
Simon Glass
ed10e66aba usb: Correct CLEAR_FEATURE code in ehci-hcd
This commit broke USB2 on link (Chromebook Pixel):

  020bbcb usb: hub: Power-cycle on root-hub ports

However the root cause seems to be a missing mask and missing 'break'
in ehci-hcd.c. This patch fixes both.

On link, 'usb start' with a USB keyboard and memory stick inserted now
finds both. The keyboard works as expected. Also ext2ls shows a directory
listing from the memory stick.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-12 22:22:50 +02:00
Lubomir Popov
960187ffa1 ARM: OMAP: I2C: New read, write and probe functions
New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4
(4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older
OMAPs and derivatives as well. The only anticipated exception would
be the OMAP2420, which shall require driver modification.
- Rewritten i2c_read to operate correctly with all types of chips
  (old function could not read consistent data from some I2C slaves).
- Optimised i2c_write.
- New i2c_probe, performs write access vs read. The old probe could
  hang the system under certain conditions (e.g. unconfigured pads).
- The read/write/probe functions try to identify unconfigured bus.
- Status functions now read irqstatus_raw as per TRM guidelines
  (except for OMAP243X and OMAP34XX).
- Driver now supports up to I2C5 (OMAP5).

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Tested-by: Heiko Schocher <hs@denx.de>
2013-06-10 08:43:26 -04:00
Tom Rini
7f5eef93af arm: Remove OMAP2420H4 and all omap24xx support
The omap2420H4 was the only mainline omap24xx board.  Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time.  Remove this board as there's not been interest in
it in U-Boot for quite a long time.

Signed-off-by: Tom Rini <trini@ti.com>
2013-06-10 08:43:19 -04:00
Lubomir Popov
e9090fa45a ARM: OMAP5: Power: Add more functionality to Palmas driver
Add some useful functions, and the corresponding definitions.

Add support for powering on the dra7xx_evm SD/MMC LDO
(courtesy Lokesh Vutla <lokeshvutla@ti.com>).

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-06-10 08:43:10 -04:00
Balaji T K
a5d439c2d3 mmc: omap_hsmmc: Update pbias programming
Update pbias programming sequence for OMAP5 ES2.0/DRA7

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:10 -04:00
Lokesh Vutla
9239f5b625 ARM: OMAP4+: Cleanup header files
After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:09 -04:00
Albert ARIBAUD
10e167329b Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
	drivers/serial/Makefile
2013-06-08 14:35:10 +02:00
Gabor Juhos
842033e696 pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option
The pci_indirect.c file is always compiled when
CONFIG_PCI is defined although the indirect PCI
bridge support is not needed by every board.

Introduce a new CONFIG_PCI_INDIRECT_BRIDGE
config option and only compile indirect PCI
bridge support if this options is enabled.

Also add the new option into the configuration
files of the boards which needs that.

Compile tested for powerpc, x86, arm and nds32.
MAKEALL results:

powerpc:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 641
  Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB )
  ----------------------------------------------------------
  Note: the warnings for ELPPC and MPC8323ERDB are present even
  without the actual patch.

x86:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 1
  ----------------------------------------------------------

arm:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 311
  ----------------------------------------------------------

nds32:
  --------------------- SUMMARY ----------------------------
  Boards compiled: 3
  ----------------------------------------------------------

Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
2013-06-07 14:17:01 -04:00
Tom Rini
47b8e52744 Merge branch 'master' of git://git.denx.de/u-boot-video 2013-06-07 08:35:36 -04:00
Tom Rini
38d240dcf8 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2013-06-07 08:34:34 -04:00
Stephen Warren
374e837069 input: Finish simplifing key_matrix_decode_fdt()
[trini: Applied v1 of the series rather than v2, this commit is the
delta from v1 to v2]

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
2013-06-06 10:48:30 -04:00
Tom Rini
1318d00e58 Merge branch 'tpm' of git://git.denx.de/u-boot-x86 2013-06-05 08:55:35 -04:00
Stephen Warren
df637fa6da input: simplify key_matrix_decode_fdt()
We know the exact property names that the code wants to process. Look
these up directly with fdt_get_property(), rather than iterating over
all properties within the node, and checking each property's name, in
a convoluted fashion, against the expected name.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-06-04 16:06:32 -04:00
Stephen Warren
e573617c09 input: fix unaligned access in key_matrix_decode_fdt()
Initialized character arrays on the stack can cause gcc to emit code that
performs unaligned accessess. Make the data static to avoid this.

Note that the unaligned accesses are made when copying data to prefix[] on
the stack from .rodata. By making the data static, the copy is completely
avoided. All explicitly written code treats the data as u8[], so will never
cause any unaligned accesses.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-06-04 16:06:32 -04:00
Sergey Lapin
4bfd0002b6 bug, nand, am33xx: nand->ecc.strength not set in board_nand_init()
commit dfe64e2c89
Author: Sergey Lapin <slapin@ossfans.org>
Date:   Mon Jan 14 03:46:50 2013 +0000

    mtd: resync with Linux-3.7.1

Introduced runtime bug:

U-Boot 2013.04-00499-g46567df-dirty (Jun 04 2013 - 08:17:08)

I2C:   ready
DRAM:  512 MiB
WARNING: Caches not enabled
NAND:  BUG: failure at nand_base.c:3214/nand_scan_tail()!
BUG!
resetting ...

on boards using drivers/mtd/nand/omap_gpmc.c as in board_nand_init()
nand->ecc.strength is not set. Fix this!

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sergey Lapin <slapin@ossfans.org>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Tom Rini <trini@ti.com>
2013-06-04 11:50:04 -05:00
Alison Wang
427eba706c arm: vf610: Add uart support for Vybrid VF610
This patch adds lpuart support for Vybrid VF610 platform.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
2013-06-03 10:56:53 +02:00
Alison Wang
3a36c6b268 arm: vf610: Add watchdog support for Vybrid VF610
This patch adds watchdog support for Vybrid VF610 platform.

Signed-off-by: Alison Wang <b18965@freescale.com>
2013-06-03 10:56:53 +02:00
Alison Wang
bcb6e9023a net: fec_mxc: Add support for Vybrid VF610
This patch adds FEC support for Vybrid VF610 platform.

In function fec_open(), RCR register is only set as RGMII mode. But RCR
register should be set as RMII mode for VF610 platform.
This configuration is already done in fec_reg_setup(), so this piece of
code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII /
FEC_RCNTRL_MII_MODE bits.

Signed-off-by: Alison Wang <b18965@freescale.com>
Reviewed-by: Benoit Thebaudeau <benoit.thebaudeau@advansee.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-03 10:56:53 +02:00
Tom Wai-Hong Tam
1b393db587 tpm: Reorganize the I2C TPM driver
This patch does a similar code reogranzation from
  http://patchwork.ozlabs.org/patch/132179/
which is based on an old version of code (fdt support and bus selection
still not in). It merges this tidy-up on top of the recent code. It does
not make any logical change.

tpm.c implements the interface defined in tpm.h based on underlying
LPC or I2C TPM driver. tpm.c and the underlying driver communicate
throught tpm_private.h.

Note: Merging the LPC driver with tpm.c is left to future patches.

Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-03 01:31:23 -07:00
Vincent Palatin
ec34fa5e43 tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C)
Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs,
which supports clockstretching, combined reads and a bus speed of
up to 400khz. The device also has a new device id.

This is based on the kernel patch provided by Infineon :
https://gerrit.chromium.org/gerrit/42332

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Luigi Semenzato <semenzato@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2013-06-03 01:26:25 -07:00
Che-liang Chiou
90899cc014 tpm: Rename generic_lpc_tpm to tpm_tis_lpc
The new name is more aligned with Linux kernel's naming of TPM driver.

Signed-off-by: Peter Huewe <peter.huewe@infineon.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
2013-06-03 01:26:25 -07:00
Jagannadha Sutradharudu Teki
60b6614ac8 cmd_sf: Add print mesgs on sf read/write commands
This patch adds a print messages while using 'sf read' and
'sf write' commands to make sure that how many bytes read/written
from/into flash device.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Tom Rini <trini@ti.com>
2013-06-03 00:04:41 +05:30
Jagannadha Sutradharudu Teki
96bbf55651 cmd_sf: Add print mesg for 'sf erase' command
This patch adds a print messages while using 'sf erase' command
to make sure that how many bytes erased in flash device.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Tom Rini <trini@ti.com>
2013-06-03 00:04:40 +05:30
Jagannadha Sutradharudu Teki
0d3b596aa3 sf: Fix sf read for memory-mapped SPI flashes
Missing return after memcpy is done for memory-mapped SPI flashes,
hence added retun 0 after memcpy done.

The return is missing in below patch
"sf: Enable FDT-based configuration and memory mapping"
(sha1: bb8215f437)

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-06-03 00:04:40 +05:30
Rajeshwari Shinde
e4eaef8910 spi: exynos: Support SPI_PREAMBLE mode
Support interfaces with a preamble before each received message.

We handle this when the client has requested a SPI_XFER_END, meaning
that we must close of the transaction. In this case we read until we
see the preamble (or a timeout occurs), skipping all data before and
including the preamble. The client will receive only data bytes after
the preamble.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-06-03 00:04:40 +05:30
Tom Rini
d6639d10db Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2013-05-31 18:28:47 -04:00
Sergey Lapin
dfe64e2c89 mtd: resync with Linux-3.7.1
This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:

- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.

- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).

To produce this update I used tag v3.7.1 of linux-stable repository.

The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-05-31 17:12:03 -05:00
Albert ARIBAUD
a19b0dd62d Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	common/cmd_fpga.c
	drivers/usb/host/ohci-at91.c
2013-05-30 14:45:06 +02:00
Kuo-Jung Su
ed03f41778 sf: winbond: Add support for W25PXX SPI flash
Add support for Winbond's W25PXX SPI flash.
These devices is used on Faraday A369 evaluation board.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
CC: Tom Rini <trini@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-05-28 13:09:04 +05:30
Jagannadha Sutradharudu Teki
47ccaa2e7d sf: winbond: Add support for W25Q256
Add support for Winbond W25Q256 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-05-28 13:08:47 +05:30
Marek Vasut
e90f7bde15 sf: spansion: Add Spansion S25FL064P IDs
This is a S25FL064A successor. It supports up to 104MHz bus
speed.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-05-28 12:48:57 +05:30
Xie Xiaobo
1bfb9f156a sf: spansion: Add support for S25FL128S
SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash
memory have the same device ID and Memory architecture. So they can
use the same config parameters.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:13 -05:00
Suresh Gupta
16d88f415a Enable XAUI interface for B4860QDS
- Added SERDES2 PRTCLs = 0x98, 0x9E
- Default Phy Addresses for Teranetics PHY on XAUI card
	The PHY addresses of Teranetics PHY on XAUI riser card are assigned
	based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on
	AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1
        and slot2
- Configure MDIO for 10Gig Mac

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:12 -05:00
Shaohui Xie
d54097b6c1 net/phy: fix select line for TN80xx
TN80xx has same PHY ID as TN2020, but it needs different setting to register
30.93 which used to select line, so we read register 30.32 which has
bit 15:12 to indicate PHY hardware version, for TN20xx we will get 3 or 2,
for TN80xx we will get 5 or 4.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:09 -05:00
Masahiro Yamada
24c185cf58 cfi_flash: return NULL for invalid base address input
When base address given was out of valid flash address ranges,
flash_get_info() function returned the pointer to the last
element of flash_info[i] array.

This patch changes this function to return NULL pointer
in such a case, which is more correct behaviour.

The function flash_protect_default() calls flash_protect()
immediately after flash_get_info() invocation.
With this correction, flash_protect() function would be
able to return soon, for NULL flash_info.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-23 09:48:45 +02:00
Masahiro Yamada
e2e273a3d7 cosmetic: cfi_flash: delete a space after an unary operator
Linux Kernel Documentation/CodingStyle says:
 Do not add a space after unary operators such as &, *, ...

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-23 09:48:45 +02:00
Andrew Gabbasov
aedadf10f0 cfi_flash: Fix unaligned accesses to cfi_qry structure
Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.

Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-23 09:47:59 +02:00
Prabhakar Kushwaha
a1b81ab26f nand/fsl_ifc: Convert to self-init
Convert NAND IFC driver to support CONFIG_SYS_NAND_SELF_INIT.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2013-05-22 16:53:42 -05:00
htbegin
453db36863 mtd: nand: use ssize_t instead of size_t to prevent infinite loop
When a all 0xFF buffer is passed to drop_ffs, the no-0xFF check loop
will loop forever.
After the fix, If ssize_t i = -1 and size_t l = i + 1, the value of l
will still be 0 as expected.

Signed-off-by: Tao Hou <hotforest@gmail.com>
Cc: Ben Gardiner <bengardiner@nanometrics.ca>
Cc: Scott Wood <scottwood@freescale.com>
2013-05-22 16:50:59 -05:00
htbegin
070fd8e529 mtd: nand: fix the partial page write condition
When writelen is mtd->writesize - 1, it is still a partial page write

Signed-off-by: Tao Hou <hotforest@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
2013-05-22 16:43:47 -05:00
Scott Wood
98d9d92359 nand/fsl_elbc: detect page size at runtime
This avoids needing a separate U-Boot config when some revisions
of a board have small-page NAND and other revisions have large-page
NAND (except for NAND SPL targets).

CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and
it gets in the way of this change.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-05-22 16:11:53 -05:00
Akshay Saraswat
ffbff1dd6e Exynos: uart: s5p: enabling the uart tx/rx fifo
This patch enables the uart tx/rx fifo. Now that fifo is enabled,
the uart read/write functions are modfied to check the UFSTAT register
for fifo status instead of UTRSTAT (as required with fifo's enabled).
Tested by booting linux kernel. Before enabling tx/rx fifo
"Uncompressing linux" message is garbled and after enabling it is proper.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-05-21 20:20:30 +09:00
Bo Shen
e5e8bb05a4 USB: ohci-at91: support sama5d3x devices
Add OHCI support for sama5d3x devices

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-21 11:54:13 +02:00
Rajeshwari Shinde
f10b4c0e65 SF: Add driver for Gigabyte device GD25LQ and GD25Q64B
This patch adds driver for the gigabyte devices
GD25LQ and GD25Q64B required for Snow Board.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-05-20 13:47:22 +09:00
Fabio Estevam
11f98d1f82 video: mxsfb: Add an entry for mx23evk/mx28vk video modes
Currently the mxsfb driver takes the display timings from the 'videomode'
environment variable.

Provide an example on how to set 'videomode' for using splash screen on
mx23evk and mx28vk boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Marek Vasut <marex@denx.de>
2013-05-16 17:44:46 +02:00
Haijun.Zhang
48e0b2bd2b powerpc/esdhc: Correct judgement for DATA PIO mode
The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:

Commit 7b43db9211
drivers/mmc/fsl_esdhc.c: fix compiler warnings

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Sun Yusong-R58495 <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-15 18:18:16 -05:00
Kuo-Jung Su
f6c3b34697 mmc: update Faraday FTSDC010 for rw performance
Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement this new version of driver which is
10+ times faster than the old one.

It's carefully designed to be compatible with Andes chips,
so it should be safe to replace it.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-15 18:18:15 -05:00
Tom Rini
fb651b10d4 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2013-05-15 08:41:04 -04:00
Wolfgang Denk
d6ed322222 Power: remove support for Freescale MPC8220
The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.

Remove the code to avoid wasting maitaining efforts on dead stuff.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
2013-05-15 08:41:03 -04:00
Ying Zhang
ade8a1a6d3 drivers/mmc: move spl_mmc.c to common/spl
The mpc85xx repuires a special layout on the memory device that is
connected to the eSDHC controller interface. But the file spl_mmc.c
didn't handle this specfic case, there needs a special treatmen, in
the powerpc drictory. So, there is no longer to keep spl_mmc.c on
mpc85xx, CONFIG_SPL_FRAMEWORK is not set.

When CONFIG_SPL_MMC_SUPPORT is set and CONFIG_SPL_FRAMEWORK is not
set, there was an error in drivers/mmc/spl_mmc.c:

drivers/mmc/libmmc.o:(.got2+0x8): undefined reference to `spl_image'.

Now, the solution is to move the file "spl_mmc.c" to directory "common/spl".

Signed-off-by: Ying Zhang <b40530@freescale.com>
2013-05-15 08:41:03 -04:00
Masahiro Yamada
bee0dc2fec smc911x: fix the timeout detection
If timeout is occurred at the while loop above,
the value of 'timeout' is -1, not 0.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-05-15 08:41:03 -04:00
Roy Zang
3fa75c875c T4/usb: move usb 2.0 utmi dual phy init code to cpu_init.c
This is what we have done for the UTMI PHY on P3041/P5020. Then the PHY
initialization can be reused in kernel without  “usb start” command.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:13:25 -05:00
Shaohui Xie
7794b1a7e6 net/phy: add VSC8574 support
The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
interfaces for quad-port dual media capability. This driver supports SGMII
and QSGMII MAC mode. For now SGMII mode is tested.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:13:25 -05:00
Shengzhou Liu
ae8a5d10f3 net/fm: fixup ethernet for mEMAC
- set proper compatible property name for mEMAC.
- fixed ft_fixup_port for dual-role mEMAC, which will lead to
  MAC node disabled incorrectly.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:13:24 -05:00
York Sun
b62408464b powerpc/mpc85xx: Add T4160 SoC
T4160 SoC is low power version of T4240. The T4160 combines eight dual
threaded Power Architecture e6500 cores and two memory complexes (CoreNet
platform cache and DDR3 memory controller) with the same high-performance
datapath acceleration, networking, and peripheral bus interfaces.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:00:29 -05:00
Roy Zang
1e501f9136 T4/USB: Add USB 2.0 UTMI dual phy support
T4240 internal UTMI phy is different comparing to previous UTMI PHY
in P3041.
This patch adds USB 2.0 UTMI Dual PHY new memory map and enable it for
T4240.
The phy timing is very sensitive and moving the phy enable code to
cpu_init.c will not work.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:00:28 -05:00
Shaohui Xie
944b6ccf1b Fman/t4240: some fix for 10G XAUI
1. fix 10G mac offset by plus 8;
2. add second 10G port info for FM1 & FM2 when init ethernet info;
3. fix 10G lanes name to match lane protocol table;

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:00:26 -05:00
Lubomir Popov
e7dcecea9b OMAP5: Enable USB Ethernet support with LAN9730
Added the LAN9730 to list of supported devices. This chip is used
in the sEVM, uEVM and som5_evb. Tested on the som5_evb with dhcp
and ping.

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
2013-05-14 15:37:58 -04:00
Sonic Zhang
da34aae5fb bfin: Move gpio support for bf54x and bf60x into the generic driver folder.
The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx.
A lot of machine macros are used to accomodate both code in one gpio driver.
This patch split the old gpio driver and move new gpio2 support to the generic
gpio driver folder.

- To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's
config header file.
- The gpio2 driver supports bf54x, bf60x and future ADI processors, while the
older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561.
- All blackfin specific gpio function names are replaced by the generic gpio APIs.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:27 +08:00
Marek Vasut
e6c5ab28c7 blackfin: The buf variable in bfin_mac.c is not used and produces warning,
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:27 +08:00
Sonic Zhang
9d803fc812 blackfin: Move blackfin serial driver out of blackfin arch folder.
- Move blackfin serial driver to the generic driver folder.
- Move blackfin serial headers to blackfin arch head folder.
- Update the include path to blackfin serial header in start up code.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:26 +08:00
Sonic Zhang
e9a389a184 blackfin: Move blackfin watchdog driver out of the blackfin arch folder.
- Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined.
- Move blackfin hw watchdog driver to the generic driver folder.
- Call hw_watchdog_init() from blackfin board init code.
- Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS
- Update README.watchdog accordingly

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:26 +08:00
Scott Jiang
d4d4f90377 bfin: discard invalid data and clear RXS in bf5xx spi driver
There may be dirty data in RDBR, so we should discard invalid data.
This operation also clears RXS bit in STAT register.

Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:26:27 +08:00
Scott Jiang
e76276df74 bfin: Remove spi dma function in bf5xx.
BF5xx rx dma causes spi flash random read error.
Accually spi controller has problems both on tx and rx dma.
So remove spi dma support in u-boot.

Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:26:27 +08:00
Bo Shen
93e3236ccb mmc: atmel_mci: add mmc card support
add mmc card support with atmel mci driver

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-12 16:48:11 +02:00
Bo Shen
aac4b69b2c mmc: atmel_mci: using IP version for different setting
Using IP version for different setting
  - Higher version supports 8bit mode
  - Higher version bus width setting is different

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-12 16:47:05 +02:00
Bo Shen
e0d2d3bd29 spi: atmel_spi: using ip version to check whether has wdrbt
Using IP version to check whether it has wdrbt bit in mode register

Tested in at91sam9x5ek and at91sam9n12ek.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[fix warning about incompatible parameter]
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-12 16:36:11 +02:00
Albert ARIBAUD
cac423a730 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-05-11 22:24:28 +02:00
Albert ARIBAUD
c1b43ac769 Revert wrong removal of nand_init and nand_deselect
The manual resolution in commit ec7023db wrongly removed functions
nand_init and nand_deselect from file drivers/mtd/nand/mxc_nand_spl.c.
Revert this removal.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-05-11 22:23:04 +02:00
Albert ARIBAUD
ec7023db8d Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
	drivers/mtd/nand/mxc_nand_spl.c
	include/configs/m28evk.h
2013-05-11 09:25:36 +02:00
Albert ARIBAUD
e825b100d2 Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master' 2013-05-11 00:06:03 +02:00
Nishanth Menon
ff2d57ea5e palmas: use palmas_i2c_[read|write]_u8
commit 21144298 (power: twl6035: add palmas PMIC support)
introduced twl6035_i2c_[read|write]_u8
Then, commit dd23e59d (omap5: pbias ldo9 turn on)
introduced palmas_[read|write]_u8 for precisely the same access
function. TWL6035 belongs to the palmas family, so instead of having
an twl6035 API, we could use an generic palmas API instead.

To stay consistent with the function naming of twl4030,6030 accessors,
we use palmas_i2c_[read|write]_u8

Cc: Balaji T K <balajitk@ti.com>
Cc: Sricharan R <r.sricharan@ti.com>
Reported-by: Ruchika Kharwar <ruchika@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:55 -04:00
Nishanth Menon
384bcae013 palmas: rename twl6035_mmc1_poweron_ldo with an palmas generic function
Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs,
rename twl6035_mmc1_poweron_ldo by a more generic palmas_mmc1_poweron_ldo
function.

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:55 -04:00
Nishanth Menon
12733881e9 palmas: rename init_settings to an generic palmas init
Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs,
rename twl6035_init_settings with an more generic palmas_init_settings

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:55 -04:00
Nishanth Menon
cb199102b0 twl6035: rename to palmas
TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs
Rename twl6035 to palmas to allow reuse across multiple current and
future platforms

As part of this change, change the CONFIG_TWL6035_POWER to
CONFIG_PALMAS_POWER and update usage of header file accordingly.

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:54 -04:00
Nishanth Menon
ebce10e5b2 twl6030: move twl6030 register access functions to common header file
twl6030_i2c_[read|write]_u8 can be used else where to access
multi-function device such as twl6030, so move the register access
functions to the common twl6030.h header file.

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:54 -04:00
Nishanth Menon
345ef20465 twl6030: twl6030_i2c_[read|write]_u8 prototype consistent
u-boot standard i2c register access prototype is
i2c_read(addr, reg, 1, &buf, 1)
i2c_reg_write(u8 addr, u8 reg, u8 val)

twl6030_i2c_read_u8(u8 addr, u8 *val, u8 reg)
twl6030_i2c_write_u8(u8 addr, u8 val, u8 reg)
does not provide consistency, so switch the prototype to be
consistent with rest of u-boot i2c operations:
twl6030_i2c_read_u8(u8 addr, u8 reg, u8 *val)
twl6030_i2c_write_u8(u8 addr, u8 reg, u8 val)

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:54 -04:00
Nishanth Menon
b29c2f0c14 twl4030: make twl4030_i2c_read_u8 prototype consistent
u-boot standard i2c read prototype is
i2c_read(addr, reg, 1, &buf, 1)

twl4030_i2c_read_u8(u8 addr, u8 *val, u8 reg)
does not provide consistency, so switch the prototype to be
consistent with rest of u-boot i2c operations:
twl4030_i2c_read_u8(u8 addr, u8 reg, u8 *val)

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:54 -04:00
Nishanth Menon
0208aaf6c2 twl4030: make twl4030_i2c_write_u8 prototype consistent
u-boot standard i2c register write prototype is
i2c_reg_write(u8 addr, u8 reg, u8 val)

twl4030_i2c_write_u8(u8 addr, u8 val, u8 reg)
does not provide consistency, so switch the prototype to be
consistent with rest of u-boot i2c operations:
twl4030_i2c_write_u8(u8 addr, u8 reg, u8 val)

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:54 -04:00
Matt Porter
f485c8a35b phy: add support for ET1011C phys
Adds an ET1011C PHY driver which is derived from the
Linux kernel PHY driver (drivers/net/phy/et1011c.c)
from the v3.9-rc2 tag. Note that an errata workaround
config option is implemented to allow for TX_CLK to be
enabled even when gigabit mode is negotiated. This
workaround is used on the PG1.0 TI814X EVM.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-05-10 08:25:54 -04:00
Matt Porter
f6f86a64ac cpsw: add support for TI814x slave_regs differences
TI814x's version 1 CPSW has a different slave_regs layout.
Add support for the differing registers.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-05-10 08:25:54 -04:00
Michal Simek
4e779ad2e5 gpio: Add support for microblaze xilinx GPIO
Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.

Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.

There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.

Adding several gpios IP is also possible and supported.

For listing gpio configuration please use "gpio status" command

This patch also remove one compilation warning:
microblaze-generic.c: In function 'do_reset':
microblaze-generic.c:38:47: warning: operation on '*1073741824u'
 may be undefined [-Wsequence-point]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 11:20:08 +02:00