Commit graph

62641 commits

Author SHA1 Message Date
Alifer Moraes
62cdfdcc81 mx8mm_evk: spl: Staticize functions
Functions spl_dram_init() and power_init_board() are used only in
the scope of this file, so make them static to fix the following sparse
warnings:

board/freescale/imx8mm_evk/spl.c:40:6: warning: no previous prototype
for ‘spl_dram_init’ [-Wmissing-prototypes]

board/freescale/imx8mm_evk/spl.c:85:5: warning: no previous prototype
for ‘power_init_board’ [-Wmissing-prototypes]

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-01-20 15:38:16 +01:00
Alifer Moraes
c27483fcb0 imx8m: clock_imx8mm: Staticize functions
Functions fracpll_configure(), decode_intpll(), decode_fracpll(),
get_root_src_clk() and get_root_clk() are used only in the scope of this
file, so make them static to fix the following sparse warnings:

arch/arm/mach-imx/imx8m/clock_imx8mm.c:50:5: warning: no previous
prototype for ‘fracpll_configure’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:271:5: warning: no previous
prototype for ‘decode_intpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:418:5: warning: no previous
prototype for ‘decode_fracpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:483:5: warning: no previous
prototype for ‘get_root_src_clk’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:527:5: warning: no previous
prototype for ‘get_root_clk’ [-Wmissing-prototypes]

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-01-20 15:38:16 +01:00
Flavio Suligoi
7132d38cbe imx: fix typo in header file
Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
2020-01-20 15:38:16 +01:00
Flavio Suligoi
1e994e2f3d fsl: fix typo in header file
Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
2020-01-20 15:38:16 +01:00
Alifer Moraes
5255f85c6e imx8mm_evk: Include sys_proto.h header
Add sys_proto.h header file to fix the following sparse warning:

board/freescale/imx8mm_evk/imx8mm_evk.c:59:5: warning: no previous
prototype for ‘board_mmc_get_env_dev’ [-Wmissing-prototypes]

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-01-20 15:38:16 +01:00
Jorge Ramirez-Ortiz
4cd1f979b2 arm: dts: imx7ulp-evk: remove mux value from pad configuration
The mux mode is embedded in the PAD definition and therefore there is
no need to repeat it in the PAD configuration value (more over since
this information will be masked out when the configuration value is
applied).

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Flavio Suligoi
11c04aa671 imx: imx8mm_evk: remove hdmi fw info from README
The imx8mm doesn't require the hdmi firmware.
Update also the fw version.

Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-20 15:38:16 +01:00
Joris Offouga
e2b14bf4ba mx7dsabre: Fix dm probe pmic
With commit 0d52bab462 ("mx7dsabre: Enable DM_ETH")

Device Tree has been update and change pfuze3000 node

Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Jorge Ramirez-Ortiz
30b8eb5ee6 mx7ulp: soc: s_init should only be executed once
On SPL enabled systems, the current s_init code (wdog, clock and ldo
init) is executed twice (by SPL and u-boot). This is not necessary and
might lead to boot issues (ie, starting PMC1 when it is already running).

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Fabio Estevam
d7e5d97207 mx7ulp_evk_plugin: Disable CONFIG_NET
Currently the following build warning is seen:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
===================================================

Since the mx7ulp-evk board does not have networking support, explicitly
disable networking.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Anatolij Gustschin
68b49056e6 arm: dts: i.mx8x: add #cooling-cells properties
Fix dtb building warnings:
Warning (cooling_device_property): /thermal-zones/cpu-thermal0/cooling-maps/map0:
Missing property '#cooling-cells' in node /cpus/cpu@0 or bad phandle (referred from cooling-device[0])

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Arkadiusz Karas
5b6f8f3083 ARM: imx: mx6ull: Add iMX6ULL VisionSOM SoM and EVK
Add iMX6ULL VisionSOM SoM and VisionCB-RT-STD evaluation board support.
The SoM has an iMX6ULL, 512 MiB of DRAM and microSD slot. The carrier
board has Ethernet, USB host port, USB OTG port.

Signed-off-by: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-01-20 15:38:16 +01:00
Marek Vasut
9d12303322 ARM: imx: vining2000: Enable SPL SDP by default
Enable SPL SDP fallback boot option in default build.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-01-20 15:37:23 +01:00
Marek Vasut
f3284e401e ARM: imx: vining2000: Properly discern PFUZE100 and PFUZE200
The PFUZE100 and PFUZE200 PMICs can be discerned by bit 0 in DeviceID
register. Print the correct identification of the PMICs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-01-20 15:37:23 +01:00
Marek Vasut
625bbd38a6 ARM: imx: vining2000: Clean up uSDHC4 setup
Simplify the uSDHC4 eMMC controller setup. This is the only eMMC
present on the system and only controller that is used, so drop
the extra logic.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-01-20 15:37:23 +01:00
Stefano Babic
0e78c9181c Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-01-20 15:36:13 +01:00
Tom Rini
2d2f91a480 Merge branch '2020-01-17-improve-aes-support'
- Add support and tests for AES192 and AES256
2020-01-17 13:23:32 -05:00
Philippe Reynes
4df3578119 u-boot: fit: add support to decrypt fit with aes
This commit add to u-boot the support to decrypt
fit image encrypted with aes. The FIT image contains
the key name and the IV name. Then u-boot look for
the key and IV in his device tree and decrypt images
before moving to the next stage.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-17 10:16:29 -05:00
Philippe Reynes
7298e42250 mkimage: fit: add support to encrypt image with aes
This commit add the support of encrypting image with aes
in mkimage. To enable the ciphering, a node cipher with
a reference to a key and IV (Initialization Vector) must
be added to the its file. Then mkimage add the encrypted
image to the FIT and add the key and IV to the u-boot
device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-17 10:15:49 -05:00
Philippe Reynes
1c6cd16de8 aes: add test unit for aes196 and aes256
This commit add test unit for aes196 and aes256.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17 10:15:49 -05:00
Philippe Reynes
ebcdb8df51 aes: add test unit for aes128
This commit add test unit for aes128.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17 10:15:49 -05:00
Philippe Reynes
8302d1708a aes: add support of aes192 and aes256
Until now, we only support aes128. This commit add the support
of aes192 and aes256.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17 10:15:49 -05:00
Philippe Reynes
7012c04ef3 aes: add a define for the size of a block
In the code, we use the size of the key for the
size of the block. It's true when the key is 128 bits,
but it become false for key of 192 bits and 256 bits.
So to prepare the support of aes192  and 256,
we introduce a constant for the iaes block size.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17 10:15:49 -05:00
Fabio Estevam
9c27310ac2 mx7ulp: Move SoC base address to a common file
SoC base addresses should better go into a common SoC file instead
of repeating the definition in each board file.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-16 21:02:56 +01:00
Fabio Estevam
a44083c053 mx7ulp_evk: Remove unneeded SDHC definitions
As we use the driver model for ESDHC there is no need
for defining CONFIG_SYS_FSL_USDHC_NUM and CONFIG_SYS_FSL_ESDHC_ADDR,
so simply remove them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-16 21:02:56 +01:00
Fabio Estevam
d2e38f5a9b mx7ulp_evk: Disable CONFIG_NET
Currently the following build warning is seen:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
===================================================

Since the mx7ulp-evk board does not have networking support, explicitly
disable networking.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-16 21:02:56 +01:00
Tom Rini
d7bb6aceb2 Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Cleanup of fsl_esdhc driver together with arch/defconfig change
- Add quirk for APP_CMD retry
2020-01-16 13:20:51 -05:00
Tom Rini
994bb86fc9 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Clearfog: Fix SD booting (Baruch)
- Misc updates to MMC handling in SPL to support booting from
  main data partition (vs hardware boot partition) on MVEBU (Baruch)
2020-01-16 12:52:07 -05:00
Tom Rini
92329e2413 Xilinx/FPGA changes for v2020.04
ARM64:
 - Add INIT_SPL_RELATIVE dependency
 
 SPL:
 - FIT image fix
 - Enable customization of bl2_plat_get_bl31_params()
 
 Pytest:
 - Add test for octal/hex conversions
 
 Microblaze:
 - Fix manual relocation for one SPI instance
 
 Nand:
 - Convert zynq/zynqmp drivers to DM
 
 Xilinx:
 - Enable boot script location via Kconfig
 - Support OF_SEPARATE in board FDT selection
 - Remove low level uart setup it is done later by code
 - Add support for DEVICE_TREE variable passing for SPL
 
 Zynq:
 - Enable jtag boot mode via distro boot
 - Removing unused baseaddresses from hardware.h
 - DT fixups
 
 ZynqMP:
 - Fix emmc boot sequence
 - Simplify spl logic around bss and board_init_r()
 - Support psu_post_config_data() calling
 - Tune mini-nand DTS
 - Fix psu wiring for a2197 boards
 - Add runtime MMC device boot order filling in spl
 - Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
 - Add support u-boot.its generation
 - Use single image configuration for all platforms
 - Enable PANIC_HANG via Kconfig
 - DT fixups
 - Firmware fixes
 - Add support for zcu208 and zcu1285
 
 Versal:
 - Fix emmc boot sequence
 - Enable board_late_init() by default
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXiAK2AAKCRDKSWXLKUoM
 IX3VAJ41GJXBwP7Z9hX9RFhsqOu0M+NdegCdFvMUaCQ1bSvgAMOnDL+JeB21+Qo=
 =qSbv
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.04

ARM64:
- Add INIT_SPL_RELATIVE dependency

SPL:
- FIT image fix
- Enable customization of bl2_plat_get_bl31_params()

Pytest:
- Add test for octal/hex conversions

Microblaze:
- Fix manual relocation for one SPI instance

Nand:
- Convert zynq/zynqmp drivers to DM

Xilinx:
- Enable boot script location via Kconfig
- Support OF_SEPARATE in board FDT selection
- Remove low level uart setup it is done later by code
- Add support for DEVICE_TREE variable passing for SPL

Zynq:
- Enable jtag boot mode via distro boot
- Removing unused baseaddresses from hardware.h
- DT fixups

ZynqMP:
- Fix emmc boot sequence
- Simplify spl logic around bss and board_init_r()
- Support psu_post_config_data() calling
- Tune mini-nand DTS
- Fix psu wiring for a2197 boards
- Add runtime MMC device boot order filling in spl
- Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
- Add support u-boot.its generation
- Use single image configuration for all platforms
- Enable PANIC_HANG via Kconfig
- DT fixups
- Firmware fixes
- Add support for zcu208 and zcu1285

Versal:
- Fix emmc boot sequence
- Enable board_late_init() by default
2020-01-16 09:45:40 -05:00
Tom Rini
f47704d4ae Merge branch '2020-01-15-master-imports'
- MediaTek improvements
- Some generic clk improvements
- A few assorted bugfixes
2020-01-16 09:40:09 -05:00
Sam Shih
7b2e07ad34 configs: mediatek: fix mt7623n bpir2 defconfig
This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig
to fix the mt7623 compile error after building others mediatek target
platform

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
098c063765 arm: dts: mediatek: move u-boot properties to -u-boot.dtsi file
This patch move u-boot properties to -u-boot.dtsi file.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
c7fbc62082 Add support for MT7622 reference board
This adds a general board file based on MT7622 SoCs from MediaTek.
This commit is adding the basic boot support for the MT7622 rfb.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-01-16 09:39:45 -05:00
Sam Shih
25273dbd57 mmc: add mmc and sd support for MT7622
This patch add mmc and sd support for Mediatek MT7622 SoCs

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
abb65f123c power: domain: add power domain support for MT7622
This patch add power domain support for Mediatek MT7622 SoCs

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
d8588ba55f clk: mediatek: fix clock-rate overflow problem
This patch fix clock-rate overflow problem in mediatek
clock driver common part.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
72ab603b20 clk: mediatek: add driver for MT7622
This patch add clock driver for MediaTek MT7622 SoC.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
cf400b63b4 pinctrl: mediatek: add support for different pinctrl
Due to the pinctrl hardware of MT7622 is difference from others
SoC which using the common part of mediatek pinctrl.
So we need to modify the common part of mediatek pinctrl.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
a430149c99 pinctrl: mediatek: add driver for MT7622
This patch add Pinctrl driver for MediaTek MT7622 SoC.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
ac57e2b013 ARM: MediaTek: Add support for MediaTek MT7622 SoC
Add support for MediaTek MT7622 SoC. This include the file
that will initialize the SoC after boot and its device tree.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
ce0069ed95 phy: phy-mtk-tphy: make ref clock optional
If make the ref clock optional, no need refer to fixed-clock when
the ref clock is always on or comes from oscillator directly.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
3b6351a475 phy: phy-mtk-tphy: remove the check of -ENOSYS
No need check -ENOSYS anymore after add dummy_enable() for
fixed-clock.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
6bf6d81c11 clk: fixed_rate: add dummy enable() function
This is used to avoid clk_enable() return -ENOSYS.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
d646420e29 clk: add APIs to get (optional) clock by name without a device
Sometimes we may need get (optional) clock without a device,
that means use ofnode.
e.g. when the phy node has subnode, and there is no device created
for subnode, in this case, we need these new APIs to get subnode's
clock.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
bd7c798605 clk: check valid clock by clk_valid()
Add valid check for clk->dev, it's useful when get optional
clock even when the clk point is valid, but its dev will be
NULL.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
0f9b2b3ddf clk: fix error check for devm_clk_get_optional()
If skip all return error number, it may skip some real error cases,
so only skip the error when the clock is not provided in DTS

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Chunfeng Yun
5f82a940a0 clk: mediatek: mt7629: add support for ssusbsys
The SSUSB IP's clocks come from ssusbsys module on mt7629,
so add its driver

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
b9bf3cbfd6 ARM: MediaTek: add basic support for MT8512 boards
This adds a general board file based on MT8512 SoCs from MediaTek.

Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.

This commit is adding the basic boot support for the MT8512 eMMC board.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
fb80eaa9d8 mmc: mtk-sd: fix hang when data read quickly
For CMD21 tuning data, the 128/64 bytes data may coming in very
short time, before msdc_start_data(), the read data has already
come, in this case, clear MSDC_INT will cause the interrupt disappear
and lead to the thread hang.

the solution is just clear all interrupts before command was sent.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
3b0397d48b mmc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCs
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs.
MT8512/MT8110 SoCs puts the tune register at top layer, so
need add new code to support it.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00