Commit graph

14171 commits

Author SHA1 Message Date
Tom Rini
61523dde17 Merge tag 'arc-updates-for-2018.09-rc2' of git://git.denx.de/u-boot-arc
That's a set of prety minor changes and fixes for ARC.

Among them:
 * Improvement in CREG GPIO driver used on ARC dev boards
   that allow us to re-use the driver for SPI's chip select

 * Enable SPI-flsh on AXS10x boards which allows to update
   U-Boot binary that gets loaded by boot-ROM

 * Fix accommodating always utilized unaligned access by
   GCC for ARC starting from 8.1.0
2018-08-01 09:26:15 -04:00
Michal Simek
b3815fc4e5 dm: Fix CMD_DM enabling
The patch "dm: Change CMD_DM enabling"
(sha1: 08a00cba06) was incorrectly updated
and PICO_IMX7D is missing imply CMD_DM and WARP7 has it twice.
This patch is fixing it.

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-31 14:46:22 -04:00
Alexey Brodkin
8f590063ba ARC: Enable unaligned access in hardware if compiler uses it
Even if ARC core might handle unaligned access to data this
hardware feature by default is disabled.

But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores.
Which leads to quite strange and fatal run-time failures like the one
below if HW is not configured properly:
| hsdk# sf probe
| Misaligned data access exception @ 0xbff794d4
| ECR:    0x000d0000
| RET:    0xbff794d4
| BLINK:  0xbff79644
| STAT32: 0x00000800
| GP: 0x1003e000   r25: 0xbfd58f08
| BTA: 0xbff794a4  SP: 0xbfd58cd4  FP: 0xbfd58ef0
| LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000
| r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf
| r03: 0x00000000 r04: 0x00000100 r05: 0x00000000
| r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500
| r09: 0x00000000 r10: 0x00200000 r11: 0x00000000
| r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68
| r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000
| r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40
| r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000
| r24: 0xbfd59ba8
| Resetting CPU ...

Now we're checking for __ARC_UNALIGNED__ define emitted by the
compiler if it's going to use unaligned access and then we
force-enable it in hardware too.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
cdfe6913c1 AXS10x: add spi flash support
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
fe3eb7a887 GPIO: CREG: improve flexibility of hsdk-creg-gpio driver
CREG GPIO is a driver for weird soc-specific output ports, which are
controlled by some fields in memory mapped register.

Example:

31                 9        7        5           0   < bit number
|                  |        |        |           |
[     not used     | gpio-1 | gpio-0 | <-shift-> ]   < 32 bit register
                       ^        ^
                       |        |
                write 0x2 == set output to "1" (activate)
                write 0x3 == set output to "0" (deactivate)

As of tooday we only support fixed (hardcoded) bit per gpio line,
activate / deactivatei and shift values. Fix that by read them from
device tree to be able to use this driver for other boards.

Remove "hsdk" prefix from compatible string as this driver can be
used with different boards like HSDK, AXS101, AXS103, etc.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Tom Rini
406fd7e207 Patch queue for efi - 2018-07-25
Highlights this time:
 
   - Many small fixes to improve spec compatibility (found by SCT)
   - Almost enough to run with sandbox target
   - GetTime() improvements
   - Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-07-25

Highlights this time:

  - Many small fixes to improve spec compatibility (found by SCT)
  - Almost enough to run with sandbox target
  - GetTime() improvements
  - Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y
2018-07-30 16:02:29 -04:00
Michal Simek
58008cbab5 Kconfig: Sort bool, default, select and imply options
Another round of sorting Kconfig entries aplhabetically.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Michal Simek
08a00cba06 dm: Change CMD_DM enabling
CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Michal Simek
5ed063d10f Kconfig: Sort bool, default, select and imply options
Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-30 07:18:48 -04:00
Michal Simek
6e7bdde4fe Kconfig: Replace spaces with tabs and missing newline
Trivial Kconfig cleanup. Use tabs instead of spaces and every Kconfig
entry should be separated by newline.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:47 -04:00
Tom Rini
0e8a8a3110 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-07-27 13:09:30 -04:00
Tom Rini
53885e76ce Merge branch 'master' of git://git.denx.de/u-boot-tegra 2018-07-26 23:12:39 -04:00
Tom Warren
2eea126916 tegra: beaver/apalis: Fix DTC warning
Fix warning when compiling tegra30-beaver/-apalis.dts with latest DTC:

  "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary
   #address-cells/#size-cells without "ranges" or child "reg" property"

Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:31 -07:00
Stephen Warren
6e584e633d ARM: tegra: avoid using secure carveout RAM
If a secure carveout exists, U-Boot cannot use that memory. Fix
carveout_size() to reflect this, and hence transitively fix
usable_ram_size_below_4g() and board_get_usable_ram_top(). This change
ensures that when U-Boot copies the secure monitor code to install it, the
copy target is not in-use for U-Boot code/data.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Stephen Warren
74c69cdcc0 ARM: PSCI: Enable the PSCI node
When fixing up the DT to report PSCI support, explicitly enable the node.
DTs may ship with the node disabled in case a PSCI implementation is not
present, and expect any PSCI implementation to enable the node if they are
actually present.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Stephen Warren
326bd726d0 ARM: PSCI: Support PSCI v0.2
Enhance the PSCI DT editing code to allow setting a PSCI v0.2 compatible
value in the DT. The CONFIG_ option is added to the whitelist to match the
existing PSCI_1_0 option. While not adding new options to Kconfig isn't
ideal, I figure it's better to keep related options together.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Stephen Warren
3e3b2b4776 ARM: define MON_MODE
Add a MON_MODE define for ARM's monitor mode. This can be used later by
a secure monitor to avoid hard-coding mode IDs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:30 -07:00
Bibek Basu
3cc7942a4a ARM: tegra: implement RAM repair
RAM repair has a few pre-requisites:
1) PMIC power supply (rail) enabled.
2) PMC CRAIL power partition powered.
3) Fuse clock active (it's the default).
4) PLLP reshift branch enabled (it's the default, when PLLP is active).

RAM repair also only need run whenever specific partitions are powered
(main SoC and CCPLEX respectively); RAM repair does not need to be
triggered when any other partition changes state.

start_cpu() needs to be re-ordered slightly to match these requirements.
Note that C0NC and CE0 aren't required for RAM repair to
operate, but they also do no harm, so the entire of powerup_cpus() is
moved rather than splitting it up. The call to remove_cpu_resets() is
moved last to ensure that all other actions complete before releasing
reset; since the PMC power partitions are now enabled early, releasing
reset is what causes the CPUs to start executing code, and RAM repair must
complete before the CPU boots.

Note that this commit is the result of squashing a numbmer of commits
in NVIDIA's downstream L4T branch, hence the multiple signoffs below.

Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:29 -07:00
Stephen Warren
daebd48fe8 Revert "tegra: Introduce SRAM repair on tegra124"
This reverts commit 701b7b1d2c. It will
be immediately replaced by a different implementation that is more
complete and runs are more targetted times.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-07-26 13:15:29 -07:00
Tom Rini
a57d45db90 Merge branch 'master' of git://git.denx.de/u-boot-net 2018-07-26 15:55:42 -04:00
Joe Hershberger
9cce566321 arm: Prevent redefinition error in fsl-layerscape
The include/phy.h will start including dm.h, which pulls in
linux/compat.h after the attempted redefinition in
arch/arm/include/asm/armv8/mmu.h, so move this include to allow
redefinition.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-26 14:08:21 -05:00
Joe Hershberger
f40a31e695 sandbox: eth-raw: Add a SIMPLE_BUS to enumerate host interfaces
Ask the OS for each of its interfaces and for each one, bind a U-Boot
device and then probe it. This will allocate the priv data structure
that is then populated.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:19 -05:00
Joe Hershberger
c9e2caff85 sandbox: eth-raw: Allow interface to be specified by index
With systemd stable interface names, eth0 will almost never exist.
Instead of using that name in the sandbox.dts, use an index.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
ac13270b49 sandbox: eth-raw: Add a function to ask the host about localhost
Instead of doing a simple string compare against "lo", look for the flag
that indicates a localhost interface.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
8c7988b6db net: sandbox-raw: Convert raw eth driver to livetree
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:18 -05:00
Joe Hershberger
50ed0ef832 sandbox: eth-raw: Make sure descriptors are always initialized
If we let descriptors equal 0, we can end up closing STDIN. Make sure
they start out as -1.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Joe Hershberger
c6fa51a499 sandbox: Fix format of fake-host-hwaddr in test.dts
test.dts specified the fake MAC address as a u32 array. Instead it
should be a u8 array.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Joe Hershberger
97367df109 sandbox: eth-raw: Correct valid socket test in send/recv
In open, the socket is correctly checked to be -1 in the error case.
In send and recv, we checked for 0, but that is a valid socket number.

Correct this by checking for -1 as a bad socket everywhere.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
York Sun
038b965c2b armv8: ls1046ardb: Add falcon mode for for QSPI boot
A new defconfig is introduced to support SPL boot from QSPI NOR
flash. This is to support falcon mode for faster booting into
Linux.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 11:51:23 -07:00
York Sun
9960609275 armv8: layerscape: spl: Initialize QSPI AHB for QSPI boot
To get full access of QSPI space, initialize AHB interface.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Yuantian Tang
86bff2bb09 armv8: dts: fsl-ls1012a: add sata node support
One ls1012a, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.
Add sata node to support this feature.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Yuantian Tang
ed167eb1c7 armv8: fsl: remove sata support
Remove the old implementation in order to enable DM for sata.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
York Sun
61ab8aac60 armv8: layerscape: Enabled I-cache for SPL boot
Enable I-cache for SPL boot to boost performance. Earlier MMU was
enabled only for LS2080A and has since been dropped by commit
f539c8a4a7 ("armv8: ls2080a: Drop early MMU for SPL build").

Signed-off-by: York Sun <york.sun@nxp.com>
2018-07-26 10:59:35 -07:00
Tom Rini
ff6bef4852 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-07-26 11:43:26 -04:00
Tom Rini
de4b4ef36f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-07-26 11:43:23 -04:00
Alexander Graf
42a3d42688 x86: Add efi_loader bits to x86_64 linker script
The x86_64 linker script was missing efi runtime information. Add it.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:44 +02:00
Alexander Graf
7e21fbca26 efi_loader: Rename sections to allow for implicit data
Some times gcc may generate data that is then used within code that may
be part of an efi runtime section. That data could be jump tables,
constants or strings.

In order to make sure we catch these, we need to ensure that gcc emits
them into a section that we can relocate together with all the other
efi runtime bits. This only works if the -ffunction-sections and
-fdata-sections flags are passed and the efi runtime functions are
in a section that starts with ".text".

Up to now we had all efi runtime bits in sections that did not
interfere with the normal section naming scheme, but this forces
us to do so. Hence we need to move the efi_loader text/data/rodata
sections before the global *(.text*) catch-all section.

With this patch in place, we should hopefully have an easier time
to extend the efi runtime functionality in the future.

Signed-off-by: Alexander Graf <agraf@suse.de>
[agraf: Fix x86_64 breakage]
2018-07-25 14:57:44 +02:00
Alexander Graf
dae73c4cdc elf: Move x86 reloc defines to common elf.h
We need to know about x86 relocation definitions even in cases where
we don't officially build against the x86 target, such as with sandbox.

So let's move the x86 definitions into the common elf header, where all
other architectures already have them.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Mark Kettenis
d32e86bde8 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
ARMV7_LPAE is required in order to enable the MMU in HYP mode.
And we really want to enable the MMU in HYP mode such that we can
enable the the caches.  Otherwise U-Boot code (such as the EFI
implementation) that runs in HYP mode will run at a snils pace.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Mark Kettenis
907ee2945e ARM: HYP/non-sec: migrate stack
The current code that switches into HYP mode doesn't bother to set
up a stack for HYP mode.  This doesn't work for EFI applications
as they expect a usable stack.  Fix this by migrating the stack
pointer from SP_svc to SP_hyp while in Monitor mode.
This restores the stack pointer when we drop into HYP mode.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-07-25 14:57:43 +02:00
Masahiro Yamada
7ef5b1e7ed ARM: uniphier: enable distro boot
Switch to the distro boot for UniPhier platform.

 - Remove the environment vairalbes used to load images from raw
   block devices.

 - Keep the command to download images via tftp.  This will be
   useful to boot the kernel when no valid kernel image is ready
   yet in the file system.

 - Use root.cpio.gz instead of root.cpio.uboot because we always know
   the file size of the init ramdisk; it is loaded via either a file
   system or network.

 - Rename fit_addr_r to kernel_addr_r, which the distro command
   checks to get the load address of FIT image.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
bb04d2ec4d ARM: uniphier: support fdt_fixup_mtdparts
Propagate the "mtdparts" environment variable to the DT passed
in to OS.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
65fce76301 ARM: uniphier: split ft_board_setup() out to a separate file
Prepare to add more fdt fixup code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Masahiro Yamada
e968715302 ARM: uniphier: clean-up ft_board_setup()
The 'bd' is passed in ft_board_setup() as the second argument.
Replace 'gd->bd' with 'bd'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-07-25 08:47:53 +09:00
Marek Vasut
a6759e3dfc ARM: rmobile: gen2: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS
Enable CVE_2017_5715 mitigation on CPU0 on R-Car H2, M2W, M2N, V2H,
which all contain Cortex-A15 cores. R-Car E2 contains only Cortex-A7
cores and is not affected. Without this enabled, Linux kernel reports:

  CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

With this enabled, Linux kernel reports:

  CPU0: Spectre v2: using ICIALLU workaround

NOTE: This by itself does not enable the workaround for other CPUs
      than CPU0 and may require additional kernel patches for the
      other CPUs in SMP configurations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-07-25 00:14:19 +02:00
Marek Vasut
64eeb15854 ARM: dts: socfpga: Adjust NAND register layout on Arria10
Adjust the NAND register size on Arria10 to reflect reality.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
Marek Vasut
42f4b83b52 ARM: socfpga: Init missing security policies on A10
The Arria10 requires proper configuration of the NOC firewall, otherwise
the access to certain areas of the LWHPS bridge fails in Linux. Add the
missing setup.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
Marek Vasut
937db7188e ARM: socfpga: Assure correct CPACR configuration
Make sure the ARM CPACR register is zeroed out, this is mandatory
on Arria10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
Ley Foon Tan
00057eea66 arm: socfpga: Fixes: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Commit bfc6bae8fa

This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update
with new CONFIG name and enable CONFIG_SPL_DM_RESET when CONFIG_DM_RESET is enabled.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-25 00:13:32 +02:00
Adam Ford
d7cc15bb53 ARM: DTS: am3517-evm-u-boot: Mark MMC1 with cd-inverted
In order to use the device tree for MMC, the card-detect pin
needs to be inverted.  This patch places this into the
am3517-evm-u-boot.dtsi file to keep the main DTS and DTSI files
clean and in-sync with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 14:33:21 -04:00