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tegra: Introduce SRAM repair on tegra124
This is required in order to avoid instability when running from caches after the kernel starts. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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2 changed files with 31 additions and 1 deletions
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@ -26,6 +26,12 @@ struct flow_ctlr {
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u32 cpu_pwr_csr; /* offset 0x38 */
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u32 mpid; /* offset 0x3c */
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u32 ram_repair; /* offset 0x40 */
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u32 flow_dbg_sel; /* offset 0x44 */
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u32 flow_dbg_cnt0; /* offset 0x48 */
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u32 flow_dbg_cnt1; /* offset 0x4c */
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u32 flow_dbg_qual; /* offset 0x50 */
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u32 flow_ctlr_spare; /* offset 0x54 */
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u32 ram_repair_cluster1;/* offset 0x58 */
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};
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/* HALT_COP_EVENTS_0, 0x04 */
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@ -43,4 +49,10 @@ struct flow_ctlr {
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#define CSR_WAIT_WFI_SHIFT 8
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#define CSR_PWR_OFF_STS (1 << 16)
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/* RAM_REPAIR, 0x40, 0x58 */
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enum {
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RAM_REPAIR_REQ = 0x1 << 0,
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RAM_REPAIR_STS = 0x1 << 1,
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};
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#endif /* _TEGRA124_FLOW_H_ */
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@ -9,7 +9,7 @@
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#include <asm/io.h>
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#include <asm/types.h>
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#include <asm/arch/flow.h>
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#include <asm/arch/powergate.h>
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#include <asm/arch/tegra.h>
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@ -75,11 +75,29 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id)
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return 0;
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}
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static void tegra_powergate_ram_repair(void)
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{
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#ifdef CONFIG_TEGRA124
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struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE;
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/* Request RAM repair for cluster 0 and wait until complete */
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setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ);
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while (!(readl(&flow->ram_repair) & RAM_REPAIR_STS))
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;
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/* Same for cluster 1 */
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setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ);
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while (!(readl(&flow->ram_repair_cluster1) & RAM_REPAIR_STS))
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;
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#endif
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}
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int tegra_powergate_sequence_power_up(enum tegra_powergate id,
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enum periph_id periph)
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{
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int err;
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tegra_powergate_ram_repair();
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reset_set_enable(periph, 1);
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err = tegra_powergate_power_on(id);
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