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80725 commits

Author SHA1 Message Date
Philippe Schenker
1cf4e79f57 toradex: tdx-cfg-block: add new toradex oui range
Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:

For serial-numbers 00000000-16777215 OUI 00:14:2d is taken
For serial-numbers 16777216-33554431 OUI 8c:06:cb is taken

Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:51 -04:00
Nishanth Menon
a58147c2db board: ti: common: board_detect: Do 1byte address checks first.
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.

While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.

Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Nishanth Menon
bc1de48371 board: ti: common: Handle the legacy eeprom address width properly
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.

These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.

Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Nishanth Menon
8b5218e7cb board: ti: common: Optimize boot when detecting consecutive bad records
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Vignesh Raghavendra
e4b4501ede firmware: ti_sci_static_data: Make file board agnostic
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.

Drop J7200 EVM specific settings as its same as J721e

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
6ea5bcc4a6 configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
needed to calculate the size of DDR that is available.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
4c092bb306 board: ti: am62x: Account for DDR size fixups if ECC is enabled
Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.

A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
249e9f3d19 board: ti: am62x: Use fdt functions for ram and bank init
Use the appropriate fdtdec_setup_mem_size_base() call in
dram_init() and fdtdec_setup_bank_size() in dram_bank_init()
to pull these values from DT, where they are already available,
instead of hardcoding them.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
362b0d2e6e arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl
Mark the memory node with u-boot,dm-spl so we can use it
from early SPL on both R5 and A53.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
a04bbb83b4 arm: mach-k3: common: Use ddr_init in spl_enable_dcache
The spl_enable_dcache() function calls dram_init_banksize()
to get the total memory size. Normally the dram_init_banksize()
setups the memory banks, while the total size is reported
by ddr_init(). This worked so far for K3 since we set the
gd->ram_size in dram_init_banksize() as well.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Philippe Schenker
7e27ce16c5 toradex: tdx-cfg-block: extend assembly version
There are two decimal digits reserved to encode the module version and
revision. This code so far implemented A-Z which used 0-25 of this
range.
This commit extends the range to make use of all 99 numbers. After
capital letters the form with a hashtag and number (e.g. #26) is used.

Examples:

If the assembly version is between zero and 25 the numbering is as follows,
as it also has been before this commit:
0: V0.0A
1: V0.0B
...
25: V0.0Z

New numbering of assembly version:
If the number is between 26 and 99 the new assembly version name is:
26: V0.0#26
27: V0.0#27
...
99: V0.0#99

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:08 -04:00
Philippe Schenker
494ef10c3b toradex: tdx-cfg-block: use defines for string length
With those defines the length can be reused and is in one place
extendable.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:08 -04:00
Philippe Schenker
39ff0624bc toradex: tdx-cfg-block: use only snprintf
Prevent memory issues that could appear with sprintf. Replace all
sprintf occurences with snprintf.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:08 -04:00
Aswath Govindraju
e0392596e9 board: ti: j721e: Return if there is an error while configuring SerDes
While configuring SerDes, errors could be encountered, in these cases,
return instead of going ahead. This is will help in booting even if
configuration of SerDes fails.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-07-06 14:30:08 -04:00
Vaishnav Achath
c16b4f14a3 arm: k3: j721e: add dynamic sf bus override support for j721e
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2022-07-06 14:30:08 -04:00
Vaishnav Achath
6dd18a6568 common: spl: spl_spi: add support for dynamic override of sf bus
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI flash using the
same build.E.g. supporting QSPI flash boot and OSPI flash boot
on J721E platform is not possible due to this limitation.

This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-06 14:30:08 -04:00
Tom Rini
2d2c61ff04 Pull request efi-2022-07-rc7
UEFI:
 
 * correct verification of signed UEFI binaries
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Merge tag 'efi-2022-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2022-07-rc7

UEFI:

* correct verification of signed UEFI binaries
2022-07-06 09:17:08 -04:00
Tom Rini
4b7d0b24c7 Merge branch '2022-07-05-more-Kconfig-migrations' into next
- Migrate more CONFIG symbols to Kconfig, remove some dead code and
  clean-up arch/Kconfig.nxp slightly more.
2022-07-06 09:15:36 -04:00
Tom Rini
432243cee1 Convert CONFIG_KIRKWOOD_PCIE_INIT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_KIRKWOOD_EGIGA_INIT
   CONFIG_KIRKWOOD_PCIE_INIT
   CONFIG_KIRKWOOD_RGMII_PAD_1V8
   CONFIG_KM_DISABLE_PCIE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
604c62f511 qemu-ppce500: Move CONFIG_SYS_PCI_MAP_{START, END} to board code
These CONFIG options are only used on this board, in the board file
itself.  Remove these from the CONFIG namespace and define in the board
file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
6bb74fe19b Convert CONFIG_SYS_FSL_PCI_VER_3_X to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_PCI_VER_3_X

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
363397ae1a Convert CONFIG_PCI_MSC01 to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_MSC01

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
1bc8ef4d70 socrates: Rework CONFIG_PCI_CLK_FREQ
The symbol CONFIG_PCI_CLK_FREQ is local to this board.  Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
31a8f5545e Convert CONFIG_SH7751_PCI to Kconfig
This converts the following to Kconfig:
   CONFIG_SH7751_PCI

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
9ee06d286a MPC837XERDB: Remove unused PCI defines
These defines aren't referenced in code today, remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
c55094f14d m68k: Remove unused PCI code
The only mcf5445x platform does not enable PCI, drop this code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
e58eebb514 Convert CONFIG_PCI_CONFIG_HOST_BRIDGE to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_CONFIG_HOST_BRIDGE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
bf2c48fa1a Convert CONFIG_PCI_GT64120 to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_GT64120

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
f27bca4c27 Convert CONFIG_PCI_SCAN_SHOW to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_SCAN_SHOW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
4e7860288c pci: Remove pci_sh4 and related defines.
This driver is not enabled anywhere, remove it.  Also remove definitions
of symbols only used in this driver, on platforms that did not enable
it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
4547a1bc92 Convert CONFIG_PCIE_IMX to Kconfig
This converts the following to Kconfig:
   CONFIG_PCIE_IMX

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
3dc2987f5c Convert CONFIG_PCIE1 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_PCIE1
   CONFIG_PCIE2
   CONFIG_PCIE3
   CONFIG_PCIE4
   CONFIG_PCI1

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
a552ffc9d2 Convert CONFIG_LAYERSCAPE_NS_ACCESS to Kconfig
This converts the following to Kconfig:
   CONFIG_LAYERSCAPE_NS_ACCESS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:53 -04:00
Tom Rini
5d7f601480 lcd: Remove legacy CONFIG_FB_ADDR code
No platforms set both CONFIG_LCD and CONFIG_FB_ADDR at this time, drop
this legacy code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:40 -04:00
Tom Rini
d8e8461709 Convert CONFIG_FSL_FIXED_MMC_LOCATION et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_FIXED_MMC_LOCATION
   CONFIG_ESDHC_HC_BLK_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:40 -04:00
Tom Rini
f4cd75e96a powerpc: Clean up CHAIN_OF_TRUST related options
As things stand currently, there is only one PowerPC platform that
enables the options for CHAIN_OF_TRUST.  From the board header files,
remove a number of never-set options.  Remove board specific values from
arch/powerpc/include/asm/fsl_secure_boot.h as well.  Rework
include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for
constructing CHAIN_BOOT_CMD.  Migrate all of the configurable addresses
to Kconfig.

If any platforms are re-introduced with secure boot support, everything
required should still be here, but now in Kconfig, or requires migration
of an option to Kconfig.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:15 -04:00
Tom Rini
52aaa1840d nxp: config_fsl_chain_trust.h: Clean up and remove unused portions
The way that secure boot is implemented today on NXP ARM platforms does
not reuse the elements found in include/config_fsl_chain_trust.h to
construct CONFIG_SECBOOT but instead board header files have their
environment setup as needed and then fsl_setenv_chain_of_trust() will
set secureboot in the environment.  Remove a large number of unused
defines here.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:01 -04:00
Tom Rini
5aad0a14ba fsl_validate: Migrate SPL_UBOOT_KEY_HASH to Kconfig
Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig.  As
part of this, change fsl_secboot_validate(...) to check that it is
passed a non-empty string, rather than non-NULL.

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:01 -04:00
Tom Rini
540b73a7be arch/Kconfig.nxp: Re-organize slightly
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig.  Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:01 -04:00
Tom Rini
601483ffd5 Convert CONFIG_SYS_FSL_SFP_BE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_KEY_REVOCATION
   CONFIG_SYS_FSL_SFP_BE
   CONFIG_SYS_FSL_SFP_LE
   CONFIG_SYS_FSL_SFP_VER_3_0
   CONFIG_SYS_FSL_SFP_VER_3_2
   CONFIG_SYS_FSL_SFP_VER_3_4
   CONFIG_SYS_FSL_SRK_LE

This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for
when CHAIN_OF_TRUST is enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:00 -04:00
Tom Rini
c9f85187e2 Convert CONFIG_SYS_FSL_SEC_MON et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_SEC_MON
   CONFIG_SYS_FSL_SEC_MON_BE
   CONFIG_SYS_FSL_SEC_MON_LE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:00 -04:00
Tom Rini
7e7d04aecb Convert CONFIG_ESDHC_DETECT_QUIRK to Kconfig
This converts the following to Kconfig:
   CONFIG_ESDHC_DETECT_QUIRK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:46 -04:00
Tom Rini
2b2817b5c8 Convert CONFIG_ESBC_HDR_LS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ESBC_HDR_LS
   CONFIG_ESBC_ADDR_64BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Tom Rini
d622b08923 nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp
Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Tom Rini
93145335fb nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig
The way that we use this file currently means that we have to guard it
in every platform Kconfig.  But it is also required in all NXP
platforms, including non-reference platforms.  Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Tom Rini
1e7750f1bc Convert CONFIG_HETROGENOUS_CLUSTERS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_HETROGENOUS_CLUSTERS
   CONFIG_SYS_MAPLE
   CONFIG_SYS_CPRI
   CONFIG_PPC_CLUSTER_START
   CONFIG_DSP_CLUSTER_START
   CONFIG_SYS_CPRI_CLK
   CONFIG_SYS_ULB_CLK
   CONFIG_SYS_ETVPE_CLK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
f96096d0dc Convert CONFIG_EXTRA_CLOCK to Kconfig
This converts the following to Kconfig:
   CONFIG_EXTRA_CLOCK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
c24e8e2bb3 Convert CONFIG_SYS_DDR_RAW_TIMING to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_DDR_RAW_TIMING

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
bca4509d57 Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_SPD_BUS_NUM

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
1f7e2fc324 Convert CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR to Kconfig
This converts the following to Kconfig:
   CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00