Convert CONFIG_ESDHC_DETECT_QUIRK to Kconfig

This converts the following to Kconfig:
   CONFIG_ESDHC_DETECT_QUIRK

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-06-16 14:04:38 -04:00
parent 2b2817b5c8
commit 7e7d04aecb
22 changed files with 41 additions and 54 deletions

View file

@ -166,4 +166,25 @@ defined(CONFIG_TARGET_LX2160ARDB)
#define QIXIS_ESDHC_NO_ADAPTER 0x7
#endif
/*
* implementation of CONFIG_ESDHC_DETECT_QUIRK Macro.
*/
static inline u8 qixis_esdhc_detect_quirk(void)
{
/*
* SDHC1 Card ID:
* Specifies the type of card installed in the SDHC1 adapter slot.
* 000= (reserved)
* 001= eMMC V4.5 adapter is installed.
* 010= SD/MMC 3.3V adapter is installed.
* 011= eMMC V4.4 adapter is installed.
* 100= eMMC V5.0 adapter is installed.
* 101= MMC card/Legacy (3.3V) adapter is installed.
* 110= SDCard V2/V3 adapter installed.
* 111= no adapter is installed.
*/
return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) !=
QIXIS_ESDHC_NO_ADAPTER);
}
#endif

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@ -356,27 +356,6 @@ int checkboard(void)
}
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
/*
* implementation of CONFIG_ESDHC_DETECT_QUIRK Macro.
*/
u8 qixis_esdhc_detect_quirk(void)
{
/*
* SDHC1 Card ID:
* Specifies the type of card installed in the SDHC1 adapter slot.
* 000= (reserved)
* 001= eMMC V4.5 adapter is installed.
* 010= SD/MMC 3.3V adapter is installed.
* 011= eMMC V4.4 adapter is installed.
* 100= eMMC V5.0 adapter is installed.
* 101= MMC card/Legacy (3.3V) adapter is installed.
* 110= SDCard V2/V3 adapter installed.
* 111= no adapter is installed.
*/
return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) !=
QIXIS_ESDHC_NO_ADAPTER);
}
static void esdhc_adapter_card_ident(void)
{
u8 card_id, val;

View file

@ -71,6 +71,7 @@ CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y

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@ -65,6 +65,7 @@ CONFIG_MPC8XXX_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y

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@ -68,6 +68,7 @@ CONFIG_MPC8XXX_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y

View file

@ -90,6 +90,7 @@ CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y

View file

@ -86,6 +86,7 @@ CONFIG_MPC8XXX_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y

View file

@ -79,6 +79,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y

View file

@ -59,6 +59,7 @@ CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y

View file

@ -62,6 +62,7 @@ CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y

View file

@ -83,6 +83,7 @@ CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y

View file

@ -64,6 +64,7 @@ CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y

View file

@ -78,6 +78,7 @@ CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y

View file

@ -73,6 +73,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y

View file

@ -69,6 +69,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y

View file

@ -76,6 +76,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y

View file

@ -844,6 +844,10 @@ config SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH
depends on FSL_ESDHC
default 1
config ESDHC_DETECT_QUIRK
bool "QIXIS-based eSDHC quirk detection"
depends on FSL_ESDHC && FSL_QIXIS
config FSL_ESDHC_IMX
bool "Freescale/NXP i.MX eSDHC controller support"
help

View file

@ -30,6 +30,7 @@
#include <linux/iopoll.h>
#include <linux/dma-mapping.h>
#include <sdhci.h>
#include "../../board/freescale/common/qixis.h"
DECLARE_GLOBAL_DATA_PTR;
@ -773,7 +774,7 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv)
struct fsl_esdhc *regs = priv->esdhc_regs;
#ifdef CONFIG_ESDHC_DETECT_QUIRK
if (CONFIG_ESDHC_DETECT_QUIRK)
if (qixis_esdhc_detect_quirk())
return 1;
#endif
if (esdhc_read32(&regs->prsstat) & PRSSTAT_CINS)

View file

@ -305,10 +305,6 @@
#define CONFIG_FSL_MEMAC
/* MMC */
#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
#define COMMON_ENV \
"kernelheader_addr_r=0x80200000\0" \
"fdtheader_addr_r=0x80100000\0" \

View file

@ -238,14 +238,6 @@
*/
#define FSL_QIXIS_BRDCFG9_QSPI 0x1
/*
* MMC
*/
#ifdef CONFIG_MMC
#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
#endif
/*
* RTC configuration
*/

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@ -11,16 +11,6 @@
/* RTC */
#define CONFIG_SYS_RTC_BUS_NUM 0
/*
* MMC
*/
#ifdef CONFIG_MMC
#ifndef __ASSEMBLY__
u8 qixis_esdhc_detect_quirk(void);
#endif
#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk()
#endif
/* MAC/PHY configuration */
/* EEPROM */

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@ -13,16 +13,6 @@
/* RTC */
#define CONFIG_SYS_RTC_BUS_NUM 0
/*
* MMC
*/
#ifdef CONFIG_MMC
#ifndef __ASSEMBLY__
u8 qixis_esdhc_detect_quirk(void);
#endif
#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk()
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0