Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
PCA9450 PMIC series is used to support iMX8MM (PCA9450A) and
iMX8MN (PCA9450B). Add the PMIC driver for both PCA9450A and PCA9450B.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low power consumption and relies on a powerful
fully coherent core complex based on a quad core ARM Cortex-A53 cluster
and Cortex-M7 low-power coprocessor, audio digital signal processor,
machine learning and graphics accelerators.
Add the basic dtsi support for i.MX8MP.
Patch from Anson Huang for Kernel
https://patchwork.kernel.org/patch/11310915/
Signed-off-by: Peng Fan <peng.fan@nxp.com>
We will generate DRAM 4000MT/s as default for i.MX8MP.
So need DRAM PLL to generate 1000Mhz clock to DDR PHY and controller.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks
and ctrl register bit definitions, so update to reflect that.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MP has similar architecture as i.MX8MN, but it has different
clk root and index, so add that to make i.MX8MP could use
the non-dm clock driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest
bit, so enlarge bit mask to 0x1FF to make it could detect
cpu type correctly
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK +
dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK
as root clk and cause sd card could not be detected in U-Boot proper,
as below:
"Loading Environment from MMC... unable to select a mode"
Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Fabio Estevam <festevam@gmail.com>
After the conversion to DM_PMIC the following output is seen:
PMIC: PMIC: PFUZE100 ID=0x10
Remove the unnecessary PMIC string from the board file to
avoid the repetead string.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Commit ec837c82d7 ("imx6: wandboard: convert to DM_PMIC")
caused the following pmic_get() error:
CPU: Freescale i.MX6QP rev1.0 at 792 MHz
Reset cause: POR
DRAM: 2 GiB
PMIC: pmic_get() ret -19
...
and since the PMIC presence is used to determine the board D1 revision,
the following error is seen when booting a board rev D1:
WARNING: Could not determine dtb to use
and the kernel does not boot at all.
Fix the regression by passing "pfuze100@8" as the correct parameter
to the pmic_get() function in the DM case.
Fixes: ec837c82d7 ("imx6: wandboard: convert to DM_PMIC")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The current mpc83xx_clk driver is broken for any board for which
mpc83xx_has_pci() is true, i.e. anything not MPC8308:
When is_clk_valid() reports that MPC83XX_CLK_PCI is valid,
init_all_clks() proceeds to call init_single_clk(), but that doesn't
know about either MPC83XX_CLK_PCI or has any handling of the
TYPE_SCCR_ONOFF mode correctly returned by retrieve_mode(). Hence
init_single_clk() ends up returning -EINVAL, and the whole board hangs
in serial_init().
The quickest fix is to simply pretend that clock is invalid for
all, since nobody can have been relying on it. Adding proper support
seems to be a bit more involved than just handling TYPE_SCCR_ONOFF:
- The power-on-reset value of SCCR[PCICM] is 0, so
mpc83xx_clk_enable() would probably need to be tought to enable the
clock.
- The frequency of PCI_SYNC_OUT is either SYS_CLK_IN or SYS_CLK_IN/2
depending on the CFG_CLKIN_DIV configuration input, but that can't
be read from software, so to properly fill out
->speed[MPC83XX_CLK_PCI] I think one would need guidance from
Kconfig or dtb.
Partially fixes: 07d538d281 clk: Add MPC83xx clock driver
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
The MPC8309 has two gpio controllers (which is already correctly
reflected in its struct immap definition).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Allow drivers/spi/mpc8xxx_spi.c to be built for an mpc8309 target.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
This complements commit 068789773d which did the conversion for
mpc85xx.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
The mpc8309 is also affected by the "Manual Asynchronous CMD12 abort
operation causes protocol violations" erratum, though it is enumerated
as eSDHC16 in the errata sheet for mpc8309.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
This adds a message to lists_bind_fdt when it skips initializing a device
pre-relocation. I've had a couple errors where a device didn't initialize
properly because one of its dependencies was missing.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The suffix should be ".bin" instead of ".dtb" .
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present we only support two phases where devres can be used:
bind and probe. This is handled with a boolean. We want to add a new
phase (platdata), so change this to an enum.
Signed-off-by: Simon Glass <sjg@chromium.org>
The devres functionality has very few users in U-Boot, but it still should
have tests. Add a few basic tests of the main functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when CONFIG_DEBUG_DEVRES is enabled, U-Boot prints log messages
to the console with every devres allocation/free event. This causes most
tests to fail since the console output is not as expected.
In particular this prevents us from adding a device to sandbox which uses
devres in its bind method.
Move devres over to use U-Boot's logging feature instead, and add a new
category for devres.
Signed-off-by: Simon Glass <sjg@chromium.org>
The malloc() implementations provides a way of finding out the approximate
amount of memory that is allocated. Add helper functions to make it easier
to access this and see changes over time. This is useful for tests that
want to check if memory has been allocated or freed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these functions are lumped in with the core device functions.
They have their own #ifdef to control their availability, so it seems
better to split them out.
Move them into their own header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to avoid allocating platform data twice. This could happen if
device_probe() is called after device_ofdata_to_platdata() for the same
device.
Add a flag to track whether device_ofdata_to_platdata() has been called on
a device. Check the flag to make sure it doesn't happen twice, and clear
the flag when the data is freed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new internal function, device_ofdata_to_platdata() to handle
allocating private space associated with each device and reading the
platform data from the device tree.
Call this new function from device_probe().
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the parent is probed before the child's ofdata_to_platdata()
method is called. Adjust the logic slightly so that probing parents is
not done until afterwards.
Signed-off-by: Simon Glass <sjg@chromium.org>
This method is supposed to extract platform data from the device tree. It
should be done before the device itself is probed. Move it earlier in the
device_probe() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the clock driver reads its ofdata in the probe() method. This
is not correct although it is often harmless.
However in this case it causes a problem, something like this:
- ast_get_scu() is called (from somewhere) to get the SCI address
- this probes the clock
- first sets up ofdata (which does nothing at present)
- DM marks clock device as active
- DM calls pinctrl
- pinctrl probes and calls ast_get_scu() in ast2500_pinctrl_probe()
- ast_get_scu() probes the clock, but sees it already marked as
probed
- ast_get_scu() accesses the clock's private data, with scu as NULL
- DM calls clock probe function ast2500_clk_probe() which reads scu
By putting the read of scu into the correct method, scu is read as part of
ofdata setup, and everything is OK.
Note: This problem did not matter until now since DM always probed all
parents before reading a child's ofdata. The fact that pinctrl is a child
of clock seems to trigger this strange bug.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
It is not possible to access a device on a PCI bus that has not yet been
probed, since the bus number is not known. Add a warning to catch this
error.
Signed-off-by: Simon Glass <sjg@chromium.org>
