- StarFive: Add StarFive watchdog driver
- VisionFive2: Support device tree overlay for VisionFive2 board
- Andes: Fix PLIC-SW setting
- RISC-V: Fix NVMe support by implying NVME_PCI for QEMU
- RISC-V: Fix binman for 64 bit format load address
Enable GETOPT so that 'bdinfo' command with getopt() support can be
tested in CI.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Since commit b96640cbfb ("ARM: meson: g12a: switch dwc2 otg to DM")
and commit e327e2affd ("ARM: meson: switch AXG & GX dwc2 otg to DM")
Amlogic boards now requires DM_USB_GADGET to have USB Gadget to work.
Add it to the boards configs as returned by:
$ grep -L DM_USB_GADGET $(grep -l CONFIG_USB_GADGET $(grep -l MESON configs/*))
Fixes: b96640cbfb ("ARM: meson: g12a: switch dwc2 otg to DM")
Fixes: e327e2affd ("ARM: meson: switch AXG & GX dwc2 otg to DM")
Link: https://lore.kernel.org/r/20231206-u-boot-m2s-fix-usb-gadget-v1-1-1c4c66cd10f3@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
The OrangePi Zero 3 is a small development board featuring the Allwinner
H618 SoC, shipping with up to 4GB of DRAM, Gigabit Ethernet, a micro-HDMI
connector and two USB sockets.
The board uses LPDDR4 DRAM and an X-Powers AXP313a PMIC, support for
which was recently added to U-Boot.
Add a defconfig file selecting the right drivers and DRAM options.
Since the .dts file was synced from the Linux kernel repo already, we
just need to add one line to the Makefile to actually build the .dtb.
The DRAM parameters were derived from the values found in the BSP DRAM
drivers on the SPI NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Tested-by: Bob McChesney <bob@electricworry.net>
Tested-by: Stephen Graf <stephen.graf@gmail.com>
The original H616 devices released about three years ago were typically
paired with an X-Powers AXP305 PMIC. Newer devices uses the smaller
AXP313, and there seem to be far more systems with this PMIC around now.
Remove the default AXP305 selection for the H616 SoC from the Kconfig,
and move the PMIC selection into the board defconfig files instead.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The OrangePi Zero 2 has a USB VBUS regulator, controlled by pin PC16.
This is correctly described in the DT, but the patches for supporting
this are still pending.
Meanwhile add our good old CONFIG_USB1_VBUS_PIN to the defconfig file,
to enable power on the USB port and allow using a USB flash drive, for
instance.
Fixes: 6acc5fa581 ("sunxi: H616: enable USB support for H616 boards")
Reported-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
To quote the author:
"Scmi" command will be re-introduced per Michal's request.
The functionality is the same as I put it in my patch set of adding
SCMI base protocol support, but made some tweak to make UT, "ut dm
scmi_cmd," more flexible and tolerable when enabling/disabling a specific
SCMI protocol for test purpose.
Each commit may have some change history inherited from the preceding
patch series.
Test
====
The patch series was tested on the following platforms:
* sandbox
In this test, "scmi" command is tested against different sub-commands.
Please note that scmi command is for debug purpose and is not intended
in production system.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Since required drivers were merged, we can safely clean up the
board and switch to DM based driver with device tree support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Since required drivers were merged, we can safely clean up the
board and switch to DM based driver with device tree support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Since required drivers were merged, we can safely clean up the
board and switch to DM based driver with device tree support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Since required drivers were merged, we can safely clean up the
board and switch to DM based driver with device tree support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
As correct default SYS_CONFIG_NAME value is now set in
board/samsung/axy17lte/Kconfig (in commit "board: samsung: Fix
SYS_CONFIG_NAME configs in axy17lte Kconfig"), the SYS_CONFIG_NAME
option can be safely removed from all a*y17lte defconfigs. That removal
doesn't change resulting .config files.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
None of these platforms enabled a networking devices, and disabled
CMD_NET. Given that we used to gate network support on CMD_NET rather
than NET, we disable CONFIG_NET on these platforms now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The initcall sequence fails at arch_misc_init. Disable misc init until
driver model and DT are clean.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
These targets use NAND FLASH only. Maybe some MMC definitions were added by
trying MMC for the etamin target evaluation and were not removed.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Draco is a family of 3 boards: thuban, rastaban & etamin. Rename all
targets of the family adding the draco- prefix to increase readibility
and simplify future commits about concerning all boards of the family.
The name draco was initially used for the first target. It's deprecated
since a 2nd target was introduced. Unfortunately the draco target was
copied to the thuban target instead to be renamed. Remove it to save
unnecessary maintenance effort.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Move beagleplay support away from ti/am62x to it's own beagle vendor
folder.
This forms the starting point for new beagle platforms added under it's
own board vendor folder.
As part of this create all the associated files with a bare minimum
beagleplay.c file.
Suggested-by: Andrew Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
[trini: Update k3-binman.dtsi to use full path to scheme.yaml now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add am62x_beagleplay_* defconfig customized for the configuration of
BeaglePlay and drop the config fragments.
This is in preparation for dropping the dependency on ti vendor folder
entirely.
Signed-off-by: Nishanth Menon <nm@ti.com>
Switch to using bootstd. Note with this change, we will stop using
distro_bootcmd and instead depend entirely on bootflow method of
starting the system up.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Kernel commit 1b77265626a4 ("arm64: dts: ti: k3-j7200-mcu-wakeup: Add
HyperBus node") was merged to kernel without its dependent patch [1].
Similar fix is needed in U-Boot, and hbmc currently breaks boot. Till
this gets fixed in U-Boot, disable the config by default so that the
hbmc probe that happens in board/ti/j721e/evm.c will not take place
and lead to boot failure.
This is similar to the approach in commit 5b2671594b ("configs:
j721e: Remove HBMC_AM654 config"), introduced to j7200 evm platform.
[1] https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Switch to using bootstd. Note with this change, we will stop using
distro_bootcmd and instead depend entirely on bootflow method of
starting the system up.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
- squashfs improvements, remove common.h in some places, assorted code
fixes, fix a few CONFIG symbol names in Kconfig files, bring in
linux's <linux/time.h> conversion functions, poplar updates, bcb
improvements.
Set CONFIG_NET_RANDOM_ETHADDR=y, which sets random eth address in
case there is no configuration provided neither in CONFIG_ETHADDR
nor in "ethaddr" env variable.
This fixes the problem:
poplar# dhcp
Error: ethernet@9841000 address not set.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Several boards enable SPL_FS_FAT and SPL_LIBDISK_SUPPORT when they can't be
used (as there is no block device support enabled). Disable these configs.
The list of boards was generated with the following command:
$ tools/qconfig.py -f SPL SPL_FS_FAT ~SPL_MMC ~SPL_BLK_FS ~SPL_SATA \
~SPL_USB_STORAGE ~ENV_IS_IN_FAT ~EFI
LIBDISK was left enabled for the am* boards, since it seems to result in
actual size reduction, indicating that partitions are being used for
something.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
To quote the author:
This series tests raw nand flash in sandbox and fixes various bugs discovered in
the process. I've tried to do things in a contemporary manner, avoiding the
(numerous) variations present on only a few boards. The test is pretty minimal.
Future work could test the rest of the nand API as well as the MTD API.
Bloat (for v1) at [1] (for boards with SPL_NAND_SUPPORT enabled). Almost
everything grows by a few bytes due to nand_page_size. A few boards grow more,
mostly those using nand_spl_loaders.c. CI at [2].
[1] https://gist.github.com/Forty-Bot/9694f3401893c9e706ccc374922de6c2
[2] https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/18443
Add a SPL test for the NAND load method. We use some different functions to
do the writing from the main test since things like nand_write_skip_bad
aren't available in SPL.
We disable BBT scanning, since scan_bbt is only populated when not in SPL.
We use nand_spl_loaders.c as it seems to be common to at least a few boards
already. However, we do not use nand_spl_simple.c because it would require
us to implement cmd_ctrl. The various nand load functions are adapted from
omap_gpmc. However, they have been modified for simplicity/correctness.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.
For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.
Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.
Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).
Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.
To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Rename SPL_MTD_SUPPORT to SPL_MTD in order to match MTD. This allows using
CONFIG_IS_ENABLED to test for MTD support.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Contrary to what the help message says, this is the number of pages per
block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and
SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to
SYS_NAND_BLOCK_PAGES.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Add initial support for STM32MP2 SoCs family.
SoCs information are available here :
https://www.st.com/content/st_com/en/campaigns/microprocessor-stm32mp2.html
Migrate all MP1 related code into stm32mp1/ directory
Create stm32mp2 directory dedicated for STM32MP2 SoCs.
Common code to MP1, MP13 and MP25 is kept into
arch/arm/mach-stm32/mach-stm32mp directory :
- boot_params.c
- bsec
- cmd_stm32key
- cmd_stm32prog
- dram_init.c
- syscon.c
- ecdsa_romapi.c
For STM32MP2, it also :
- adds memory region description needed for ARMv8 MMU.
- enables early data cache before relocation.
During the transition before/after relocation, the MMU, initially setup
at the beginning of DDR, must be setup again at a correct address after
relocation. This is done in enables_caches() by disabling cache, force
arch.tlb_fillptr to NULL which will force the MMU to be setup again but
with a new value for gd->arch.tlb_addr. gd->arch.tlb_addr has been
updated after relocation in arm_reserve_mmu().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
_ Fix compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled
_ Fix issue following DT sync with kernel 6.3 for stm32mp15xx-ev1 and DHSOM SoM
_ Enable TCP, IPv6, wget on DH STM32MP15 DHSOM
_ Limit u-boot.itb size to 0x160000 bytes on DH STM32MP15 DHSOM
_ Read auth stats and boot_partition from tamp
Now that Ringneck requires some board-specific code (namely resetting
the MCU companion controller) to be run during SPL stage, let's enable
SPL_BOARD_INIT.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The maximum size of u-boot.itb in SPI NOR on DH STM32MP15 DHSOM is
0x160000 . Define this size in U-Boot config to prevent misconfigured
builds from emitting larger u-boot.itb than the one which fits the
SPI NOR area reserved for the blob.
The SPI NOR layout is as follows:
0x00_0000..0x03_ffff ... SPL 1
0x04_0000..0x07_ffff ... SPL 2
0x08_0000..0x1d_ffff ... U-Boot
0x1e_0000..0x1e_ffff ... Environment 1
0x1f_0000..0x1f_ffff ... Environment 2
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
