Commit graph

53863 commits

Author SHA1 Message Date
Rajesh Bhagat
50e2d41f6c armv8: ls1046aqds: Add TFABOOT support
TFABOOT support includes:
 - ls1046aqds_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - FMAN address changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
8e156bb176 armv8: ls1046ardb: Add TFABOOT support
TFABOOT support includes:
 - ls1046ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - FMAN address changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2018-12-06 14:37:19 -08:00
Pankit Garg
ade32bb473 armv8: fsl-layerscape: add support of MC framework for TFA
Add support of MC framework for TFA
Make MC framework independent of boot source.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
c5e6637f68 drivers: qe: add TFABOOT support
Adds TFABOOT support and allows to pick QE firmware
on basis of boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: remove line continuation in quoted string]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:51 -08:00
Rajesh Bhagat
382c53f946 net: fm: add TFABOOT support
Adds TFABOOT support and allows to pick FMAN firmware
on basis of boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:42 -08:00
Pankit Garg
2e17cb8a42 armv8: sec_firmware: return job ring status as true in TFABOOT
Returns job ring status as true in TFABOOT, as one job ring is always
reserved.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
339fb297d4 armv8: sec_firmware: change el2_to_aarch32 SMC ID
Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17,
it is applicable to both TFA and non-TFA boot.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
York Sun
56db948b85 armv8: fsl-layerscape: Update parsing boot source
Workaround of erratum A010539 clears the RCW source field in PORSR1
register, causing failure of detecting boot source using this method.
Use SMC call if U-Boot runs at EL2. If SMC is not implemented or
running at EL3, continue to read PORSR1 and presume QSPI as boot
source if erratum workaround A010539 is enabled and RCW source is
cleared.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
5a73ec6169 armv8: layerscape: skip OCRAM init for TFABOOT
OCRAM initialization is performed by TFA, Hence
skipped from u-boot.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
681d489e62 armv8: layerscape: add SMC calls for DDR size and bank info
Adds SMC calls for getting DDR size and bank info for TFABOOT.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Pankit Garg
2141d250f5 armv8: fsl-layerscape: bootcmd identification for TFABOOT
Adds bootcmd identificaton on basis on boot source, valid
in TFABOOT configuration.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
[YS: remove unnecessary braces]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:36 -08:00
Rajesh Bhagat
b6c97f4d94 armv8: layerscape: remove EL3 specific erratas for TFABOOT
Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.

ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663,
SYS_FSL_ERRATUM_A009803, SYS_FSL_ERRATUM_A009942,
SYS_FSL_ERRATUM_A010165

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
4c41738462 armv8: fsl-layerscape: identify boot source from PORSR register
PORSR register holds the cfg_rcw_src field which can be used
to identify boot source.

Further, it can be used to select the environment location.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix multiple checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:26 -08:00
Rajesh Bhagat
535d76a121 armv8: layerscape: Add TFABOOT support
Adds TFABOOT support config option and add generic code to enable
execution from DDR.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2018-12-06 14:37:19 -08:00
Pankit Garg
9bd5fe7027 drivers: ifc: dynamic chipselect mapping support
IFC driver changes to implement the chipselect mappings at run time.

Defines init_early_memctl_regs and init_final_memctl_regs with
chipselect dynamic mapping for nor and nand boot.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Pankit Garg
e350648046 armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3
Change tlb base address from OCRAM to DDR when exception level is
less than 3.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
York Sun
bb50569dc4 armv8: layerscape: Enable routing SError exception
In case SError happens at EL2, if SCR_EL3[EA] is not routing it to
EL3, and SCR_EL3[RW] is set to aarch64, setting HCR_EL2[AMO] routes
the exception to EL2. Otherwise this exception is not taken.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
088d52cfa8 driver/ifc: replace __ilog2 with LOG2 macro
Replaces __ilog2 function call with LOG2 macro, required to
use macros in global variables.

Also, corrects the value passed in LOG2 for some PowerPC
platforms. Minimum value that can be configured is is 64K
for IFC IP.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix white space around operator]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:07 -08:00
Rajesh Bhagat
119c01c2a5 env: sf: define API to override sf environment address
Defines env_sf_get_env_addr API to override sf environment address,
required to support multiple environment.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-04 13:07:36 -08:00
Rajesh Bhagat
b6cba297af env: allow flash and nand env driver to compile together
Define env_ptr as static in flash and nand env driver to
allow these to compile together.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-04 13:07:13 -08:00
York Sun
d171c70716 move data structure out of cpu.h
Move static definitions to cpu.c file, as it doesn't allow
the cpu.h file to be included in multiple c files.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-12-04 08:30:23 -08:00
Tom Rini
d452f27b3e Prepare v2019.01-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 23:50:13 -05:00
Jorge Ramirez-Ortiz
94981c9859 MAINTAINERS: board: qcom: db820c: update email.
Update email address

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-12-03 21:50:54 -05:00
Simon Goldschmidt
1a67969a99 Revert "serial: ns16550: fix debug uart putc called before init"
This reverts commit 6f57c34473 since it
does not seem to work at least on rk3399.

The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.

Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com
2018-12-03 21:50:47 -05:00
Tom Rini
7cfc1a381e dm: MIGRATION: Update migration plan for BLK
The biggest part of migration to using CONFIG_BLK is that we need to
have the various subsystems migrated first, so reword the plan here to
reference the new deadlines.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 19:31:13 -05:00
Tom Rini
ea9d7c17fc dm: MIGRATION: Add migration plan for CONFIG_SATA
As the core of the subsystem has been converted along with some of the
drivers, formalize a deadline for migration.

Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Soeren Moch <smoch@web.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 19:31:13 -05:00
Tom Rini
109d8bf3ac dm: MIGRATION: Add migration plan for DM_USB
As much of the USB system has been migrated to DM now, formalize a
deadline for migration.

Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 19:31:13 -05:00
Tom Rini
1cb5d5df38 dm: MIGRATION: Add migration plan for DM_MMC
Given that at this point the MMC subsystem itself has been migrated
along with a number of subsystem drivers, formalize a deadline for
migration.

Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-03 19:31:13 -05:00
Tom Rini
0a3d59e010 Xilinx changes for v2019.01
microblaze:
 - Use default functions for memory decoding
 - Showing model from DT
 
 zynq:
 - Fix spi flash DTs
 - Fix zynq_help_text with CONFIG_SYS_LONGHELP
 - Tune cse/mini configurations
 - Enabling cse/mini testing with current targets
 
 zynqmp:
 - Enable gzip SPL support
 - Fix chip detection logic
 - Tune mini configurations
 - DT fixes(spi-flash, models, clocks, etc)
 - Add support for OF_SEPARATE configurations
 - Enabling mini testing with current targets
 - Add mini mtest configuration
 - Some minor config setting
 
 nand:
 - arasan: Add subpage configuration
 
 net:
 - gem: Add 64bit DMA support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlwFUAkACgkQykllyylKDCHtIACeO2G+jfSPxIjsyuPWbRup4e+A
 H5UAn3knKDNJ3VVidqO1C5o8Ye5JePZF
 =lW3g
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support
2018-12-03 19:30:54 -05:00
Tom Rini
9981c60ef5 Patch queue for rpi - 2018-12-03
A few Raspberry Pi specific changes this time:
 
   - Allow 2nd MMC device
   - Support RPi 3 Model A+
   - Allow UUID to find filesystem
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJcBYNQAAoJECszeR4D/txgpdAQAL+JkA5pJeX2bSJy10Y1jTQa
 uD9R5uvRFmduXLMYgZPzc9FCOTbsO5DJvvERV+JidHDeNYIFVAuPo494fUZL3JGa
 Q+zUEDkO8lf2ybJCX5lg6EEZ2O/xzCZJqHs+cV5iPWJ//y0Hx6RuhfS0DGbPQuwN
 e7tlOZg178ZzXSmsNdqKGhNUgSXUTHKaJ5H02VJZ61oUo9/4Zmpsoc3flCrYDjme
 DAeVqDMex+UyqxfBrxMdvVUtdovMV6coF/hbZiHHogvjwNZCmBri0wmFaCmzheSj
 DCz3ec0MxdT3lM2n4otAWiB1x/UY8cwCiWkSzRlFCUNzlvUxVddWgghoH0uQYvzh
 u35EMmNPM4wV6J3RjS+klQyD5tSLoUG5m4DRUDX1KKhE3MFTnx89tTf7n4++/5bk
 Hke3p1KLDnYCvEffFAu/PAeKMpLFTAxZTZm5Nog/EO5dFV2M3NeS2GpAbXXQep3r
 0WfflWrvjjG7CnnDDWMxMxYSqNv/tC9gqTeML1dOt4P275s1NyDkFj0OebjoVoiI
 fnh3DALF4AMP2mDLrFFvoYP7LptSb/TiidH3IT/AwfjFiHGicVDufBqfUObfPKNE
 oUqkKzdKnuZ9Nq5HN9OuAxM4SkSKuXVJpGXef7yJ+BUrQylPjTCpOtxtRVpIumvK
 +vIMVysbLz0EqpuV8i2P
 =W6tE
 -----END PGP SIGNATURE-----

Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-12-03

A few Raspberry Pi specific changes this time:

  - Allow 2nd MMC device
  - Support RPi 3 Model A+
  - Allow UUID to find filesystem
2018-12-03 17:52:53 -05:00
Tom Rini
f388e3bed7 Patch queue for efi - 2018-12-03
This release is fully packed with lots of glorious improvements in UEFI
 land again!
 
   - Make PE images more standards compliant
   - Improve sandbox support
   - Improve correctness
   - Fix RISC-V execution on virt model
   - Honor board defined top of ram (fixes a few boards)
   - Imply DM USB access when distro boot is available
   - Code cleanups
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJcBYKAAAoJECszeR4D/txgBgwQALmYioI67R5/Iizpv7bg+rIQ
 0TyPKZHmfHtVjGHd5X4X+9NBsoaSKqGnoI12bJ+V9hIMuiu5qFKyM3icTOOJ6LI6
 wggnvMWZl5nfZmdEgETHTmaZkQZzKwhzbftGlGf2j19FdDk1OOI7hRNLeaIZUTv0
 VHiUV68PP/1Of1y7iqB5jij1wTUHWlCufKjGXELP0bAXx86/tecgCuvjBihXizz/
 sMsCxEF8++pb5l/l4yFEkKd5rr5D/ZkKMLR4KniZVq2qP1S4calolP14ykHN+a/l
 uKP4e4GDuYyrgXXTNRFhVTlaAn18bmvxH4ialnpYVZKRtfsdHPHQXfqmgf8ZgJPE
 JK3mmG6eLCbBPeND2Yz3b7G/Ec04z+RJXx0hriyLdejLgp5jM9SBtygiz6FmQLpQ
 VfDJNEWV7ot6Ejou55O0d9u5ATF0jAd4tikmsrStWWZOVHvie6nG0wFYiRxnWCKP
 sid0p7lWSUKEl0sAvA0LglNMzd4tCAq7vtkfLj/BVrDc9Jpir9CVJ13ppXIGk1HC
 YIGWLo0uXAGC9wgRE7ZgGCKtQ6VFZRbSiJQOowi4MrHzHXH218oSNz2w25tAVTBw
 le2WbxlGNYhV1xnoWMks1GTdWGQDCXdfBAhfzRIvQq2kz4z9V8hzpnVDIk2ZL3L1
 o3nqUatR0ZVXPcinf+Ke
 =6o9t
 -----END PGP SIGNATURE-----

Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-12-03

This release is fully packed with lots of glorious improvements in UEFI
land again!

  - Make PE images more standards compliant
  - Improve sandbox support
  - Improve correctness
  - Fix RISC-V execution on virt model
  - Honor board defined top of ram (fixes a few boards)
  - Imply DM USB access when distro boot is available
  - Code cleanups
2018-12-03 17:52:40 -05:00
Tom Rini
ec0d0d8742 Merge branch 'master' of git://git.denx.de/u-boot-sh
- MMC fixes for R-Car Gen3
2018-12-03 17:51:45 -05:00
Tom Rini
cf7c6f5333 Merge branch '2018-12-03-master-imports'
- Baltos platform updates
- rtc m41t62 converted to DM.
- PowerPC MPC8xx DM conversion
- Verified boot updates
2018-12-03 16:23:03 -05:00
Jonathan Gray
d61cf138bc rpi: add 3 Model A+
Add Raspberry Pi 3 Model A+ to list of models, the revision code is 0xE
according to the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03 20:25:06 +01:00
Jonathan Gray
cb3f94718d rpi: add URL of official revision code list
Replace various third party lists of Raspberry Pi revision codes in a
comment with the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03 20:25:06 +01:00
Christophe Leroy
fb0204e48b spi, mpc8xx: migrate to DM_SPI
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
c1cd921b75 board_r: fix build with DM_SPI
CC      common/board_r.o
common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function)
  initr_spi,
  ^
make[1]: *** [common/board_r.o] Error 1

Fixes: ebe76a2df9 ("dm: Remove spi_init() from board_r.c when using driver model")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
42b54013a0 drivers: serial: get rid of non DM mpc8xx driver
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
a8b8645fa9 board: MCR3000: migrate to DM_SERIAL
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
bdfa11ebcf drivers: serial: migrate mpc8xx to DM
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
4c4ca6cdd5 board: MCR3000: use new DM watchdog
This patch switches MCR3000 board to the new DM watchdog.

The change in u-boot.lds is because MCR3000.o grows a bit
with this patch and doesn't fit anymore below env_offset on
some versions of GCC.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
749c9aae9d drivers: watchdog: add a DM driver for the MPC8xx watchdog
This patch adds a DM driver for the MPC8xx watchdog.
Basically, the watchdog is enabled by default from the start and
SYPCR register has to be writen once to set the timeout and/or
deactivate the watchdog. Once written, it cannot be written again.

It means that wdt_stop() can be called before wdt_start() to stop the
watchdog, but cannot be called if wdt_start() has been called.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
f55db0afa2 board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
71c743c5f7 powerpc, mpc8xx: clear top of stack
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
2018-12-03 10:44:10 -05:00
Philippe Reynes
ed47097a04 test: vboot: clean its file
This update the its file used in vboot test to respect the new
node style name defined in doc/uImage.FIT (for example: replace
kernel@1 by kernel and fdt@1 by fdt-1)

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
e246b728ee test: vboot: add padding pss for rsa signature
The padding pss is now supported for rsa signature.
This add test with padding pss on vboot test.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
b0ec829978 configs: sandbox: enable padding pss for rsa signature
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
e83cf2fbfc doc: uImage.FIT: signature.txt: add option padding
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
061daa0b61 rsa: add support of padding pss
We add the support of the padding pss for rsa signature.
This new padding is often recommended instead of pkcs-1.5.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
20031567e1 rsa: add a structure for the padding
The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00