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armv8: ls1046aqds: Add TFABOOT support
TFABOOT support includes: - ls1046aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Rajesh Bhagat
York Sun
parent
8e156bb176
commit
50e2d41f6c
6 changed files with 347 additions and 3 deletions
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@ -1,5 +1,6 @@
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LS1046AQDS BOARD
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M: Mingkai Hu <Mingkai.Hu@nxp.com>
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M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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S: Maintained
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F: board/freescale/ls1046aqds/
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F: include/configs/ls1046aqds.h
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@ -9,6 +10,7 @@ F: configs/ls1046aqds_sdcard_ifc_defconfig
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F: configs/ls1046aqds_sdcard_qspi_defconfig
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F: configs/ls1046aqds_qspi_defconfig
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F: configs/ls1046aqds_lpuart_defconfig
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F: configs/ls1046aqds_tfa_defconfig
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M: Sumit Garg <sumit.garg@nxp.com>
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S: Maintained
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@ -92,6 +92,16 @@ found:
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popts->cpo_sample = 0x70;
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}
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#ifdef CONFIG_TFABOOT
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int fsl_initdram(void)
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{
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gd->ram_size = tfa_get_dram_size();
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if (!gd->ram_size)
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gd->ram_size = fsl_ddr_sdram_size();
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return 0;
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}
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#else
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int fsl_initdram(void)
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{
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phys_size_t dram_size;
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@ -116,3 +126,4 @@ int fsl_initdram(void)
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return 0;
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}
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#endif
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@ -13,6 +13,7 @@
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#include <asm/arch/ppa.h>
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#include <asm/arch/fdt.h>
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#include <asm/arch/mmu.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/arch-fsl-layerscape/fsl_icid.h>
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#include <ahci.h>
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@ -32,12 +33,140 @@
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_TFABOOT
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struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
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{
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"nor0",
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CONFIG_SYS_NOR0_CSPR,
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CONFIG_SYS_NOR0_CSPR_EXT,
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CONFIG_SYS_NOR_AMASK,
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CONFIG_SYS_NOR_CSOR,
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{
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CONFIG_SYS_NOR_FTIM0,
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CONFIG_SYS_NOR_FTIM1,
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CONFIG_SYS_NOR_FTIM2,
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CONFIG_SYS_NOR_FTIM3
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},
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},
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{
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"nor1",
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CONFIG_SYS_NOR1_CSPR,
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CONFIG_SYS_NOR1_CSPR_EXT,
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CONFIG_SYS_NOR_AMASK,
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CONFIG_SYS_NOR_CSOR,
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{
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CONFIG_SYS_NOR_FTIM0,
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CONFIG_SYS_NOR_FTIM1,
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CONFIG_SYS_NOR_FTIM2,
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CONFIG_SYS_NOR_FTIM3
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},
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},
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{
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"nand",
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CONFIG_SYS_NAND_CSPR,
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CONFIG_SYS_NAND_CSPR_EXT,
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CONFIG_SYS_NAND_AMASK,
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CONFIG_SYS_NAND_CSOR,
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{
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CONFIG_SYS_NAND_FTIM0,
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CONFIG_SYS_NAND_FTIM1,
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CONFIG_SYS_NAND_FTIM2,
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CONFIG_SYS_NAND_FTIM3
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},
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},
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{
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"fpga",
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CONFIG_SYS_FPGA_CSPR,
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CONFIG_SYS_FPGA_CSPR_EXT,
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CONFIG_SYS_FPGA_AMASK,
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CONFIG_SYS_FPGA_CSOR,
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{
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CONFIG_SYS_FPGA_FTIM0,
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CONFIG_SYS_FPGA_FTIM1,
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CONFIG_SYS_FPGA_FTIM2,
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CONFIG_SYS_FPGA_FTIM3
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},
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}
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};
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struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
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{
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"nand",
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CONFIG_SYS_NAND_CSPR,
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CONFIG_SYS_NAND_CSPR_EXT,
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CONFIG_SYS_NAND_AMASK,
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CONFIG_SYS_NAND_CSOR,
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{
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CONFIG_SYS_NAND_FTIM0,
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CONFIG_SYS_NAND_FTIM1,
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CONFIG_SYS_NAND_FTIM2,
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CONFIG_SYS_NAND_FTIM3
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},
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},
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{
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"nor0",
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CONFIG_SYS_NOR0_CSPR,
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CONFIG_SYS_NOR0_CSPR_EXT,
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CONFIG_SYS_NOR_AMASK,
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CONFIG_SYS_NOR_CSOR,
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{
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CONFIG_SYS_NOR_FTIM0,
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CONFIG_SYS_NOR_FTIM1,
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CONFIG_SYS_NOR_FTIM2,
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CONFIG_SYS_NOR_FTIM3
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},
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},
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{
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"nor1",
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CONFIG_SYS_NOR1_CSPR,
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CONFIG_SYS_NOR1_CSPR_EXT,
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CONFIG_SYS_NOR_AMASK,
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CONFIG_SYS_NOR_CSOR,
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{
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CONFIG_SYS_NOR_FTIM0,
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CONFIG_SYS_NOR_FTIM1,
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CONFIG_SYS_NOR_FTIM2,
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CONFIG_SYS_NOR_FTIM3
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},
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},
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{
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"fpga",
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CONFIG_SYS_FPGA_CSPR,
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CONFIG_SYS_FPGA_CSPR_EXT,
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CONFIG_SYS_FPGA_AMASK,
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CONFIG_SYS_FPGA_CSOR,
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{
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CONFIG_SYS_FPGA_FTIM0,
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CONFIG_SYS_FPGA_FTIM1,
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CONFIG_SYS_FPGA_FTIM2,
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CONFIG_SYS_FPGA_FTIM3
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},
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}
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};
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void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
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{
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enum boot_src src = get_boot_src();
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if (src == BOOT_SOURCE_IFC_NAND)
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regs_info->regs = ifc_cfg_nand_boot;
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else
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regs_info->regs = ifc_cfg_nor_boot;
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regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
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}
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#endif
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enum {
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MUX_TYPE_GPIO,
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};
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int checkboard(void)
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{
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#ifdef CONFIG_TFABOOT
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enum boot_src src = get_boot_src();
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#endif
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char buf[64];
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#ifndef CONFIG_SD_BOOT
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u8 sw;
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@ -45,6 +174,12 @@ int checkboard(void)
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puts("Board: LS1046AQDS, boot from ");
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#ifdef CONFIG_TFABOOT
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if (src == BOOT_SOURCE_SD_MMC)
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puts("SD\n");
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else {
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#endif
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#ifdef CONFIG_SD_BOOT
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puts("SD\n");
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#else
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@ -63,6 +198,9 @@ int checkboard(void)
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printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
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#endif
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#ifdef CONFIG_TFABOOT
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}
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#endif
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printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n",
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QIXIS_READ(id), QIXIS_READ(arch));
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@ -153,7 +291,8 @@ int dram_init(void)
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*/
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select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
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fsl_initdram();
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#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
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#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
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defined(CONFIG_SPL_BUILD)
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/* This will break-before-make MMU for DDR */
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update_early_mmu_table();
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#endif
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@ -342,3 +481,10 @@ u16 flash_read16(void *addr)
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return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
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}
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#ifdef CONFIG_TFABOOT
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void *env_sf_get_env_addr(void)
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{
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return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
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}
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#endif
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65
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
Normal file
65
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
Normal file
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@ -0,0 +1,65 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1046AQDS=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SECURE_BOOT=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_TFABOOT=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
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# CONFIG_USE_BOOTCOMMAND is not set
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CONFIG_MISC_INIT_R=y
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_CACHE=y
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CONFIG_MP=y
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CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
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CONFIG_ENV_IS_NOWHERE=y
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CONFIG_DM=y
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CONFIG_FSL_CAAM=y
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CONFIG_DM_MMC=y
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SPI_FLASH=y
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CONFIG_PHYLIB=y
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CONFIG_E1000=y
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CONFIG_PCI=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_LAYERSCAPE=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_RSA=y
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CONFIG_DM_SCSI=y
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CONFIG_SATA_CEVA=y
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CONFIG_SCSI_AHCI=y
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CONFIG_SCSI=y
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CONFIG_AHCI=y
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65
configs/ls1046aqds_tfa_defconfig
Normal file
65
configs/ls1046aqds_tfa_defconfig
Normal file
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@ -0,0 +1,65 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1046AQDS=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_TFABOOT=y
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
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# CONFIG_USE_BOOTCOMMAND is not set
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CONFIG_MISC_INIT_R=y
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_CACHE=y
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CONFIG_MP=y
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CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_DM=y
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CONFIG_FSL_CAAM=y
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CONFIG_DM_MMC=y
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SPI_FLASH=y
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CONFIG_PHYLIB=y
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CONFIG_E1000=y
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CONFIG_PCI=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_LAYERSCAPE=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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CONFIG_FSL_QSPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_DM_SCSI=y
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CONFIG_SATA_CEVA=y
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CONFIG_SCSI_AHCI=y
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CONFIG_SCSI=y
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CONFIG_AHCI=y
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@ -50,7 +50,8 @@ unsigned long get_board_ddr_clk(void);
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#endif
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/* QSPI */
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#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
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#if defined(CONFIG_TFABOOT) || \
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defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
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#ifdef CONFIG_FSL_QSPI
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#define CONFIG_SPI_FLASH_SPANSION
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#define FSL_QSPI_FLASH_SIZE (1 << 24)
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@ -227,7 +228,8 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
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#endif
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#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
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#if defined(CONFIG_TFABOOT) || \
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defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
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#define CONFIG_QIXIS_I2C_ACCESS
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#define CONFIG_SYS_I2C_EARLY_INIT
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#endif
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@ -282,6 +284,40 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_FPGA_FTIM3 0x0
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#endif
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#ifdef CONFIG_TFABOOT
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#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
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#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR
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#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK
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#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR
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#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0
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#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1
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#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2
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#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3
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#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT
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#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR
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#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK
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#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR
|
||||
#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0
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||||
#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1
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||||
#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2
|
||||
#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3
|
||||
#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT
|
||||
#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR
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||||
#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK
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||||
#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR
|
||||
#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0
|
||||
#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1
|
||||
#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
|
||||
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
|
||||
#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT
|
||||
#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
|
||||
#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK
|
||||
#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR
|
||||
#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0
|
||||
#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1
|
||||
#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2
|
||||
#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3
|
||||
#else
|
||||
#ifdef CONFIG_NAND_BOOT
|
||||
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
|
||||
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
|
||||
|
|
@ -349,6 +385,7 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2
|
||||
#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* I2C bus multiplexer
|
||||
|
|
@ -399,6 +436,14 @@ unsigned long get_board_ddr_clk(void);
|
|||
*/
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
#ifdef CONFIG_TFABOOT
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
|
||||
#define CONFIG_ENV_SIZE 0x2000
|
||||
#define CONFIG_ENV_OFFSET 0x500000 /* 5MB */
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x500000)
|
||||
#define CONFIG_ENV_SECT_SIZE 0x20000
|
||||
#else
|
||||
#ifdef CONFIG_NAND_BOOT
|
||||
#define CONFIG_ENV_SIZE 0x2000
|
||||
#define CONFIG_ENV_OFFSET (12 * CONFIG_SYS_NAND_BLOCK_SIZE)
|
||||
|
|
@ -415,10 +460,19 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_ENV_SECT_SIZE 0x20000
|
||||
#define CONFIG_ENV_SIZE 0x20000
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
|
||||
#undef CONFIG_BOOTCOMMAND
|
||||
#ifdef CONFIG_TFABOOT
|
||||
#define QSPI_NOR_BOOTCOMMAND "sf probe && sf read $kernel_load " \
|
||||
"e0000 f00000 && bootm $kernel_load"
|
||||
#define IFC_NOR_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \
|
||||
"$kernel_size && bootm $kernel_load"
|
||||
#define SD_BOOTCOMMAND "mmc info; mmc read $kernel_load" \
|
||||
"$kernel_addr_sd $kernel_size_sd && bootm $kernel_load"
|
||||
#else
|
||||
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
|
||||
#define CONFIG_BOOTCOMMAND "sf probe && sf read $kernel_load " \
|
||||
"e0000 f00000 && bootm $kernel_load"
|
||||
|
|
@ -426,6 +480,7 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \
|
||||
"$kernel_size && bootm $kernel_load"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#include <asm/fsl_secure_boot.h>
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue