Commit graph

1018 commits

Author SHA1 Message Date
Marek Vasut
8cd46cba53 mmc: sd_sdhi: Enable clock using clock framework
Since we now have clock driver for the RCar Gen3 , add support for
enabling the clock into the SH SDHI driver to prevent hacks in the
board files.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17 14:38:18 +09:00
Marek Vasut
a3f0a7d5b5 mmc: sh_sdhi: Fix the ACMD handling
The command handling in this driver is awful, esp. because the driver
depends on command numbers to determine whether this is APPCMD or not.
Also, handling of command RSP response types is totally wrong.

This patch at least plucks out some of the custom command encoding and
fixes the APPCMD handling. The RSP handling still needs work, yet that
might not be needed as it turns out the uniphier-sd.c driver is in much
better shape and supports the same IP, so we might be able to just drop
this driver in favor of the uniphier one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17 14:38:02 +09:00
Marek Vasut
d1c18ca110 mmc: sh_sdhi: Add DM and DT probing support
Add MMC DM and DT probing support into the SH SDHI driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17 14:37:45 +09:00
Marek Vasut
ac5efc358b mmc: uniphier-sd: Fix long response processing
The long response entry 0..3 LSByte comes from the next response
register MSByte, not from the next response register LSByte. Fix
this to make the driver report correct values in response 136 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-17 14:36:05 +09:00
Yang Li
590e87d1a6 mmc: fsl_esdhc: not always setting esdhc fdt status to okay
We shouldn't always change the status to okay.  There could be
situations that the esdhc is intentionally disabled in the device
tree.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
York Sun
9bb272e90a driver: mmc: fsl_esdhc: Fix compiling warning
Commit 4483b7eb added variable vqmmc_dev but only uses it under
CONFIG_DM_REGULATOR. Add the same macro to variable declaration to
get rid of compiling warning.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-08-09 09:11:29 -07:00
Tom Rini
07d7783822 Merge git://git.denx.de/u-boot-x86 2017-08-01 15:38:32 -04:00
Simon Glass
b7c6baef28 x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
Simon Glass
dd27918c22 dm: mmc: sunxi: Add support for driver model
Add a driver-model version of this driver which mostly uses the existing
code. The old code can be removed once all boards are switched over.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:01 +09:00
Simon Glass
ec73d96090 dm: mmc: sunxi: Drop mmc_clk_io_on()
This function has #ifdefs in it which we want to avoid for driver model.
Instead we should use different compatible strings and the .data field.
It also uses the MMC device number which is not available in driver
model except through aliases.

Move the function's into its caller so that the driver-model version can
do things its own way.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
034e226bc7 dm: mmc: sunxi: Pass private data around explicitly
At present the driver-private data is obtained in various functions by
various means. With driver model this is provided automatically. Without
driver model it comes from a C array declared at the top of the file.

Adjust internal functions so that they are passed the private data as
a parameter, allowing the caller to obtain it using either means.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
3f5af12a5d dm: mmc: sunxi: Rename mmchost to priv
Use the driver-model naming convention for this structure. It is data
private to the driver so the local variable should be called 'priv'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
e3c794e2fa dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv
Use the driver-model naming convention for this structure. It is data
private to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
c4d660d4d0 dm: mmc: Allow disabling driver model in SPL
At present if U-Boot proper uses driver model for MMC, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.

Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By
default these follow their non-SPL versions, but this can be changed by
boards which need it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:00 +09:00
Simon Glass
49cb9308c4 dm: tegra: mmc: Convert to livetree
Update the tegra mmc driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28 12:02:47 -06:00
Masahiro Yamada
aae6f016a7 mmc: cadence: use fdt32_t for DT property value to fix sparse warning
DTB is encoded in big endian.  When we retrieve property values,
we need to use fdt32_to_cpu (aka be32_to_cpu) for endian conversion.
This is a bit error-prone, but sparse is useful to detect endian
mismatch.

We need to use (fdt32_t *) instead of (u32 *) for a pointer of a
property value.  Otherwise sparse warns "cast to restricted __be32".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-19 19:13:59 +09:00
Kever Yang
343749c425 mmc: rpmb: update size format for write_counter
According to MMC spec, the write_counter is 4-byte length,
use 'int' instead of 'long' type for the 'long' is not 4-byte
in 64 bit CPU.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-19 19:13:59 +09:00
Stefano Babic
552a848e4f imx: reorganize IMX code as other SOCs
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic <sbabic@denx.de>

CC: Fabio Estevam <fabio.estevam@nxp.com>
CC: Akshay Bhat <akshaybhat@timesys.com>
CC: Ken Lin <Ken.Lin@advantech.com.tw>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Heiko Schocher <hs@denx.de>
CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Patrick Bruenn <p.bruenn@beckhoff.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Nikita Kiryanov <nikita@compulab.co.il>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: "Eric Bénard" <eric@eukrea.com>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Ye Li <ye.li@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Adrian Alonso <adrian.alonso@nxp.com>
CC: Alison Wang <b18965@freescale.com>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Martin Donnelly <martin.donnelly@ge.com>
CC: Marcin Niestroj <m.niestroj@grinn-global.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Adam Ford <aford173@gmail.com>
CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
CC: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Soeren Moch <smoch@web.de>
CC: Richard Hu <richard.hu@technexion.com>
CC: Wig Cheng <wig.cheng@technexion.com>
CC: Vanessa Maegima <vanessa.maegima@nxp.com>
CC: Max Krummenacher <max.krummenacher@toradex.com>
CC: Stefan Agner <stefan.agner@toradex.com>
CC: Markus Niebel <Markus.Niebel@tq-group.com>
CC: Breno Lima <breno.lima@nxp.com>
CC: Francesco Montefoschi <francesco.montefoschi@udoo.org>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Scott Wood <oss@buserror.net>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Simon Glass <sjg@chromium.org>
CC: "Andrew F. Davis" <afd@ti.com>
CC: "Łukasz Majewski" <l.majewski@samsung.com>
CC: Patrice Chotard <patrice.chotard@st.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Hans de Goede <hdegoede@redhat.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stephen Warren <swarren@nvidia.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: "Álvaro Fernández Rojas" <noltari@gmail.com>
CC: York Sun <york.sun@nxp.com>
CC: Xiaoliang Yang <xiaoliang.yang@nxp.com>
CC: Chen-Yu Tsai <wens@csie.org>
CC: George McCollister <george.mccollister@gmail.com>
CC: Sven Ebenfeld <sven.ebenfeld@gmail.com>
CC: Filip Brozovic <fbrozovic@gmail.com>
CC: Petr Kulhavy <brain@jikos.cz>
CC: Eric Nelson <eric@nelint.com>
CC: Bai Ping <ping.bai@nxp.com>
CC: Anson Huang <Anson.Huang@nxp.com>
CC: Sanchayan Maity <maitysanchayan@gmail.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Patrick Delaunay <patrick.delaunay@st.com>
CC: Gary Bisson <gary.bisson@boundarydevices.com>
CC: Alexander Graf <agraf@suse.de>
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12 10:17:44 +02:00
Peng Fan
f34ccce50a mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Peng Fan
4483b7eb88 dm: mmc: fsl_esdhc: handle vqmmc supply
Handle vqmmc supply. Some boards have a fixed I/O voltage
at 1.8V for emmc, so the usdhc also needs to be configured
as 1.8V by setting VSELECT bit. The vs18_enable is the one
that used to checking whether setting VSELECT or not in
the driver. So if vqmmc supply is 1.8V, set vs18_enable,
the driver will set VSELECT.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-12 09:44:22 +02:00
Peng Fan
32a9179f3a mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/O
When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
the USDHC controller when init.

This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg
structure and priv data, so each controller can have different
settings.

We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem
that it will apply to all USDHC controllers and it only set the 1.8V
at init phase. So if user does not select to the eMMC device,
the voltage on the I/O pins are not correct.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Tom Rini
d43ef73bf2 Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2017-07-11 14:21:50 -04:00
Kever Yang
419b08012a Revert "mmc: dw_mmc: rockchip: select proper card clock"
The origin patch get rockchip dwmmc by name 'ciu', which lead
to the SPL not able to remove 'clock-names' node in dts.
I'm not saying this is not correct, but I would prefer to handle
this in dts or clock driver to save memory for SPL.
For example the rk3288 SPL size has out of memory if not enable
BACK_TO_BROM option, there are many other SoCs has less internal
memory than rk3288.

This reverts commit 480a9b834c.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Kever Yang
8093529809 rockchip: dwmmc: use max-frequency when OF_PLATDATA enabled
Since the 'clock-freq-min-max' is deprecated, we use max-frequency for
all rockchip SoC dwmmc controller.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Philipp Tomsich
fd1bf8df25 rockchip: mmc: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the dw_mmc and sdhci wrapper drivers for Rockchip.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Jorge Ramirez-Ortiz
fc50a6cbc0 driver: mmc: update debug info
This driver is used in another board; remove board information from
the driver debug log.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-10 14:26:03 -04:00
Tom Rini
08546df976 Merge git://git.denx.de/u-boot-x86 2017-06-27 09:33:10 -04:00
Tom Rini
821560fd8e Merge git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h
2017-06-27 09:32:37 -04:00
Bin Meng
da2364cc14 Revert "x86: Convert MMC to driver model"
This reverts commit ddb3ac3c71.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-27 16:31:30 +08:00
Simon Glass
542b5f8567 tegra: mmc: Set the bus width correctly
The driver currently does not reset bit 5 of the hostctl register even if
the MMC stack requests it. Then means that once a bus width of 8 is
selected it is not possible to change it back to 1. This breaks
'mmc rescan' which needs to start off with a bus width of 1.

The problem was surfaced by enabling CONFIG_DM_MMC_OPS on tegra. Without
this option the MMC stack fully reinits the driver on a 'mmc rescan'.
But with this option driver model does not re-probe a driver once it has
been probed once.

Fix the driver to honour the request.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Chubb <peter.chubb@data61.csiro.au>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2017-06-20 09:47:59 -07:00
Simon Glass
9752564722 dm: mmc: Avoid probing block devices in find_mmc_device()
We do not need to probe the block device here, so avoid doing so. The MMC
device itself must be active, but the block device can come later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 20:25:16 +09:00
Marek Vasut
0f53118511 mmc: sh_sdhi: Fix Kconfig entry
The Kconfig entry depends on RMOBILE, but this was renamed
to ARCH_RMOBILE in commit 1cc95f6e1b (ARM: Rmobile: Rename
CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
a5950f8dfb mmc: sh_sdhi: Add SDHI support
R-Car Gen3 series have four SD card interfaces (SDHI0 to SDHI3),
two of which can also be used as MMC interfaces (SDHI2 and SDHI3).
This adds High-speed mode SD clock frequency between 25MHz and 50MHz,
8bit/4bit bus width, high capacity and low voltage device support.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
91a16c3b2f mmc: sh_sdhi: Add MMC version 5.0 support
Renesas SDHI SD/MMC driver did not support MMC version 5.0 devices.
This adds MMC version 5.0 device support.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-06-09 20:25:16 +09:00
Kouei Abe
5eada1dbd0 mmc: sh_sdhi: Add 64-bit access to sd_buf support
Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF.
This adds 64-bit width bus access to SD_BUF.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
3ebc62c987 mmc: sh_sdhi: Set SD_INFOx interrupt mask before command starting
When setting interrupt mask after command starting, an unintended
interrupt status sometimes occurs.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Simon Glass
ebf925051f samsung: mmc: Drop s3c_sdi driver
This is no-longer used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-05 11:02:30 -04:00
Simon Glass
66e0ed5c17 dm: mmc: Convert uclass to livetree
Update the mmc uclass to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:13 -06:00
Simon Glass
150c5afe5b dm: gpio: Add live tree support
Add support for requesting GPIOs with a live device tree.

This involves adjusting the function signature for the legacy function
gpio_request_by_name_nodev(), so fix up all callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes to stm32f746-disco.c:
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-01 07:03:10 -06:00
Simon Glass
911f3aef35 dm: core: Rename of_device_is_compatible()
The of_ prefix conflicts with the livetree version of this function.
Rename it to avoid problems when we add livetree support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:06 -06:00
Simon Glass
0e513e788f tegra: Convert MMC to use driver model for operations
Enable CONFIG_DM_MMC_OPS and CONFIG_BLK for all Tegra devices. This moves
Tegra to use driver model fully for MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:05 -06:00
Simon Glass
854f9a71f5 dm: mmc: Rewrite mmc_blk_probe()
This function is called when the MMC block device is being probed. There
is a recursive call in this function since find_mmc_device() itself can
cause the MMC device to be probed.

Admittedly the MMC device should already be probed, since we would not be
probing its child otherwise, but the current code is unnecessarily
convoluted.

Rewrite this to access the MMC structure directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:05 -06:00
Simon Glass
66656020ff dm: mmc: Check that drivers have operations
When binding a new MMC device, make sure that it has the required
operations. Since for now we still support *not* having the operations
(with CONFIG_DM_MMC_OPS not enabled) it makes sense to add this check.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:05 -06:00
Simon Glass
05cbeb7c36 dm: mmc: Don't call board_mmc_power_init() with driver model
We should not call out to board code from drivers. With driver model,
mmc_power_init() already has code to use a named regulator, but the
legacy code path remains. Update the code to make this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:04 -06:00
Simon Glass
da409ccc4a dm: core: Replace of_offset with accessor (part 2)
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:04 -06:00
Simon Glass
4af0d7e870 dm: Fix up inclusion of common.h
It is good practice to include common.h as the first header. This ensures
that required features like the DECLARE_GLOBAL_DATA_PTR macro,
configuration options and common types are available.

Fix up some files which currently don't do this. This is necessary because
driver model will soon start using global data and configuration in the
dm/read.h header file, included via dm.h. The gd->fdt_blob value will be
used to access the device tree and CONFIG options will be used to
determine whether to support inline functions in the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:03 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Simon Glass
9d922450aa dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 06:57:52 -06:00
Jagan Teki
2e87c440f6 mmc: fsl_esdhc: Move non DM_MMC code in #ifndef CONFIG_DM_MMC
Don't build non DM_MMC code when DM_MMC defined so move
them into #ifndef CONFIG_DM_MMC

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-31 10:21:24 +02:00
Benoît Thébaudeau
4f425280fa mmc: fsl_esdhc: Allow all supported prescaler values
On i.MX, SYSCTL.SDCLKFS may be set to 0 in order to make the SD clock
frequency prescaler divide by 1 in SDR mode. In DDR mode, the prescaler
can divide by up to 512. Allow both of these settings.

The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25,
this change makes it possible to get 48 MHz from the USB PLL
(240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL
(240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2).

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 10:14:00 +02:00
Heiner Kallweit
f98205c7e4 mmc: meson: increase max block number per request
Number of blocks is a 9 bit field where 0 stands for a unlimited
number of blocks. Therefore the max number of blocks which can
be set is 511.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
2017-05-29 17:28:52 +09:00
Simon Glass
ddb3ac3c71 x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-05-17 17:13:06 +08:00
Wenyou Yang
b3125088a3 mmc: atmel_sdhci: Enable the quirk SDHCI_QUIRK_WAIT_SEND_CMD
To fix the timeout of sending the write command, enable the quirk
SDHCI_QUIRK_WAIT_SEND_CMD.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-16 06:29:28 +09:00
Masahiro Yamada
792f0054a4 mmc: descend into drivers/mmc only when CONFIG_MMC is enabled
This simplifies makefiles.  Also, arrange the order of objects in
drivers/mmc/Makefile so that the framework objects are listed before
drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:23 +09:00
Masahiro Yamada
4aa2ba3a34 mmc: replace CONFIG_GENERIC_MMC with CONFIG_MMC
Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig.
We do not need two options for the same feature.  Deprecate the
former.

This commit was generated with the sed script 's/GENERIC_MMC/MMC/'
and manual fixup of drivers/mmc/Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:23 +09:00
Masahiro Yamada
0cacd6b755 mmc: sdhci-cadence: import updates from Linux 4.12
This driver is a counterpart of drivers/mmc/host/sdhci-cadence.c
from Linux.  Some updates for v4.12-rc1 can be imported to U-Boot.

 - Fix value of SDHCI_CDNS_HRS04_RDATA_SHIFT
 - Add polling for ACK bit to be sure that data are written to
   the PHY register
 - Retrieve PHY values from DT properties instead of fixed data

The following is the list of upstream commits:

 - Linux commit 4e03f628b464e0580abadf5161eaa38c61d20943
   mmc: sdhci-cadence: fix bit shift of read data from PHY port

 - Linux commit a0f8243229ed071c8da0ea7cedc1b7bf1b1515da
   mmc: sdhci-cadence: Fix writing PHY delay

 - Linux commit a89c472d8b55c5afc4c79e6e3d1338730034eb01
   mmc: sdhci-cadence: Update PHY delay configuration

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:22 +09:00
Wenyou Yang
0e0dcc1916 mmc: sdhci: Fix maximum clock for programmable clock mode
In the programmable clock mode, the SDCLK frequency is incorrectly
assigned when the maximum clock has been assigned during probe,
this causes the SDHCI not work well.

In the programmable clock mode, when calculating the SDCLK Frequency
Select, when the maximum clock has been assigned, it is the actual
value, should not be multiplied by host->clk_mul. Otherwise, the
maximum clock is multiplied host->clk_mul by the base clock achieved
from the BASECLKF field of the Capabilities 0 Register.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-15 18:28:22 +09:00
Jean-Jacques Hiblot
b5511d6cb8 drivers: omap_hsmmc: move to DM_MMC_OPS
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 18:28:21 +09:00
Lokesh Vutla
cbcb170164 dm: mmc: omap_hsmmc: Add pre-reloc flag to the driver
For platforms that don't use device tree in SPL the only
way to mark this driver as 'required by relocation' is
with the DM_FLAG_PRE_RELOC flag. Add this to ensure that
the driver is bound.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-11 22:21:28 -04:00
Lokesh Vutla
2558c04906 dm: mmc: omap_hsmmc: Update to support of-platdata
This is to aid platforms that uses OF_PLATDATA.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-11 22:21:27 -04:00
Philipp Tomsich
ff71f9ac33 rockchip: mmc: handle deprecation of 'clock-freq-min-max'
The 'clock-freq-min-max' property was deprecated in the upstream
(i.e. Linux) DTS bindings in favor of the 'max-frequency' property.

With the latest RK3399 DTSI does no longer include the deprecated
property and the rockchip_dw_mmc driver requiring it to be present,
the driver doesn't bind to the node in the RK3399 DTSI any longer
(thus breaking access to the SD card on the RK3399-Q7 board).

To fix this, we implement a similar logic as in the Linux driver: if
the deprecated property is present, we issue a warning (if DEBUG is
enabled); if it is missing, we require 'max-frequency' to be set and
use it to create a min/max value-pair.

See b023030f10
for the deprecation/matching change in Linux.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10 13:37:21 -06:00
Xu Ziyuan
480a9b834c mmc: dw_mmc: rockchip: select proper card clock
As you know, biu_clk is used for AMBA AHB/APB interface, ciu_clk is
used for communication between host and card devices. The real bus clock
is ciu, so let's rectify it.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Adam Ford
46831c1a4c omap_hsmmc: update struct hsmmc to accommodate omap3 from DT
This patch changes the way DM_MMC calculates offset to the base register of
MMC. Previously this was through an #ifdef but that wasn't necessary for OMAP3.

This patch will now add in the offset to the base address based on the
.compatible flags.

Signed-off-by: Adam Ford <aford173@gmail.com>

V2: Remove ifdef completely and reference offset from the omap_hsmmc_ids table.

V1: Change ifdef to ignore OMAP3
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 20:35:35 -04:00
Simon Glass
e6c6d07e2c dm: mmc: rpi: Convert Raspberry Pi to driver model for MMC
Convert the bcm2835 SDHCI driver over to support CONFIG_DM_MMC and move
all boards over. There is no need to keep the old code since there are no
other users.

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09 20:20:37 -04:00
Masahiro Yamada
90d6500c0f drivers: remove Blackfin specific drivers
These drivers have no user since commit ea3310e8aa ("Blackfin:
Remove").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-04-18 10:29:14 -04:00
Alex Deymo
7dde50d707 mmc: sdhci: Wait for SDHCI_INT_DATA_END when transferring.
sdhci_transfer_data() function transfers the blocks passed up to the
number of blocks defined in mmc_data, but returns immediately once all
the blocks are transferred, even if the loop exit condition is not met
(bit SDHCI_INT_DATA_END set in the STATUS word).

When doing multiple writes to mmc, returning right after the last block
is transferred can cause the write to fail when sending the
MMC_CMD_STOP_TRANSMISSION command right after the
MMC_CMD_WRITE_MULTIPLE_BLOCK command, leaving the mmc driver in an
unconsistent state until reboot. This error was observed in the rpi3
board.

This patch waits for the SDHCI_INT_DATA_END bit to be set even after
sending all the blocks.

Test: Reliably wrote 2GiB of data to mmc in a rpi3.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14 15:23:14 +09:00
Jocelyn Bohr
4db2b61fcf mmc: bcm2835_sdhci: Speed up mmc writes.
The linux kernel driver for this module does not use a delay when
writing to the SDHCI_BUFFER register. This patch mimics that behavior
in order to speed up the mmc writes on the Raspberry Pi.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14 15:23:03 +09:00
Wenyou Yang
c86c0155dc mmc: gen_atmel_mci: add driver model support for mci
Add the driver model support for Atmel mci while retaining the
existing legacy code. This allows the driver to support boards
that have converted to driver model as well as those that have not.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14 15:19:57 +09:00
Carlo Caione
937386204d mmc: meson: add MMC driver for Meson GX (S905)
This driver implements MMC support on Meson GX (S905) based systems.
It's based on Carlo Caione's work, changes:
- BLK support added
- general refactoring

Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2017-04-14 15:16:06 +09:00
Stefan Roese
706865afe5 dm: core: Add flags parameter to device_remove()
This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.

This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:15:10 -06:00
Tom Rini
3b19c1dbe0 Merge git://git.denx.de/u-boot-tegra 2017-04-04 16:01:02 -04:00
Marcel Ziswiler
4119b7098c mmc: tegra: allow disabling external clock loopback
Introduce CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK to disable the external clock
loopback and use the internal one on SDMMC3 as per the SDMMC_VENDOR_MISC_CNTRL_0
register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2017-04-01 15:45:04 -07:00
Jean-Jacques Hiblot
17c9a1c121 mmc: omap_hsmmc: add support for CONFIG_BLK
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:58 +09:00
Jean-Jacques Hiblot
3d673ffce3 mmc: omap_hsmmc: move the mmc_config to platdata when DM_MMC is used
This is a preparation work for the support of CONFIG_BLK.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:51 +09:00
Jean-Jacques Hiblot
dc09127a26 mmc: omap_hsmmc: use mmc_get_blk_desc() to get the block device desc
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:43 +09:00
Jean-Jacques Hiblot
ae000e231e mmc: omap_hsmmc: use an accessor to get the private data
For consistency, use an accessor to access the private data. Also for the
same reason, rename all priv_data to priv.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:31 +09:00
Stefan Roese
de0359c21e mmc: xenon_sdhci: Add missing host->max_clk to Xenon SDHCI driver
The Xenon SDHCI driver just missed the integration of this patch:

git ID 6d0e34bf
mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

With this patch applied, the SDHCI subsystem complains now with this warning
while probing:

sdhci_setup_cfg: Hardware doesn't specify base clock frequency

This patch fixes this issue, by providing the missing host->max_clk
variable to the SDHCI subsystem.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Hu Ziji <huziji@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-03-21 21:06:59 +09:00
Xu Ziyuan
166c2b8fd9 mmc: drop unnecessary send_status request
It's redundant to send cmd13 after cmd9 whose response is not R1b. The
card devices will not be busy w/ cmd9.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2017-03-21 21:04:17 +09:00
Kevin Liu
fa7720b21e mmc: sdhci: only flush cache for data command
No need to flush cache for command without data.

Signed-off-by: Kevin Liu <kevinliu@asrmicro.com>
2017-03-21 21:03:14 +09:00
Felipe Balbi
83b3248e7e mmc: tangier: Add Intel Tangier eMMC/SDHCI driver
This patch adds Intel Tangier eMMC/SDHCI driver.

Intel Tangier SoC contains a hybrid of PCI and non-PCI devices. SDHCI
controller is one of the devices which are *not* on a PCI and, hence,
cannot be enumerated by standard PCI means. This driver, allows for
SDHCI controller on Tangier SoC to work in U-Boot.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-03-21 21:03:14 +09:00
Felipe Balbi
b706b1c24d mmc: pci: Add CONFIG_MMC_PCI
We don't want pci_mmc to compile every time x86 compiles, only when
there's a platform that needs it. For that reason, we're adding a new
CONFIG_MMC_PCI which platforms can choose to enable.

Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-03-21 21:02:18 +09:00
Tom Rini
02ccab1908 Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/bk4r1_defconfig
	configs/colibri_vf_defconfig
	configs/pcm052_defconfig
	include/configs/colibri_vf.h
	include/configs/pcm052.h
2017-03-19 15:13:38 -04:00
Tom Rini
f9515756b6 Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang.  Also included is SPL support for rk3399 and a fix for
rk3288 to get it booting again (spl_early_init()).
2017-03-17 14:15:17 -04:00
Peng Fan
b60f14574e mmc: fsl_esdhc: support i.MX7ULP
Add compatible property for i.MX7ULP.
Add a weak init_usdhc_clk function, i.MX7ULP use this to init the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
2017-03-17 09:27:08 +01:00
Kever Yang
c2868212bb rockchip: sdhci: rk3399: update driver to support of-platdata
Change some API in order to enable of-platdata.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:43 -06:00
Tom Rini
b504ff9f6b Xilinx changes for v2017.05
- Move to DM clk driver
 - Add clk support for zynq_sdhci
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Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.05

- Move to DM clk driver
- Add clk support for zynq_sdhci
2017-03-16 16:44:23 -04:00
Patrice Chotard
51cb23d452 STiH410-B2260: Add device tree
This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-14 20:40:21 -04:00
Patrice Chotard
eee20f8132 STiH410: Add STi SDHCI driver
Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-03-14 20:40:20 -04:00
Stefan Herbrechtsmeier
61e745d131 mmc: zynq: Add fdt max-frequency support
The maximum supported peripheral clock frequency of the zynq depends on
the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz
respectively 25 MHz. Use the max-frequency value of the device tree to
determine the maximal supported peripheral clock frequency.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-17 10:22:47 +01:00
Stefan Herbrechtsmeier
e0f4de1afc mmc: zynq: Determine base clock frequency via clock framework
The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
clock frequency but this clock is not fixed and depends on the hardware
configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ
doesn't match the real base clock frequency of SDIO_FREQ. Use the clock
framework to determine the frequency at run time.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-17 10:22:47 +01:00
Tom Rini
2a48b3a2c4 omap_hsmmc.c: Fix build warning on non-omap3
It was incorrect to always include "asm/arch-omap3/mux.h" constantly.
This introduced warnings on non-omap3 where certain values will conflict
between the various families.  Conditionally guard the inclusion in
order to correct the problem.

Fixes: 6aca17c9b7 ("drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-09 13:41:28 -05:00
Fiach Antaw
a0269bb6e8 mmc: init mmc block devices on probe
MMC devices accessed exclusively via the driver model were not
being initialized before being exposed as block devices, causing
issues in scenarios where the MMC device is first accessed via the
uclass block interface.

Signed-off-by: Fiach Antaw <fiach.antaw@uqconnect.edu.au>
2017-02-09 20:37:06 +09:00
Adam Ford
6aca17c9b7 drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx
On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has
a field (bit 6) named GPIO_IO_PWRDNZ.  If 0, the IO buffers which
are related to GPIO_126, 127 and 129 are disabled. Some boards may
need this for MMC. After the PBIAS is configured, this bit should
be set high to enable these GPIO pins.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09 20:37:06 +09:00
Jaehoon Chung
d14f1d511a mmc: ftsdc021_sdhci: remove the ftsdc021_sdhci.c
ftsdc021_sdhci.c is dead file.
There is no reason to maintain this host controller.
Removes the entire ftsdc021_sdhci.c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09 20:37:05 +09:00
Jaehoon Chung
02ad33aa3a mmc: mmc-uclass: use the fixed devnum with alias node
If there are alias nodes as "mmc", use the devnum as alias index
number.
This patch is for fixing a problem of Exynos4 series.
Problem is the below thing.

Current legacy mode:
EXYNOS DWMMC: 0, SAMSUNG SDHCI: 1

After using DM:
SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1

Dev index is swapped.
Then u-boot can't find the kernel image..because it is already set to 0 as mmcdev.
If change from legacy to DM, also needs to touch all exynos4 config file.
For using simply, just supporting the fixed devnum with alias node is better than it.

Usage:
alaise {
	....
	mmc0 = &sdhci2; /* eMMC */
	mmc1 = &sdhci1; /* SD */
	...
}

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 20:37:05 +09:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Masahiro Yamada
dd3b64eb56 mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_AT91".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
1b85877060 mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
360c67d591 mmc: msm: rename CONFIG_MSM_SDHCI to CONFIG_MMC_SDHCI_MSM
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
facc805809 mmc: rockchip: rename CONFIG_ROCKCHIP_SDHCI to CONFIG_MMC_SDHCI_ROCKCHIP
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_ROCKCHIP".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00