Commit graph

3825 commits

Author SHA1 Message Date
Jonas Karlman
1f54f71b18 board: rockchip: Add Radxa E25 Carrier Board
Radxa E25 is a network application carrier board for the Radxa CM3I SoM
with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.

Features tested on a Radxa E25 v1.4:
- SD-card boot
- eMMC boot
- USB host
- PCIe/Ethernet adapters is detected
- SATA

Device tree is imported from linux next-20230728.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
2023-07-31 20:34:32 +08:00
Eugen Hristev
b8fc65473a board: rockchip: add Radxa ROCK5A Rk3588 board
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.

There are tree variants depending on the DRAM size : 4G, 8G and 16G.

Specifications:

     Rockchip Rk3588S SoC
     4x ARM Cortex-A76, 4x ARM Cortex-A55
     4/8/16GB memory LPDDR4x
     Mali G610MC4 GPU
     MIPI CSI 2 multiple lanes connector
     4-lane MIPI DSI connector
     Audio – 3.5mm earphone jack
     eMMC module connector
     uSD slot (up to 128GB)
     2x USB 2.0, 2x USB 3.0
     2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
     Gigabit Ethernet RJ45 with optional PoE support
     40-pin IO header including UART, SPI, I2C and 5V DC power in
     USB PD over USB Type-C
     Size: 85mm x 56mm (Raspberry Pi 4 form factor)

Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a")

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
6ed39520a7 doc: rockchip: Update SPI flashing instruction
Update documentation on how to write a bootable u-boot-rockchip-spi.bin
image into SPI flash. This removes the reference to a hardcoded and now
obsolete 0x60000 payload offset.

Also remove an obsolete reference to pad_cat.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
6855fa625c board: rockchip: Add Pine64 SOQuartz on CM4-IO
The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi
CM4 form factor. Therefore, it can slot into the official Raspberry Pi
CM4 IO carrier board. Add this configuration to U-Boot.

Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:36 +08:00
Jonas Karlman
d0026e5908 board: rockchip: Add Pine64 SOQuartz on Blade
The Pine64 SOQuartz Blade board is a carrier board for the SOQuartz
CM4-compatible compute module. It features PoE, an M.2 slot, an SD card
slot, HDMI, USB, serial and ethernet.

Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Jonas Karlman
651492bfb2 board: rockchip: Add Pine64 SOQuartz on Model A
The Pine64 SOQuartz Model A board is a carrier board for the SOQuartz
CM4-compatible compute module. It exposes PCIe, ethernet, USB, HDMI,
CSI, DSI, eDP and a 40 pin GPIO header, and is powered by 12V DC.

Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Jonas Karlman
f52452bbea board: rockchip: Add Pine64 Quartz64-B Board
The Pine64 Quartz64 Model B is a credit-card sized single-board
computer based on the Rockchip RK3566 SoC. The board features an M.2
PCIe slot, USB3, USB2, eMMC, SD, ethernet, HDMI, analog audio out, a
40 pin GPIO header and a DSI and CSI port, as well as on-board Wi-Fi.

Features tested on a Quartz64-B 4GB v1.4 2022-06-06:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Jonas Karlman
9c1b5d163e board: rockchip: Add Pine64 Quartz64-A Board
The Pine64 Quartz64 Model A is a single-board computer based on the
Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0,
CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a
20 pin GPIO header.

Features tested on a Quartz64-A 8GB v2.0 2021-04-27:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Tom Rini
a36d59ba99 Pull request for efi-2023-10-rc2
Documentation:
 
 * Update the documentation for TI K3 boards (use SVG images)
 * Update doc/sphinx/requirements.txt
 * Describe QEMU emulation of block devices
 
 UEFI
 
 * Fix device paths for special block devices
 -----BEGIN PGP SIGNATURE-----
 
 iQJWBAABCABAFiEEK7wKXt3/btL6/yA+hO4vgnE3U0sFAmTDoQ8iHGhlaW5yaWNo
 LnNjaHVjaGFyZHRAY2Fub25pY2FsLmNvbQAKCRCE7i+CcTdTS+XZEAC+VoP0OETr
 t2xEpL1bluc7a3rv9qWL+abSl/o2klhP816oSXM2EBZAZxGKnrZH731lgnnm9P6y
 OSmy2G/sTBywsc4qZrBK/SOs9mZxdEkSS2aX3YLvcJ0hKY7gD+ApER/gvkWqkPeE
 2X8UxwL5LnrP8iXI3mpFatCFfRV3fSSUoVMMDxnxsvSRaXBQP3cJOlKAFvudc8su
 i8i3UpDtyu/dQh031YRPgdsWtM4xz/S6zV7R23IIrgQBXkzelIo9xtraGSZpe8eP
 KDAxbqhqFxCydfmXnqWPEbNN+vwke9tTlkSFpYk2wFcQxCAMGP9iJ/sH5OlJEmE6
 Vi/l/y9JhK+UV+Tottm8GTlJhdsRatMO52Q77AQA/AdV5NgGcKUA3nPtxEQMRA4C
 98hFF76uXzy7yI6xjyzPDn8jx9AFhhoEUgDw8jeWnEAtChpx4ELFPFTJSjHZu7Kz
 43eL/I+UbT5K2tLbbFsA873CnSMc7ByT3qCuE/xSPgNug2Pl71Gek9Eph2Ptz5Yn
 KxBgVRuF9P0eYnX6sOYbxOummqp/L5PN95OHxOEBBb0/+r/KZoEgQd02Hobb4Cx+
 6C6PzOWez0CZVFR6GKTw3V6Rr7OIsIYQ0oaxNxhFgtBMHgVMgwGQsbbrMmvCERHL
 3aNGg4andFdK/zHZSlHLBTE6MfK6ETfRoA==
 =3DSQ
 -----END PGP SIGNATURE-----

Merge tag 'efi-2023-10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023-10-rc2

Documentation:

* Update the documentation for TI K3 boards (use SVG images)
* Update doc/sphinx/requirements.txt
* Describe QEMU emulation of block devices

UEFI

* Fix device paths for special block devices
2023-07-28 12:48:00 -04:00
Tom Rini
6544943819 Merge branch '2023-07-27-TI-K2-K3-updates'
- Resync some of the K3 DTS files with the kernel, and pull in some
  required related updates to keep drivers in sync with the dts files
  now.  Bring in some incremental fixes on top of one of the series I
  applied recently as well as updating the iot2050 platform.  Also do a
  few small updates to the K2 platforms.
2023-07-28 10:25:50 -04:00
Jan Kiszka
4e0b8238ee doc: board: siemens: iot2050: Update build env vars
ATF is now called BL31, and OP-TEE since 3.21 suggests to use
tee-raw.bin instead of (the still identical) tee-pager_v2.bin.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-07-28 10:11:01 -04:00
Jan Kiszka
badaa1f6a7 boards: siemens: iot2050: Unify PG1 and PG2/M.2 configurations again
This avoids having to maintain to defconfigs that are 99% equivalent.
The approach is to use binman to generate two flash images,
flash-pg1.bin and flash-pg2.bin. With the help of a template dtsi, we
can avoid duplicating the common binman image definitions.

Suggested-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-07-28 10:11:01 -04:00
Jonas Karlman
94da929b93 board: rockchip: Add Hardkernel ODROID-M1
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC,
a slightly modified version of the RK3568 SoC.

Features tested on a ODROID-M1 8GB v1.0 2022-06-13:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe/AHCI
- SATA port
- USB host

Device tree is imported from linux v6.4.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:03 +08:00
Christopher Obbard
0022461ba6 arm: rockchip: Add Radxa ROCK 4SE
Add board-specific devicetree/config for the RK3399T-based Radxa ROCK 4SE
board. This board offers similar peripherals in a similar form-factor to
the existing ROCK Pi 4B but uses the cost-optimised RK3399T processor
(which has different OPP table than the RK3399) and other minimal hardware
changes.

Kernel tag: next-20230719
Kernel commits:
- 86a0e14a82ea ("arm64: dts: rockchip: Add Radxa ROCK 4SE")

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:03 +08:00
Jagan Teki
0a3a5746c3 board: rockchip: Add Edgeble Neural Compute Module 6B
Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
based on Rockchip RK3588J from Edgeble AI.

Add support for this SoM and IO board.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Jagan Teki
6b9fc19eac arch: rockchip: rk3588: Fix missing suffix 'A' for Edgeble Neu6A
Add missing suffix 'A' for Edgeble Neu6A SoM and IO boards.

Fixes: <15b2d1fb727> ("board: rockchip: Add Edgeble Neural Compute
Module 6")
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Chris Morgan
182d0ba6d6 doc: anbernic: Update RGxx3 Docs for panel detection
Update the Anbernic RGxx3 documentation to note that panel detection
has been added and how it works.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Nishanth Menon
6e8fa0611f board: ti: k3: Convert boot flow ascii flow to svg
Replace the ascii flow diagram with svg.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
5c86c57f9d doc: board: ti: k3: Sort the boards in alphabetical order
Keep the boards sorted in alphabetical order.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
08df746dd1 doc: board: ti: *: Add platform information
Add link to the actual platform for folks to find details about the
board in addition to the SoC's TRM.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
93d90bf33e doc: board: ti: j7200_evm: Convert the emmc layout to svg
Convert the emmc memory layout to svg

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
e19efb13c9 doc: board: ti: am65x_evm: Convert the emmc layout to svg
Convert the emmc memory layout to svg

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
757836d95a doc: board: ti: am65/j721e: Convert OSPI memory map to svg
Convert the memory map for OSPI as a common memory map

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
fc5b2b8ee5 doc: board: ti: am65x_evm: Convert the UART boot responsibility to list table
Use list tables to map up the UART Boot responsibility table.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
f940ec2f5e doc: board: ti: j7200_evm: Convert switch settings to list tables
Use list tables to map up the dip switch settings

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
36ed8fbf40 doc: board: ti: am62x_sk: Convert switch settings to list tables
Use list tables to map up the dip switch settings

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
d7c3ca985c doc: board: ti: am62x_sk: Add labels to reuse memory map
Add labels around the A53 SPL DDR memory layout to be able to reuse the
memory map.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
34f76921d8 doc: board: ti: am62x: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
654dceddcf doc: board: ti: am65x: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
3b83dff183 doc: board: ti: j721e: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
f4ade09a1e doc: board: ti: j7200: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
c727b81d65 doc: board: ti: k3: Reuse build instructions
Introduce common variables to define a generic build instruction that is
then used in specific board specific description.

Labels are introduced in the evm.rst files to be then reused in variant
board documentation as well.

While at this, drop using ARCH=arm when building u-boot sources. This
practice has been discouraged for some time and can potentially create
problems with Kconfig rules related to aarch64. It's best to avoid
this approach.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
9e30ebc983 doc: board: ti: j721e: Update with boot flow diagram
Update the bootflow svg diagram instead of the ascii version

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
fd358121bd doc: board: ti: am65x: Update with boot flow diagram
Update the bootflow svg diagram instead of the ascii version

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
68b3baaf3b doc: board: ti: am62x/j7200: Update with common boot flow diagram
Update the bootflow svg diagram and reuse across the platforms as they
are common.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
cce3e7a23d doc: board: ti: Optimize sources references
We have duplication of sources which makes it hard to sustain across the
board, but at the same time, we'd like to ensure readers get specific
information without having to cross refer to different documentation to
get piecemeal information that they need to put together.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Tom Rini
f687c8f7b4 doc: ti: Clarify required file names for K3 platforms
Now that we are using binman in all cases on these platforms, reword
things to be clearer that for filesystem booting we need to use a
specific name for each component.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-28 11:36:37 +02:00
Heinrich Schuchardt
8505c0bb5c doc: describe QEMU emulation of block devices
* Add a new page about the emulation of block devices
* Add semihosting to the emulation index page
* Set toc maxdepth to 1 to improve readability

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-28 11:36:37 +02:00
Heinrich Schuchardt
95537bd31c doc: fix typo device_compat/.h
%s/device_compat\/.h/device_compat.h/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-28 11:36:37 +02:00
Heinrich Schuchardt
771d7cd8c5 doc: update doc/sphinx/requirements.txt
Update the following requirements to their latest version:

* Pygments - syntax highlighting
* pytz     - world timezone definitions
* certifi  - Mozilla's CA bundle

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-07-28 11:36:37 +02:00
Tom Rini
ff296acc35 Prepare v2023.10-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-25 17:19:54 -04:00
Tom Rini
94e7cb181a Revert "Merge branch '2023-07-24-introduce-FF-A-suppport'"
This reverts commit d927d1a808, reversing
changes made to c07ad9520c.

These changes do not pass CI currently.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-24 19:51:05 -04:00
Abdellatif El Khlifi
dd40919bea arm_ffa: introduce sandbox test cases for UCLASS_FFA
Add functional test cases for the FF-A support

These tests rely on the FF-A sandbox emulator and FF-A
sandbox driver which help in inspecting the FF-A communication.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-07-24 15:30:03 -04:00
Abdellatif El Khlifi
32dd07ff46 arm_ffa: introduce sandbox FF-A support
Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support

Features of the sandbox FF-A support:

- Introduce an FF-A emulator
- Introduce an FF-A device driver for FF-A comms with emulated Secure World
- Provides test methods allowing to read the status of the inspected ABIs

The sandbox FF-A emulator supports only 64-bit direct messaging.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-07-24 15:30:03 -04:00
Abdellatif El Khlifi
e785db9277 arm_ffa: introduce armffa command
Provide armffa command showcasing the use of the U-Boot FF-A support

armffa is a command showcasing how to invoke FF-A operations.
This provides a guidance to the client developers on how to
call the FF-A bus interfaces. The command also allows to gather secure
partitions information and ping these  partitions. The command is also
helpful in testing the communication with secure partitions.

For more details please refer to the command documentation [1].

[1]: doc/usage/cmd/armffa.rst

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-07-24 15:30:03 -04:00
Abdellatif El Khlifi
c09bfc666c arm_ffa: introduce Arm FF-A support
Add Arm FF-A support implementing Arm Firmware Framework for Armv8-A v1.0

The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
describes interfaces (ABIs) that standardize communication
between the Secure World and Normal World leveraging TrustZone
technology.

This driver uses 64-bit registers as per SMCCCv1.2 spec and comes
on top of the SMCCC layer. The driver provides the FF-A ABIs needed for
querying the FF-A framework from the secure world.

The driver uses SMC32 calling convention which means using the first
32-bit data of the Xn registers.

All supported ABIs come with their 32-bit version except FFA_RXTX_MAP
which has 64-bit version supported.

Both 32-bit and 64-bit direct messaging are supported which allows both
32-bit and 64-bit clients to use the FF-A bus.

FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed
by the PSCI driver.

Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).

The Secure World is considered as one entity to communicate with
using the FF-A bus. FF-A communication is handled by one device and
one instance (the bus). This FF-A driver takes care of all the
interactions between Normal world and Secure World.

The driver exports its operations to be used by upper layers.

Exported operations:

- ffa_partition_info_get
- ffa_sync_send_receive
- ffa_rxtx_unmap

Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c).
Arm specific methods are implemented in the Arm driver (arm-ffa.c).

For more details please refer to the driver documentation [2].

[1]: https://developer.arm.com/documentation/den0077/latest/
[2]: doc/arch/arm64.ffa.rst

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-07-24 15:30:03 -04:00
Tom Rini
45622f3262 Merge branch '2023-07-22-TI-K3-improvements'
- Actually merge the assorted K3 platform improvements that were
  supposed to be in commit 247aa5a191 ("Merge branch
  '2023-07-21-assorted-TI-platform-updates'")
2023-07-24 13:55:59 -04:00
Tom Rini
590a6cff97 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Set up per-hart stack before any function call
- Sync visionfive2 board DTS with Linux
- Define cache line size for USB 3.0 driver for RISC-V CPU
2023-07-24 10:58:07 -04:00
Chanho Park
9070496794 doc: visionfive2: apply a trailing space to the prompt
Apply the trailing space changes in the guide document.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:22:02 +08:00
Manorit Chawdhry
a5e8678e0a configs: k3: Remove saved environments
Having saved environments usually causes inconsistencies while in
development workflow. The saved environments conflict with the
default ones that U-boot should be updating during development
but that doesn't happen and the saved environments need to be
reset during bootups to test the changes causing extra debugs.

Remove the saved environments as a default. Environments can always
be re-enabled locally if one does like them or needs them for
some production environment. Optionally, Uenv.txt can also be used on
some of the boot media.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:48 -04:00