Commit graph

47098 commits

Author SHA1 Message Date
Kever Yang
f24e36dac3 rockchip: clock: update sysreset driver binding
Using priv for new sysreset driver binding.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
f9ee57261f rockchip: sysreset: update Makefile to work with merged sysreset driver
After applying the merged sysreset driver, there are build failures
due to an out-of-sync Makefile. This updates drivers/sysreset/Makefile
to address these build failures.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Kever Yang
6ba54058ed rockchip: sysreset: merge into one common driver
Use a common driver for all Rockchip SOC instead of one for each SoC.
Use driver_data for reg offset.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
95d363cc30 rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)
With all targets converted to generate prepadded images, this removes
the spl_boot0 field from our config structure and removes the unused
code-path (for images that are not prepadded): i.e. spl_boot0 is now
implied as 'true' and the code is specialised by removing the other
case.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
4bbb05bcb5 rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to Kconfig
There still are a few CONFIG_SPL_* options selected using defines from
rk3188_common.h instead of via Kconfig.  This migrates those over to
Kconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
b82bd1f8d4 rockchip: back-to-bootrom: allow passing a cmd to the bootrom
The BROM supports forcing it to enter download-mode, if an appropriate
result/cmd-word is returned to it.  There already is a series to
support this in review, so this prepares the (newly C-version) of the
back-to-bootrom code to accept a cmd to passed on to the BROM.

All the existing call-sites are adjusted to match the changed function
signature.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
4d9253fb76 rockchip: rk3188: use boot0 hook to load up SPL in 2 steps
For the RK3188, the BROM will attempt to load up the first stage
image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
in the SRAM and then the remainder to offset 0xc00 in the SRAM.
It always enters at 0x804, though.

With this changeset, the RK3188 boot removes the TPL (stub) stage and
builds a single SPL binary that utilizes the early back-to-bootrom via
the boot0-hook.

Consequently, the passing of the saved boot params via pmu->os_reg[2]
is also removed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
ecfd71891a rockchip: back-to-bootrom: replace assembly-implementation with C-code
The back-to-bootrom implementation for Rockchip has always relied on
the stack-pointer being valid on entry, so there was little reason to
have this as an assembly implementation.

This provides a new C-only implementation of save_boot_params and
back_to_bootrom (relying on setjmp/longjmp) and removes the older
assembly-only implementation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
b4806d6f1f arm: provide a PCS-compliant setjmp implementation
The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
versions of) GCC optimised the set of registers.  One critical example
was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
supplied.

To increase robustness and ensure PCS-compliant behaviour, the setjmp
and longjmp implementation are now in assembly and closely match what
one would expect to find in a libc implementation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
ff143d5556 arm: mark save_boot_params_ret as a function
As no '.type' was set for save_boot_params_ret in start.S, binutils
did not track whether it was emitted as A32 or T32.  By properly
marking save_boot_params_ret as a potential function entry, we can
make sure that the compiler will insert the appropriate instructions
for branching to save_boot_params_ret both for call-sites emitted as
A32 and T32.

Reported-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
7776cc011d arm: make save_boot_params_ret prototype visible for AArch64
The save_boot_params_ret() prototype (for those of us, that have a
valid SP on entry and can implement save_boot_params() in C), was
previously only defined for !defined(CONFIG_ARM64).

This moves the declaration to a common block to ensure the prototype
is available to everyone that might need it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
b377d22264 rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM
Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
from NAND into SRAM and executes it. Then, following a return to bootrom, the
BROM loads additional code to SRAM (not overwriting the first block read) and
reenters at the same address as the first time.

To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
this model of having to count entries, this commit adds code to the boot0
hook to track the number of entries and handle them accordingly.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
16d761e3dd bcm281xx: boot0 hook: adjust to unified boot0 semantics
This updates the BCM281xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
62269f02ab bcm235xx: boot0 hook: adjust to unified boot0 semantics
This updates the BCM235xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 5
- ran 'whitespace-cleanup'
2017-11-21 23:57:21 +01:00
Philipp Tomsich
a002077d7d socfpga: boot0 hook: adjust to unified boot0 semantics
With the updated boot0 semantics (i.e. giving the boot0-hook control
over when and where the vector table is emitted), the boot0-hook for
the socfpga needs to be adjusted.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:21 +01:00
Philipp Tomsich
b3a6cdc43c rockchip: rk3036: use aligned address for SPL_TEXT_BASE
With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:21 +01:00
Kever Yang
a33fee154b rockchip: rk3288: use aligned address for SPL_TEXT_BASE
After we use boot0 hook, we can use offset '000' instead of '004' as
SPL_TEXT_BASE.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated tag in commit summary:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:21 +01:00
Kever Yang
d962e5dadc rockchip: mkimage: use spl_boot0 for all Rockchip SoCs
Enable the spl_boot0 in SPL and use the pre-padding TAG memory,
the mkimage do not need to pad it but only need to replace the value
with correct TAG value.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:21 +01:00
Philipp Tomsich
14ad6eb264 rockchip: enable boot0-hook for all Rockchip SoCs
Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
  instruction load and running by bootrom;

Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Commit message taken from an older patch by:]
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2017-11-21 23:57:21 +01:00
Kever Yang
cee7470cd8 rockchip: boot0: align to 0x20 for armv7 '_start'
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated to current code base:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:21 +01:00
Philipp Tomsich
ef70a42f0f arm: boot0 hook: move boot0 hook before '_start'
The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradict usage of the boot0 hook on ARM64.

To fix this (and unify the semantics for ARM and ARM64), we change the
boot0-hook semantics on ARM to match those on ARM64:
  (1) if a boot0-hook is present it is inserted at the start of
      the image
  (2) if a boot0-hook is present, emitting the ARM vector table
      (and the _start) symbol are suppressed in vectors.S and
      the boot0-hook has full control over where and when it
      wants to emit these

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:21 +01:00
Faiz Abbas
16fa2eb951 ARM: dra7: Kconfig: Add thermal configs for dra7xx and am57xx
Configure thermal configs to remain set by default for dra7xx and am57xx
devices.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-21 08:03:39 -05:00
Faiz Abbas
12dd1e5c6a ARM: dts: OMAP5+: Add support for bandgap sensor in SPL
Mark bandgap node as uboot,dm-spl so that it can be accessed in spl

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-11-21 08:03:38 -05:00
Faiz Abbas
8502f9f6d7 thermal: ti-bandgap: Add support for temperature sensor
The dra7xx series of SOCs contain a temperature sensor and an
associated analog-to-digital converter (ADC) which produces
an output which is proportional to the SOC temperature.
Add support for this temperature sensor.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-21 08:03:38 -05:00
Tom Rini
5ad1fec6ed TI: am57xx; Remove am57xx_evm_nodt_defconfig
We don't want this build anymore.

Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-21 08:03:32 -05:00
S. Lockwood-Childs
1dade18e40 README: update mailing list url
Old url currently returns 403; modify to url that actually works
with current state of the list server

Signed-off-by: S. Lockwood-Childs <sjl@vctlabs.com>
2017-11-21 07:43:32 -05:00
Stefan Agner
ded84f90a1 envtools: make sure version/timestamp header file are available
With commit 84d46e7e89 ("tools: env: allow to print U-Boot version")
the fw_env utilities need the version.h header file. Building only
the envtools in a pristine build directory will fail due to missing
header files.

Make sure the header files are a dependency of the envtools target.

Fixes: 84d46e7e89 ("tools: env: allow to print U-Boot version")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-21 07:43:32 -05:00
Tom Rini
c6831c74a9 env: Remove CONFIG_ENV_AES support
This support has been deprecated since v2017.09 due to security issues.
We now remove this support.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-21 07:43:31 -05:00
Heinrich Schuchardt
042de609ed omap3: spi: the symbol for Hertz is Hz
fix typo

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 20:18:40 -05:00
M. Vefa Bicakci
dd2081a8e4 Makefile: Correct SPL/TPL/DTB build race condition
When building on a multi-core machine for an SPL-enabled board that
also uses CONFIG_OF_EMBED, the following error can be encountered
due to a race condition:

  make[3]: *** No rule to make target 'spl/dts/dt.dtb.o', needed by
    'spl/dts/built-in.o'.  Stop.
  ../scripts/Makefile.spl:364: recipe for target 'spl/dts' failed
  make[2]: *** [spl/dts] Error 2
  make[2]: *** Waiting for unfinished jobs....

A reliable way to trigger this race condition is to add "sleep 60" to
the end of the "arch-dtbs" rule's recipe in "dts/Makefile" and to build
U-Boot against a board which uses the CONFIG_OF_EMBED and CONFIG_SPL
options using "make -j8" or a similar command.

This commit corrects this race condition via the use of CONFIG_OF_EMBED
in the same way that commit 3c00a2c8b5 ("Makefile: Correct dependency
race condition with TPL") and commit 054b3a1e80 ("dm: Makefile: Build
of-platdata before SPL") use CONFIG_OF_SEPARATE.

Signed-off-by: M. Vefa Bicakci <m.v.b@runbox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-20 20:18:39 -05:00
Heinrich Schuchardt
a874cac3b4 malloc: don't compare pointers to 0
0 is not a pointer. So do not compare pointers to 0.

Do not return 0 from functions with a pointer return
type.

Problem identified with Coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-20 20:18:39 -05:00
Heinrich Schuchardt
06feb5d0bf scripts/coccinelle: add some more coccinelle tests
Add some useful static code analysis scripts for coccinelle
copied from the Linux kernel v4.14-rc8:

Warn on check against NULL before calling free.
scripts/coccinelle/free/ifnullfree.cocci

Detect superfluous NULL check for list iterator.
scripts/coccinelle/iterators/itnull.cocci

Check if list iterator is reassigned.
scripts/coccinelle/iterators/list_entry_update.cocci

Check if list iterator is used after loop.
scripts/coccinelle/iterators/use_after_iter.cocci

Find wrong argument of sizeof in allocation function:
scripts/coccinelle/misc/badty.cocci

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 20:18:39 -05:00
Heinrich Schuchardt
8a28caf02b Makefile: add coccicheck target
Coccinelle is a program for static code analysis.
For details on Coccinelle see

	http://coccinelle.lip6.fr/

Add scripts/coccicheck copied from Linux kernel v4.14.

The coccicheck script executes the tests *.cocci in
directory scripts/coccinelle by calling spatch.

In Makefile add a coccicheck target. You can use it with

	make coccicheck MODE=<mode>

	where mode in patch, report, context, org.

Add a copy of Linux v4.14 file Documentation/dev-tools/coccinelle.rst
as doc/README.coccinelle.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 20:18:38 -05:00
Heinrich Schuchardt
76df275ce5 yaffs2: rework yaffs_new_obj_id
The iterator variable of list_for_each is never NULL.
if (1 || A) is always true.
Use break if entry found.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 20:18:38 -05:00
Praneeth Bajjuri
65d87d6cfc dra7x: fastboot: Increase recovery partition size
As per current android recommendation
https://source.android.com/devices/architecture/kernel/modular-kernels

1. Android recovery mode should contain both SOC and ODM
kernel modules in the recovery partition.

2. If a kernel module is required both in recovery and normal boot
mode,  the module has to be located in recovery and vendor
partition seperately.

3. Kernel modules used in recovery mode should be independent
of vendor and odm partition

4. Recovery image should contain atleast
storage, display, keypad, battery and pmic modules.

Due to these requirements, recovery image size has increased
to >10MB.

This patch is to increase recovery partition size for TI devices
so that we dont see such flashing error

log:
sending 'recovery' (12560 KB)...
OKAY [  0.436s]
writing 'recovery'...
FAILED (remote: too large for partition)
finished. total time: 0.458s

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2017-11-20 20:18:37 -05:00
Heinrich Schuchardt
b5142f280a scripts/ld-version.sh: regular expression compile fails
ld --version | scripts/ld-version.sh
fails with
awk: scripts/ld-version.sh:
line 4: regular expression compile failed (missing '(')
.*)

So let's refresh the script from Linux kernel v4.14-rc8.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 20:18:37 -05:00
Heinrich Schuchardt
0931ed3c0d kconfig/symbol.c: use correct pointer type argument for sizeof
sym_arr is of type struct symbol **.
So in malloc we need sizeof(struct symbol *).

The problem was indicated by coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 20:18:36 -05:00
Tom Rini
69d3226530 Merge git://git.denx.de/u-boot-ubi 2017-11-20 11:46:08 -05:00
Tom Rini
56d5a10f3a Merge git://git.denx.de/u-boot-i2c 2017-11-20 10:51:11 -05:00
Heinrich Schuchardt
cd5f33e5fc ubi: no NULL check needed before kmem_cache_destroy
kmem_cache_destroy calls free which checks for NULL.

Problem was indicated by coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 10:13:42 +01:00
Heinrich Schuchardt
4b29975fd0 ubifs: no NULL check needed before free
kfree() calls free.
free() checks if the parameter is NULL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20 10:13:33 +01:00
Beniamino Galvani
456efb5127 odroid-c2: enable I2C
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
2017-11-20 10:11:44 +01:00
Beniamino Galvani
f8d9ca1833 i2c: add Amlogic Meson driver
Add a driver for the I2C controller available on Amlogic Meson SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
2017-11-20 10:11:34 +01:00
Fabio Estevam
4684aa7988 mx6sabreauto: Remove unneeded SPL selection
SPL option is already selected via Kconfig, so remove it from the
CONFIG_SYS_EXTRA_OPTIONS line.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-11-20 10:01:48 +01:00
Fabio Estevam
74da017a49 mx6: Select MX6QDL option via Kconfig
Currently the MX6QDL option is selected via CONFIG_SYS_EXTRA_OPTIONS,
but it is better to select it directly via Kconfig.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-11-20 10:01:35 +01:00
Peter Senna Tschudin
6b0071c110 mx53: Add Board support for GE PPD
Create board support for GE PPD, based on mx53loco.

Use mx53ppd_defconfig make target to configure for this board.

Signed-off-by: Peter Senna Tschudin <peter.senna@collabora.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2017-11-20 09:59:02 +01:00
Martyn Welch
b418dfe16e board: ge: make VPD code common
The VPD data is used on a number of GE products. Move the parsing code to
a common location so that we can share this code.

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Acked-by: Stefano Babic <sbabic@denx.de>
2017-11-20 09:58:31 +01:00
Nandor Han
da5337a61c rtc: add support for s35392a
Add support for S35392A RTC. The driver supports both U-Boot driver
models.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Cc: Heiko Schocher <hs@denx.de>
2017-11-20 09:58:31 +01:00
Ian Ray
f31dac4e6e bootcount: add support for bootcounter on EXT filesystem
Add support for bootcounter on an EXT filesystem.
Sync configuration whitelist.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
2017-11-20 09:58:31 +01:00
Martyn Welch
54d8d4942f arm: mx5: Add more register definitions
Add register definitions require for video configuration.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-11-20 09:58:31 +01:00